1 //===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements float type expansion and softening for LegalizeTypes.
11 // Softening is the act of turning a computation in an illegal floating point
12 // type into a computation in an integer type of the same size; also known as
13 // "soft float". For example, turning f32 arithmetic into operations using i32.
14 // The resulting integer value is the same as what you would get by performing
15 // the floating point operation and bitcasting the result to the integer type.
16 // Expansion is the act of changing a computation in an illegal type to be a
17 // computation in two identical registers of a smaller type. For example,
18 // implementing ppcf128 arithmetic in two f64 registers.
20 //===----------------------------------------------------------------------===//
22 #include "LegalizeTypes.h"
23 #include "llvm/CodeGen/PseudoSourceValue.h"
24 #include "llvm/Constants.h"
25 #include "llvm/DerivedTypes.h"
28 /// GetFPLibCall - Return the right libcall for the given floating point type.
29 static RTLIB::Libcall GetFPLibCall(MVT VT,
30 RTLIB::Libcall Call_F32,
31 RTLIB::Libcall Call_F64,
32 RTLIB::Libcall Call_F80,
33 RTLIB::Libcall Call_PPCF128) {
35 VT == MVT::f32 ? Call_F32 :
36 VT == MVT::f64 ? Call_F64 :
37 VT == MVT::f80 ? Call_F80 :
38 VT == MVT::ppcf128 ? Call_PPCF128 :
39 RTLIB::UNKNOWN_LIBCALL;
42 //===----------------------------------------------------------------------===//
43 // Result Float to Integer Conversion.
44 //===----------------------------------------------------------------------===//
46 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
47 DEBUG(cerr << "Soften float result " << ResNo << ": "; N->dump(&DAG);
49 SDOperand R = SDOperand();
51 // FIXME: Custom lowering for float-to-int?
53 // See if the target wants to custom convert this node to an integer.
54 if (TLI.getOperationAction(N->getOpcode(), N->getValueType(0)) ==
55 TargetLowering::Custom) {
56 // If the target wants to, allow it to lower this itself.
57 if (SDNode *P = TLI.FloatToIntOperationResult(N, DAG)) {
58 // Everything that once used N now uses P. We are guaranteed that the
59 // result value types of N and the result value types of P match.
60 ReplaceNodeWith(N, P);
66 switch (N->getOpcode()) {
69 cerr << "SoftenFloatResult #" << ResNo << ": ";
70 N->dump(&DAG); cerr << "\n";
72 assert(0 && "Do not know how to convert the result of this operator!");
75 case ISD::BIT_CONVERT: R = SoftenFloatRes_BIT_CONVERT(N); break;
76 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break;
78 R = SoftenFloatRes_ConstantFP(cast<ConstantFPSDNode>(N));
80 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N); break;
81 case ISD::LOAD: R = SoftenFloatRes_LOAD(N); break;
83 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
85 case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
86 case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
87 case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
90 // If R is null, the sub-method took care of registering the result.
92 SetSoftenedFloat(SDOperand(N, ResNo), R);
95 SDOperand DAGTypeLegalizer::SoftenFloatRes_BIT_CONVERT(SDNode *N) {
96 return BitConvertToInteger(N->getOperand(0));
99 SDOperand DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
100 // Convert the inputs to integers, and build a new pair out of them.
101 return DAG.getNode(ISD::BUILD_PAIR,
102 TLI.getTypeToTransformTo(N->getValueType(0)),
103 BitConvertToInteger(N->getOperand(0)),
104 BitConvertToInteger(N->getOperand(1)));
107 SDOperand DAGTypeLegalizer::SoftenFloatRes_ConstantFP(ConstantFPSDNode *N) {
108 return DAG.getConstant(N->getValueAPF().convertToAPInt(),
109 TLI.getTypeToTransformTo(N->getValueType(0)));
112 SDOperand DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
113 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
114 SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
115 GetSoftenedFloat(N->getOperand(1)) };
116 return MakeLibCall(GetFPLibCall(N->getValueType(0),
121 NVT, Ops, 2, false/*sign irrelevant*/);
124 SDOperand DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) {
125 SDOperand LHS = GetSoftenedFloat(N->getOperand(0));
126 SDOperand RHS = BitConvertToInteger(N->getOperand(1));
128 MVT LVT = LHS.getValueType();
129 MVT RVT = RHS.getValueType();
131 unsigned LSize = LVT.getSizeInBits();
132 unsigned RSize = RVT.getSizeInBits();
134 // First get the sign bit of second operand.
135 SDOperand SignBit = DAG.getNode(ISD::SHL, RVT, DAG.getConstant(1, RVT),
136 DAG.getConstant(RSize - 1,
137 TLI.getShiftAmountTy()));
138 SignBit = DAG.getNode(ISD::AND, RVT, RHS, SignBit);
140 // Shift right or sign-extend it if the two operands have different types.
141 int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
143 SignBit = DAG.getNode(ISD::SRL, RVT, SignBit,
144 DAG.getConstant(SizeDiff, TLI.getShiftAmountTy()));
145 SignBit = DAG.getNode(ISD::TRUNCATE, LVT, SignBit);
146 } else if (SizeDiff < 0) {
147 SignBit = DAG.getNode(ISD::ANY_EXTEND, LVT, SignBit);
148 SignBit = DAG.getNode(ISD::SHL, LVT, SignBit,
149 DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy()));
152 // Clear the sign bit of the first operand.
153 SDOperand Mask = DAG.getNode(ISD::SHL, LVT, DAG.getConstant(1, LVT),
154 DAG.getConstant(LSize - 1,
155 TLI.getShiftAmountTy()));
156 Mask = DAG.getNode(ISD::SUB, LVT, Mask, DAG.getConstant(1, LVT));
157 LHS = DAG.getNode(ISD::AND, LVT, LHS, Mask);
159 // Or the value with the sign bit.
160 return DAG.getNode(ISD::OR, LVT, LHS, SignBit);
163 SDOperand DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
164 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
165 SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
166 GetSoftenedFloat(N->getOperand(1)) };
167 return MakeLibCall(GetFPLibCall(N->getValueType(0),
172 NVT, Ops, 2, false/*sign irrelevant*/);
175 SDOperand DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
176 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
177 SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
178 GetSoftenedFloat(N->getOperand(1)) };
179 return MakeLibCall(GetFPLibCall(N->getValueType(0),
184 NVT, Ops, 2, false/*sign irrelevant*/);
187 SDOperand DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N) {
188 LoadSDNode *L = cast<LoadSDNode>(N);
189 MVT VT = N->getValueType(0);
190 MVT NVT = TLI.getTypeToTransformTo(VT);
192 if (L->getExtensionType() == ISD::NON_EXTLOAD)
193 return DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
194 NVT, L->getChain(), L->getBasePtr(), L->getOffset(),
195 L->getSrcValue(), L->getSrcValueOffset(), NVT,
196 L->isVolatile(), L->getAlignment());
198 // Do a non-extending load followed by FP_EXTEND.
199 SDOperand NL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD,
200 L->getMemoryVT(), L->getChain(),
201 L->getBasePtr(), L->getOffset(),
202 L->getSrcValue(), L->getSrcValueOffset(),
204 L->isVolatile(), L->getAlignment());
205 return BitConvertToInteger(DAG.getNode(ISD::FP_EXTEND, VT, NL));
208 SDOperand DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
209 bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
210 MVT DestVT = N->getValueType(0);
211 SDOperand Op = N->getOperand(0);
213 if (Op.getValueType() == MVT::i32) {
214 // simple 32-bit [signed|unsigned] integer to float/double expansion
216 // Get the stack frame index of a 8 byte buffer.
217 SDOperand StackSlot = DAG.CreateStackTemporary(MVT::f64);
219 // word offset constant for Hi/Lo address computation
221 DAG.getConstant(MVT(MVT::i32).getSizeInBits() / 8,
223 // set up Hi and Lo (into buffer) address based on endian
224 SDOperand Hi = StackSlot;
225 SDOperand Lo = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot, Offset);
226 if (TLI.isLittleEndian())
229 // if signed map to unsigned space
232 // constant used to invert sign bit (signed to unsigned mapping)
233 SDOperand SignBit = DAG.getConstant(0x80000000u, MVT::i32);
234 OpMapped = DAG.getNode(ISD::XOR, MVT::i32, Op, SignBit);
238 // store the lo of the constructed double - based on integer input
239 SDOperand Store1 = DAG.getStore(DAG.getEntryNode(),
240 OpMapped, Lo, NULL, 0);
241 // initial hi portion of constructed double
242 SDOperand InitialHi = DAG.getConstant(0x43300000u, MVT::i32);
243 // store the hi of the constructed double - biased exponent
244 SDOperand Store2=DAG.getStore(Store1, InitialHi, Hi, NULL, 0);
245 // load the constructed double
246 SDOperand Load = DAG.getLoad(MVT::f64, Store2, StackSlot, NULL, 0);
247 // FP constant to bias correct the final result
248 SDOperand Bias = DAG.getConstantFP(isSigned ?
249 BitsToDouble(0x4330000080000000ULL)
250 : BitsToDouble(0x4330000000000000ULL),
253 SDOperand Sub = DAG.getNode(ISD::FSUB, MVT::f64, Load, Bias);
256 // handle final rounding
257 if (DestVT == MVT::f64) {
260 } else if (DestVT.bitsLT(MVT::f64)) {
261 Result = DAG.getNode(ISD::FP_ROUND, DestVT, Sub,
262 DAG.getIntPtrConstant(0));
263 } else if (DestVT.bitsGT(MVT::f64)) {
264 Result = DAG.getNode(ISD::FP_EXTEND, DestVT, Sub);
266 return BitConvertToInteger(Result);
268 assert(!isSigned && "Legalize cannot Expand SINT_TO_FP for i64 yet");
269 SDOperand Tmp1 = DAG.getNode(ISD::SINT_TO_FP, DestVT, Op);
271 SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultType(Op), Op,
272 DAG.getConstant(0, Op.getValueType()),
274 SDOperand Zero = DAG.getIntPtrConstant(0), Four = DAG.getIntPtrConstant(4);
275 SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(),
276 SignSet, Four, Zero);
278 // If the sign bit of the integer is set, the large number will be treated
279 // as a negative number. To counteract this, the dynamic code adds an
280 // offset depending on the data type.
282 switch (Op.getValueType().getSimpleVT()) {
283 default: assert(0 && "Unsupported integer type!");
284 case MVT::i8 : FF = 0x43800000ULL; break; // 2^8 (as a float)
285 case MVT::i16: FF = 0x47800000ULL; break; // 2^16 (as a float)
286 case MVT::i32: FF = 0x4F800000ULL; break; // 2^32 (as a float)
287 case MVT::i64: FF = 0x5F800000ULL; break; // 2^64 (as a float)
289 if (TLI.isLittleEndian()) FF <<= 32;
290 static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF);
292 SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy());
293 CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
294 SDOperand FudgeInReg;
295 if (DestVT == MVT::f32)
296 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
297 PseudoSourceValue::getConstantPool(), 0);
299 FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, DestVT,
300 DAG.getEntryNode(), CPIdx,
301 PseudoSourceValue::getConstantPool(), 0,
305 return BitConvertToInteger(DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg));
309 //===----------------------------------------------------------------------===//
310 // Operand Float to Integer Conversion..
311 //===----------------------------------------------------------------------===//
313 bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
314 DEBUG(cerr << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
318 // FIXME: Custom lowering for float-to-int?
320 if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
321 == TargetLowering::Custom)
322 Res = TLI.LowerOperation(SDOperand(N, 0), DAG);
326 switch (N->getOpcode()) {
329 cerr << "SoftenFloatOperand Op #" << OpNo << ": ";
330 N->dump(&DAG); cerr << "\n";
332 assert(0 && "Do not know how to convert this operator's operand!");
335 case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;
339 // If the result is null, the sub-method took care of registering results etc.
340 if (!Res.Val) return false;
342 // If the result is N, the sub-method updated N in place. Check to see if any
343 // operands are new, and if so, mark them.
345 // Mark N as new and remark N and its operands. This allows us to correctly
346 // revisit N if it needs another step of promotion and allows us to visit
347 // any new operands to N.
352 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
353 "Invalid operand expansion");
355 ReplaceValueWith(SDOperand(N, 0), Res);
359 SDOperand DAGTypeLegalizer::SoftenFloatOp_BIT_CONVERT(SDNode *N) {
360 return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0),
361 GetSoftenedFloat(N->getOperand(0)));
365 //===----------------------------------------------------------------------===//
366 // Float Result Expansion
367 //===----------------------------------------------------------------------===//
369 /// ExpandFloatResult - This method is called when the specified result of the
370 /// specified node is found to need expansion. At this point, the node may also
371 /// have invalid operands or may have other results that need promotion, we just
372 /// know that (at least) one result needs expansion.
373 void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
374 DEBUG(cerr << "Expand float result: "; N->dump(&DAG); cerr << "\n");
376 Lo = Hi = SDOperand();
378 // See if the target wants to custom expand this node.
379 if (TLI.getOperationAction(N->getOpcode(), N->getValueType(0)) ==
380 TargetLowering::Custom) {
381 // If the target wants to, allow it to lower this itself.
382 if (SDNode *P = TLI.ExpandOperationResult(N, DAG)) {
383 // Everything that once used N now uses P. We are guaranteed that the
384 // result value types of N and the result value types of P match.
385 ReplaceNodeWith(N, P);
390 switch (N->getOpcode()) {
393 cerr << "ExpandFloatResult #" << ResNo << ": ";
394 N->dump(&DAG); cerr << "\n";
396 assert(0 && "Do not know how to expand the result of this operator!");
399 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
400 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
401 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
402 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
404 case ISD::BIT_CONVERT: ExpandRes_BIT_CONVERT(N, Lo, Hi); break;
405 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
406 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
409 // If Lo/Hi is null, the sub-method took care of registering results etc.
411 SetExpandedFloat(SDOperand(N, ResNo), Lo, Hi);
415 //===----------------------------------------------------------------------===//
416 // Float Operand Expansion
417 //===----------------------------------------------------------------------===//
419 /// ExpandFloatOperand - This method is called when the specified operand of the
420 /// specified node is found to need expansion. At this point, all of the result
421 /// types of the node are known to be legal, but other operands of the node may
422 /// need promotion or expansion as well as the specified one.
423 bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
424 DEBUG(cerr << "Expand float operand: "; N->dump(&DAG); cerr << "\n");
427 if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
428 == TargetLowering::Custom)
429 Res = TLI.LowerOperation(SDOperand(N, 0), DAG);
432 switch (N->getOpcode()) {
435 cerr << "ExpandFloatOperand Op #" << OpNo << ": ";
436 N->dump(&DAG); cerr << "\n";
438 assert(0 && "Do not know how to expand this operator's operand!");
441 case ISD::BIT_CONVERT: Res = ExpandOp_BIT_CONVERT(N); break;
442 case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break;
443 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
447 // If the result is null, the sub-method took care of registering results etc.
448 if (!Res.Val) return false;
449 // If the result is N, the sub-method updated N in place. Check to see if any
450 // operands are new, and if so, mark them.
452 // Mark N as new and remark N and its operands. This allows us to correctly
453 // revisit N if it needs another step of expansion and allows us to visit
454 // any new operands to N.
459 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
460 "Invalid operand expansion");
462 ReplaceValueWith(SDOperand(N, 0), Res);