1 //===-- LegalizeDAG.cpp - Implement SelectionDAG::Legalize ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the SelectionDAG::Legalize method.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "llvm/CodeGen/MachineConstantPool.h"
16 #include "llvm/CodeGen/MachineFunction.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/Target/TargetLowering.h"
19 #include "llvm/Target/TargetData.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/Constants.h"
26 //===----------------------------------------------------------------------===//
27 /// SelectionDAGLegalize - This takes an arbitrary SelectionDAG as input and
28 /// hacks on it until the target machine can handle it. This involves
29 /// eliminating value sizes the machine cannot handle (promoting small sizes to
30 /// large sizes or splitting up large values into small values) as well as
31 /// eliminating operations the machine cannot handle.
33 /// This code also does a small amount of optimization and recognition of idioms
34 /// as part of its processing. For example, if a target does not support a
35 /// 'setcc' instruction efficiently, but does support 'brcc' instruction, this
36 /// will attempt merge setcc and brc instructions into brcc's.
39 class SelectionDAGLegalize {
43 /// LegalizeAction - This enum indicates what action we should take for each
44 /// value type the can occur in the program.
46 Legal, // The target natively supports this value type.
47 Promote, // This should be promoted to the next larger type.
48 Expand, // This integer type should be broken into smaller pieces.
51 /// ValueTypeActions - This is a bitvector that contains two bits for each
52 /// value type, where the two bits correspond to the LegalizeAction enum.
53 /// This can be queried with "getTypeAction(VT)".
54 unsigned ValueTypeActions;
56 /// NeedsAnotherIteration - This is set when we expand a large integer
57 /// operation into smaller integer operations, but the smaller operations are
58 /// not set. This occurs only rarely in practice, for targets that don't have
59 /// 32-bit or larger integer registers.
60 bool NeedsAnotherIteration;
62 /// LegalizedNodes - For nodes that are of legal width, and that have more
63 /// than one use, this map indicates what regularized operand to use. This
64 /// allows us to avoid legalizing the same thing more than once.
65 std::map<SDOperand, SDOperand> LegalizedNodes;
67 /// PromotedNodes - For nodes that are below legal width, and that have more
68 /// than one use, this map indicates what promoted value to use. This allows
69 /// us to avoid promoting the same thing more than once.
70 std::map<SDOperand, SDOperand> PromotedNodes;
72 /// ExpandedNodes - For nodes that need to be expanded, and which have more
73 /// than one use, this map indicates which which operands are the expanded
74 /// version of the input. This allows us to avoid expanding the same node
76 std::map<SDOperand, std::pair<SDOperand, SDOperand> > ExpandedNodes;
78 void AddLegalizedOperand(SDOperand From, SDOperand To) {
79 bool isNew = LegalizedNodes.insert(std::make_pair(From, To)).second;
80 assert(isNew && "Got into the map somehow?");
82 void AddPromotedOperand(SDOperand From, SDOperand To) {
83 bool isNew = PromotedNodes.insert(std::make_pair(From, To)).second;
84 assert(isNew && "Got into the map somehow?");
89 SelectionDAGLegalize(SelectionDAG &DAG);
91 /// Run - While there is still lowering to do, perform a pass over the DAG.
92 /// Most regularization can be done in a single pass, but targets that require
93 /// large values to be split into registers multiple times (e.g. i64 -> 4x
94 /// i16) require iteration for these values (the first iteration will demote
95 /// to i32, the second will demote to i16).
98 NeedsAnotherIteration = false;
100 } while (NeedsAnotherIteration);
103 /// getTypeAction - Return how we should legalize values of this type, either
104 /// it is already legal or we need to expand it into multiple registers of
105 /// smaller integer type, or we need to promote it to a larger type.
106 LegalizeAction getTypeAction(MVT::ValueType VT) const {
107 return (LegalizeAction)((ValueTypeActions >> (2*VT)) & 3);
110 /// isTypeLegal - Return true if this type is legal on this target.
112 bool isTypeLegal(MVT::ValueType VT) const {
113 return getTypeAction(VT) == Legal;
119 SDOperand LegalizeOp(SDOperand O);
120 void ExpandOp(SDOperand O, SDOperand &Lo, SDOperand &Hi);
121 SDOperand PromoteOp(SDOperand O);
123 SDOperand ExpandLibCall(const char *Name, SDNode *Node,
125 SDOperand ExpandIntToFP(bool isSigned, MVT::ValueType DestTy,
128 SDOperand ExpandLegalUINT_TO_FP(SDOperand LegalOp, MVT::ValueType DestVT);
129 SDOperand PromoteLegalINT_TO_FP(SDOperand LegalOp, MVT::ValueType DestVT,
131 SDOperand PromoteLegalFP_TO_INT(SDOperand LegalOp, MVT::ValueType DestVT,
134 bool ExpandShift(unsigned Opc, SDOperand Op, SDOperand Amt,
135 SDOperand &Lo, SDOperand &Hi);
136 void ExpandShiftParts(unsigned NodeOp, SDOperand Op, SDOperand Amt,
137 SDOperand &Lo, SDOperand &Hi);
138 void ExpandByParts(unsigned NodeOp, SDOperand LHS, SDOperand RHS,
139 SDOperand &Lo, SDOperand &Hi);
141 void SpliceCallInto(const SDOperand &CallResult, SDNode *OutChain);
143 SDOperand getIntPtrConstant(uint64_t Val) {
144 return DAG.getConstant(Val, TLI.getPointerTy());
150 SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag)
151 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
152 ValueTypeActions(TLI.getValueTypeActions()) {
153 assert(MVT::LAST_VALUETYPE <= 16 &&
154 "Too many value types for ValueTypeActions to hold!");
157 /// ExpandLegalUINT_TO_FP - This function is responsible for legalizing a
158 /// UINT_TO_FP operation of the specified operand when the target requests that
159 /// we expand it. At this point, we know that the result and operand types are
160 /// legal for the target.
161 SDOperand SelectionDAGLegalize::ExpandLegalUINT_TO_FP(SDOperand Op0,
162 MVT::ValueType DestVT) {
163 SDOperand Tmp1 = DAG.getNode(ISD::SINT_TO_FP, DestVT, Op0);
165 SDOperand SignSet = DAG.getSetCC(ISD::SETLT, TLI.getSetCCResultTy(),
168 Op0.getValueType()));
169 SDOperand Zero = getIntPtrConstant(0), Four = getIntPtrConstant(4);
170 SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(),
171 SignSet, Four, Zero);
173 // If the sign bit of the integer is set, the large number will be treated as
174 // a negative number. To counteract this, the dynamic code adds an offset
175 // depending on the data type.
177 switch (Op0.getValueType()) {
178 default: assert(0 && "Unsupported integer type!");
179 case MVT::i8 : FF = 0x43800000ULL; break; // 2^8 (as a float)
180 case MVT::i16: FF = 0x47800000ULL; break; // 2^16 (as a float)
181 case MVT::i32: FF = 0x4F800000ULL; break; // 2^32 (as a float)
182 case MVT::i64: FF = 0x5F800000ULL; break; // 2^64 (as a float)
184 if (TLI.isLittleEndian()) FF <<= 32;
185 static Constant *FudgeFactor = ConstantUInt::get(Type::ULongTy, FF);
187 MachineConstantPool *CP = DAG.getMachineFunction().getConstantPool();
188 SDOperand CPIdx = DAG.getConstantPool(CP->getConstantPoolIndex(FudgeFactor),
190 CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
191 SDOperand FudgeInReg;
192 if (DestVT == MVT::f32)
193 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
194 DAG.getSrcValue(NULL));
196 assert(DestVT == MVT::f64 && "Unexpected conversion");
197 FudgeInReg = LegalizeOp(DAG.getExtLoad(ISD::EXTLOAD, MVT::f64,
198 DAG.getEntryNode(), CPIdx,
199 DAG.getSrcValue(NULL), MVT::f32));
202 NeedsAnotherIteration = true;
203 return DAG.getNode(ISD::ADD, DestVT, Tmp1, FudgeInReg);
206 /// PromoteLegalUINT_TO_FP - This function is responsible for legalizing a
207 /// *INT_TO_FP operation of the specified operand when the target requests that
208 /// we promote it. At this point, we know that the result and operand types are
209 /// legal for the target, and that there is a legal UINT_TO_FP or SINT_TO_FP
210 /// operation that takes a larger input.
211 SDOperand SelectionDAGLegalize::PromoteLegalINT_TO_FP(SDOperand LegalOp,
212 MVT::ValueType DestVT,
214 // First step, figure out the appropriate *INT_TO_FP operation to use.
215 MVT::ValueType NewInTy = LegalOp.getValueType();
217 unsigned OpToUse = 0;
219 // Scan for the appropriate larger type to use.
221 NewInTy = (MVT::ValueType)(NewInTy+1);
222 assert(MVT::isInteger(NewInTy) && "Ran out of possibilities!");
224 // If the target supports SINT_TO_FP of this type, use it.
225 switch (TLI.getOperationAction(ISD::SINT_TO_FP, NewInTy)) {
227 case TargetLowering::Legal:
228 if (!TLI.hasNativeSupportFor(NewInTy))
229 break; // Can't use this datatype.
231 case TargetLowering::Custom:
232 OpToUse = ISD::SINT_TO_FP;
236 if (isSigned) continue;
238 // If the target supports UINT_TO_FP of this type, use it.
239 switch (TLI.getOperationAction(ISD::UINT_TO_FP, NewInTy)) {
241 case TargetLowering::Legal:
242 if (!TLI.hasNativeSupportFor(NewInTy))
243 break; // Can't use this datatype.
245 case TargetLowering::Custom:
246 OpToUse = ISD::UINT_TO_FP;
251 // Otherwise, try a larger type.
254 // Make sure to legalize any nodes we create here in the next pass.
255 NeedsAnotherIteration = true;
257 // Okay, we found the operation and type to use. Zero extend our input to the
258 // desired type then run the operation on it.
259 return DAG.getNode(OpToUse, DestVT,
260 DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND,
264 /// PromoteLegalFP_TO_INT - This function is responsible for legalizing a
265 /// FP_TO_*INT operation of the specified operand when the target requests that
266 /// we promote it. At this point, we know that the result and operand types are
267 /// legal for the target, and that there is a legal FP_TO_UINT or FP_TO_SINT
268 /// operation that returns a larger result.
269 SDOperand SelectionDAGLegalize::PromoteLegalFP_TO_INT(SDOperand LegalOp,
270 MVT::ValueType DestVT,
272 // First step, figure out the appropriate FP_TO*INT operation to use.
273 MVT::ValueType NewOutTy = DestVT;
275 unsigned OpToUse = 0;
277 // Scan for the appropriate larger type to use.
279 NewOutTy = (MVT::ValueType)(NewOutTy+1);
280 assert(MVT::isInteger(NewOutTy) && "Ran out of possibilities!");
282 // If the target supports FP_TO_SINT returning this type, use it.
283 switch (TLI.getOperationAction(ISD::FP_TO_SINT, NewOutTy)) {
285 case TargetLowering::Legal:
286 if (!TLI.hasNativeSupportFor(NewOutTy))
287 break; // Can't use this datatype.
289 case TargetLowering::Custom:
290 OpToUse = ISD::FP_TO_SINT;
295 // If the target supports FP_TO_UINT of this type, use it.
296 switch (TLI.getOperationAction(ISD::FP_TO_UINT, NewOutTy)) {
298 case TargetLowering::Legal:
299 if (!TLI.hasNativeSupportFor(NewOutTy))
300 break; // Can't use this datatype.
302 case TargetLowering::Custom:
303 OpToUse = ISD::FP_TO_UINT;
308 // Otherwise, try a larger type.
311 // Make sure to legalize any nodes we create here in the next pass.
312 NeedsAnotherIteration = true;
314 // Okay, we found the operation and type to use. Truncate the result of the
315 // extended FP_TO_*INT operation to the desired size.
316 return DAG.getNode(ISD::TRUNCATE, DestVT,
317 DAG.getNode(OpToUse, NewOutTy, LegalOp));
321 void SelectionDAGLegalize::LegalizeDAG() {
322 SDOperand OldRoot = DAG.getRoot();
323 SDOperand NewRoot = LegalizeOp(OldRoot);
324 DAG.setRoot(NewRoot);
326 ExpandedNodes.clear();
327 LegalizedNodes.clear();
328 PromotedNodes.clear();
330 // Remove dead nodes now.
331 DAG.RemoveDeadNodes(OldRoot.Val);
334 SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
335 assert(getTypeAction(Op.getValueType()) == Legal &&
336 "Caller should expand or promote operands that are not legal!");
337 SDNode *Node = Op.Val;
339 // If this operation defines any values that cannot be represented in a
340 // register on this target, make sure to expand or promote them.
341 if (Node->getNumValues() > 1) {
342 for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
343 switch (getTypeAction(Node->getValueType(i))) {
344 case Legal: break; // Nothing to do.
347 ExpandOp(Op.getValue(i), T1, T2);
348 assert(LegalizedNodes.count(Op) &&
349 "Expansion didn't add legal operands!");
350 return LegalizedNodes[Op];
353 PromoteOp(Op.getValue(i));
354 assert(LegalizedNodes.count(Op) &&
355 "Expansion didn't add legal operands!");
356 return LegalizedNodes[Op];
360 // Note that LegalizeOp may be reentered even from single-use nodes, which
361 // means that we always must cache transformed nodes.
362 std::map<SDOperand, SDOperand>::iterator I = LegalizedNodes.find(Op);
363 if (I != LegalizedNodes.end()) return I->second;
365 SDOperand Tmp1, Tmp2, Tmp3;
367 SDOperand Result = Op;
369 switch (Node->getOpcode()) {
371 if (Node->getOpcode() >= ISD::BUILTIN_OP_END) {
372 // If this is a target node, legalize it by legalizing the operands then
373 // passing it through.
374 std::vector<SDOperand> Ops;
375 bool Changed = false;
376 for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
377 Ops.push_back(LegalizeOp(Node->getOperand(i)));
378 Changed = Changed || Node->getOperand(i) != Ops.back();
381 if (Node->getNumValues() == 1)
382 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Ops);
384 std::vector<MVT::ValueType> VTs(Node->value_begin(),
386 Result = DAG.getNode(Node->getOpcode(), VTs, Ops);
389 for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
390 AddLegalizedOperand(Op.getValue(i), Result.getValue(i));
391 return Result.getValue(Op.ResNo);
393 // Otherwise this is an unhandled builtin node. splat.
394 std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
395 assert(0 && "Do not know how to legalize this operator!");
397 case ISD::EntryToken:
398 case ISD::FrameIndex:
399 case ISD::GlobalAddress:
400 case ISD::ExternalSymbol:
401 case ISD::ConstantPool: // Nothing to do.
402 assert(getTypeAction(Node->getValueType(0)) == Legal &&
403 "This must be legal!");
405 case ISD::CopyFromReg:
406 Tmp1 = LegalizeOp(Node->getOperand(0));
407 if (Tmp1 != Node->getOperand(0))
408 Result = DAG.getCopyFromReg(cast<RegSDNode>(Node)->getReg(),
409 Node->getValueType(0), Tmp1);
411 Result = Op.getValue(0);
413 // Since CopyFromReg produces two values, make sure to remember that we
414 // legalized both of them.
415 AddLegalizedOperand(Op.getValue(0), Result);
416 AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
417 return Result.getValue(Op.ResNo);
418 case ISD::ImplicitDef:
419 Tmp1 = LegalizeOp(Node->getOperand(0));
420 if (Tmp1 != Node->getOperand(0))
421 Result = DAG.getImplicitDef(Tmp1, cast<RegSDNode>(Node)->getReg());
424 MVT::ValueType VT = Op.getValueType();
425 switch (TLI.getOperationAction(ISD::UNDEF, VT)) {
426 default: assert(0 && "This action is not supported yet!");
427 case TargetLowering::Expand:
428 case TargetLowering::Promote:
429 if (MVT::isInteger(VT))
430 Result = DAG.getConstant(0, VT);
431 else if (MVT::isFloatingPoint(VT))
432 Result = DAG.getConstantFP(0, VT);
434 assert(0 && "Unknown value type!");
436 case TargetLowering::Legal:
442 // We know we don't need to expand constants here, constants only have one
443 // value and we check that it is fine above.
445 // FIXME: Maybe we should handle things like targets that don't support full
446 // 32-bit immediates?
448 case ISD::ConstantFP: {
449 // Spill FP immediates to the constant pool if the target cannot directly
450 // codegen them. Targets often have some immediate values that can be
451 // efficiently generated into an FP register without a load. We explicitly
452 // leave these constants as ConstantFP nodes for the target to deal with.
454 ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(Node);
456 // Check to see if this FP immediate is already legal.
457 bool isLegal = false;
458 for (TargetLowering::legal_fpimm_iterator I = TLI.legal_fpimm_begin(),
459 E = TLI.legal_fpimm_end(); I != E; ++I)
460 if (CFP->isExactlyValue(*I)) {
466 // Otherwise we need to spill the constant to memory.
467 MachineConstantPool *CP = DAG.getMachineFunction().getConstantPool();
471 // If a FP immediate is precise when represented as a float, we put it
472 // into the constant pool as a float, even if it's is statically typed
474 MVT::ValueType VT = CFP->getValueType(0);
475 bool isDouble = VT == MVT::f64;
476 ConstantFP *LLVMC = ConstantFP::get(isDouble ? Type::DoubleTy :
477 Type::FloatTy, CFP->getValue());
478 if (isDouble && CFP->isExactlyValue((float)CFP->getValue()) &&
479 // Only do this if the target has a native EXTLOAD instruction from
481 TLI.getOperationAction(ISD::EXTLOAD,
482 MVT::f32) == TargetLowering::Legal) {
483 LLVMC = cast<ConstantFP>(ConstantExpr::getCast(LLVMC, Type::FloatTy));
488 SDOperand CPIdx = DAG.getConstantPool(CP->getConstantPoolIndex(LLVMC),
491 Result = DAG.getExtLoad(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(),
492 CPIdx, DAG.getSrcValue(NULL), MVT::f32);
494 Result = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
495 DAG.getSrcValue(NULL));
500 case ISD::TokenFactor: {
501 std::vector<SDOperand> Ops;
502 bool Changed = false;
503 for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
504 SDOperand Op = Node->getOperand(i);
505 // Fold single-use TokenFactor nodes into this token factor as we go.
506 // FIXME: This is something that the DAGCombiner should do!!
507 if (Op.getOpcode() == ISD::TokenFactor && Op.hasOneUse()) {
509 for (unsigned j = 0, e = Op.getNumOperands(); j != e; ++j)
510 Ops.push_back(LegalizeOp(Op.getOperand(j)));
512 Ops.push_back(LegalizeOp(Op)); // Legalize the operands
513 Changed |= Ops[i] != Op;
517 Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Ops);
521 case ISD::CALLSEQ_START:
522 case ISD::CALLSEQ_END:
523 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
524 // Do not try to legalize the target-specific arguments (#1+)
525 Tmp2 = Node->getOperand(0);
527 Node->setAdjCallChain(Tmp1);
529 // If moving the operand from pointing to Tmp2 dropped its use count to 1,
530 // this will cause the maps used to memoize results to get confused.
531 // Create and add a dummy use, just to increase its use count. This will
532 // be removed at the end of legalize when dead nodes are removed.
533 if (Tmp2.Val->hasOneUse())
534 DAG.getNode(ISD::PCMARKER, MVT::Other, Tmp2,
535 DAG.getConstant(0, MVT::i32));
537 // Note that we do not create new CALLSEQ_DOWN/UP nodes here. These
538 // nodes are treated specially and are mutated in place. This makes the dag
539 // legalization process more efficient and also makes libcall insertion
542 case ISD::DYNAMIC_STACKALLOC:
543 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
544 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the size.
545 Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the alignment.
546 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
547 Tmp3 != Node->getOperand(2)) {
548 std::vector<MVT::ValueType> VTs(Node->value_begin(), Node->value_end());
549 std::vector<SDOperand> Ops;
550 Ops.push_back(Tmp1); Ops.push_back(Tmp2); Ops.push_back(Tmp3);
551 Result = DAG.getNode(ISD::DYNAMIC_STACKALLOC, VTs, Ops);
553 Result = Op.getValue(0);
555 // Since this op produces two values, make sure to remember that we
556 // legalized both of them.
557 AddLegalizedOperand(SDOperand(Node, 0), Result);
558 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
559 return Result.getValue(Op.ResNo);
563 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
564 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the callee.
566 bool Changed = false;
567 std::vector<SDOperand> Ops;
568 for (unsigned i = 2, e = Node->getNumOperands(); i != e; ++i) {
569 Ops.push_back(LegalizeOp(Node->getOperand(i)));
570 Changed |= Ops.back() != Node->getOperand(i);
573 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) || Changed) {
574 std::vector<MVT::ValueType> RetTyVTs;
575 RetTyVTs.reserve(Node->getNumValues());
576 for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
577 RetTyVTs.push_back(Node->getValueType(i));
578 Result = SDOperand(DAG.getCall(RetTyVTs, Tmp1, Tmp2, Ops,
579 Node->getOpcode() == ISD::TAILCALL), 0);
581 Result = Result.getValue(0);
583 // Since calls produce multiple values, make sure to remember that we
584 // legalized all of them.
585 for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
586 AddLegalizedOperand(SDOperand(Node, i), Result.getValue(i));
587 return Result.getValue(Op.ResNo);
590 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
591 if (Tmp1 != Node->getOperand(0))
592 Result = DAG.getNode(ISD::BR, MVT::Other, Tmp1, Node->getOperand(1));
596 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
598 switch (getTypeAction(Node->getOperand(1).getValueType())) {
599 case Expand: assert(0 && "It's impossible to expand bools");
601 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the condition.
604 Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the condition.
607 // Basic block destination (Op#2) is always legal.
608 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
609 Result = DAG.getNode(ISD::BRCOND, MVT::Other, Tmp1, Tmp2,
610 Node->getOperand(2));
612 case ISD::BRCONDTWOWAY:
613 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
614 switch (getTypeAction(Node->getOperand(1).getValueType())) {
615 case Expand: assert(0 && "It's impossible to expand bools");
617 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the condition.
620 Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the condition.
623 // If this target does not support BRCONDTWOWAY, lower it to a BRCOND/BR
625 switch (TLI.getOperationAction(ISD::BRCONDTWOWAY, MVT::Other)) {
626 case TargetLowering::Promote:
627 default: assert(0 && "This action is not supported yet!");
628 case TargetLowering::Legal:
629 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) {
630 std::vector<SDOperand> Ops;
633 Ops.push_back(Node->getOperand(2));
634 Ops.push_back(Node->getOperand(3));
635 Result = DAG.getNode(ISD::BRCONDTWOWAY, MVT::Other, Ops);
638 case TargetLowering::Expand:
639 Result = DAG.getNode(ISD::BRCOND, MVT::Other, Tmp1, Tmp2,
640 Node->getOperand(2));
641 Result = DAG.getNode(ISD::BR, MVT::Other, Result, Node->getOperand(3));
647 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
648 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
650 if (Tmp1 != Node->getOperand(0) ||
651 Tmp2 != Node->getOperand(1))
652 Result = DAG.getLoad(Node->getValueType(0), Tmp1, Tmp2,
653 Node->getOperand(2));
655 Result = SDOperand(Node, 0);
657 // Since loads produce two values, make sure to remember that we legalized
659 AddLegalizedOperand(SDOperand(Node, 0), Result);
660 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
661 return Result.getValue(Op.ResNo);
665 case ISD::ZEXTLOAD: {
666 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
667 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
669 MVT::ValueType SrcVT = cast<VTSDNode>(Node->getOperand(3))->getVT();
670 switch (TLI.getOperationAction(Node->getOpcode(), SrcVT)) {
671 default: assert(0 && "This action is not supported yet!");
672 case TargetLowering::Promote:
673 assert(SrcVT == MVT::i1 && "Can only promote EXTLOAD from i1 -> i8!");
674 Result = DAG.getExtLoad(Node->getOpcode(), Node->getValueType(0),
675 Tmp1, Tmp2, Node->getOperand(2), MVT::i8);
676 // Since loads produce two values, make sure to remember that we legalized
678 AddLegalizedOperand(SDOperand(Node, 0), Result);
679 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
680 return Result.getValue(Op.ResNo);
682 case TargetLowering::Legal:
683 if (Tmp1 != Node->getOperand(0) ||
684 Tmp2 != Node->getOperand(1))
685 Result = DAG.getExtLoad(Node->getOpcode(), Node->getValueType(0),
686 Tmp1, Tmp2, Node->getOperand(2), SrcVT);
688 Result = SDOperand(Node, 0);
690 // Since loads produce two values, make sure to remember that we legalized
692 AddLegalizedOperand(SDOperand(Node, 0), Result);
693 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
694 return Result.getValue(Op.ResNo);
695 case TargetLowering::Expand:
696 //f64 = EXTLOAD f32 should expand to LOAD, FP_EXTEND
697 if (SrcVT == MVT::f32 && Node->getValueType(0) == MVT::f64) {
698 SDOperand Load = DAG.getLoad(SrcVT, Tmp1, Tmp2, Node->getOperand(2));
699 Result = DAG.getNode(ISD::FP_EXTEND, Node->getValueType(0), Load);
701 return Load.getValue(1);
704 assert(Node->getOpcode() != ISD::EXTLOAD &&
705 "EXTLOAD should always be supported!");
706 // Turn the unsupported load into an EXTLOAD followed by an explicit
707 // zero/sign extend inreg.
708 Result = DAG.getExtLoad(ISD::EXTLOAD, Node->getValueType(0),
709 Tmp1, Tmp2, Node->getOperand(2), SrcVT);
711 if (Node->getOpcode() == ISD::SEXTLOAD)
712 ValRes = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(),
713 Result, DAG.getValueType(SrcVT));
715 ValRes = DAG.getZeroExtendInReg(Result, SrcVT);
716 AddLegalizedOperand(SDOperand(Node, 0), ValRes);
717 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
719 return Result.getValue(1);
722 assert(0 && "Unreachable");
724 case ISD::EXTRACT_ELEMENT:
725 // Get both the low and high parts.
726 ExpandOp(Node->getOperand(0), Tmp1, Tmp2);
727 if (cast<ConstantSDNode>(Node->getOperand(1))->getValue())
728 Result = Tmp2; // 1 -> Hi
730 Result = Tmp1; // 0 -> Lo
734 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
736 switch (getTypeAction(Node->getOperand(1).getValueType())) {
738 // Legalize the incoming value (must be legal).
739 Tmp2 = LegalizeOp(Node->getOperand(1));
740 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
741 Result = DAG.getCopyToReg(Tmp1, Tmp2, cast<RegSDNode>(Node)->getReg());
744 Tmp2 = PromoteOp(Node->getOperand(1));
745 Result = DAG.getCopyToReg(Tmp1, Tmp2, cast<RegSDNode>(Node)->getReg());
749 ExpandOp(Node->getOperand(1), Lo, Hi);
750 unsigned Reg = cast<RegSDNode>(Node)->getReg();
751 Lo = DAG.getCopyToReg(Tmp1, Lo, Reg);
752 Hi = DAG.getCopyToReg(Tmp1, Hi, Reg+1);
753 // Note that the copytoreg nodes are independent of each other.
754 Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
755 assert(isTypeLegal(Result.getValueType()) &&
756 "Cannot expand multiple times yet (i64 -> i16)");
762 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
763 switch (Node->getNumOperands()) {
765 switch (getTypeAction(Node->getOperand(1).getValueType())) {
767 Tmp2 = LegalizeOp(Node->getOperand(1));
768 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
769 Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Tmp2);
773 ExpandOp(Node->getOperand(1), Lo, Hi);
774 Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Hi);
778 Tmp2 = PromoteOp(Node->getOperand(1));
779 Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Tmp2);
784 if (Tmp1 != Node->getOperand(0))
785 Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1);
787 default: { // ret <values>
788 std::vector<SDOperand> NewValues;
789 NewValues.push_back(Tmp1);
790 for (unsigned i = 1, e = Node->getNumOperands(); i != e; ++i)
791 switch (getTypeAction(Node->getOperand(i).getValueType())) {
793 NewValues.push_back(LegalizeOp(Node->getOperand(i)));
797 ExpandOp(Node->getOperand(i), Lo, Hi);
798 NewValues.push_back(Lo);
799 NewValues.push_back(Hi);
803 assert(0 && "Can't promote multiple return value yet!");
805 Result = DAG.getNode(ISD::RET, MVT::Other, NewValues);
811 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
812 Tmp2 = LegalizeOp(Node->getOperand(2)); // Legalize the pointer.
814 // Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
815 if (ConstantFPSDNode *CFP =dyn_cast<ConstantFPSDNode>(Node->getOperand(1))){
816 if (CFP->getValueType(0) == MVT::f32) {
821 V.F = CFP->getValue();
822 Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1,
823 DAG.getConstant(V.I, MVT::i32), Tmp2,
824 Node->getOperand(3));
826 assert(CFP->getValueType(0) == MVT::f64 && "Unknown FP type!");
831 V.F = CFP->getValue();
832 Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1,
833 DAG.getConstant(V.I, MVT::i64), Tmp2,
834 Node->getOperand(3));
839 switch (getTypeAction(Node->getOperand(1).getValueType())) {
841 SDOperand Val = LegalizeOp(Node->getOperand(1));
842 if (Val != Node->getOperand(1) || Tmp1 != Node->getOperand(0) ||
843 Tmp2 != Node->getOperand(2))
844 Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Val, Tmp2,
845 Node->getOperand(3));
849 // Truncate the value and store the result.
850 Tmp3 = PromoteOp(Node->getOperand(1));
851 Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Tmp1, Tmp3, Tmp2,
853 DAG.getValueType(Node->getOperand(1).getValueType()));
858 ExpandOp(Node->getOperand(1), Lo, Hi);
860 if (!TLI.isLittleEndian())
863 Lo = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Lo, Tmp2,
864 Node->getOperand(3));
865 unsigned IncrementSize = MVT::getSizeInBits(Hi.getValueType())/8;
866 Tmp2 = DAG.getNode(ISD::ADD, Tmp2.getValueType(), Tmp2,
867 getIntPtrConstant(IncrementSize));
868 assert(isTypeLegal(Tmp2.getValueType()) &&
869 "Pointers must be legal!");
870 //Again, claiming both parts of the store came form the same Instr
871 Hi = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Hi, Tmp2,
872 Node->getOperand(3));
873 Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
878 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
879 if (Tmp1 != Node->getOperand(0))
880 Result = DAG.getNode(ISD::PCMARKER, MVT::Other, Tmp1,Node->getOperand(1));
882 case ISD::TRUNCSTORE:
883 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
884 Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the pointer.
886 switch (getTypeAction(Node->getOperand(1).getValueType())) {
888 Tmp2 = LegalizeOp(Node->getOperand(1));
889 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
890 Tmp3 != Node->getOperand(2))
891 Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, Tmp1, Tmp2, Tmp3,
892 Node->getOperand(3), Node->getOperand(4));
896 assert(0 && "Cannot handle illegal TRUNCSTORE yet!");
900 switch (getTypeAction(Node->getOperand(0).getValueType())) {
901 case Expand: assert(0 && "It's impossible to expand bools");
903 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the condition.
906 Tmp1 = PromoteOp(Node->getOperand(0)); // Promote the condition.
909 Tmp2 = LegalizeOp(Node->getOperand(1)); // TrueVal
910 Tmp3 = LegalizeOp(Node->getOperand(2)); // FalseVal
912 switch (TLI.getOperationAction(Node->getOpcode(), Tmp2.getValueType())) {
913 default: assert(0 && "This action is not supported yet!");
914 case TargetLowering::Legal:
915 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
916 Tmp3 != Node->getOperand(2))
917 Result = DAG.getNode(ISD::SELECT, Node->getValueType(0),
920 case TargetLowering::Promote: {
922 TLI.getTypeToPromoteTo(ISD::SELECT, Tmp2.getValueType());
923 unsigned ExtOp, TruncOp;
924 if (MVT::isInteger(Tmp2.getValueType())) {
925 ExtOp = ISD::ZERO_EXTEND;
926 TruncOp = ISD::TRUNCATE;
928 ExtOp = ISD::FP_EXTEND;
929 TruncOp = ISD::FP_ROUND;
931 // Promote each of the values to the new type.
932 Tmp2 = DAG.getNode(ExtOp, NVT, Tmp2);
933 Tmp3 = DAG.getNode(ExtOp, NVT, Tmp3);
934 // Perform the larger operation, then round down.
935 Result = DAG.getNode(ISD::SELECT, NVT, Tmp1, Tmp2,Tmp3);
936 Result = DAG.getNode(TruncOp, Node->getValueType(0), Result);
942 switch (getTypeAction(Node->getOperand(0).getValueType())) {
944 Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS
945 Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS
946 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
947 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
948 Node->getValueType(0), Tmp1, Tmp2);
951 Tmp1 = PromoteOp(Node->getOperand(0)); // LHS
952 Tmp2 = PromoteOp(Node->getOperand(1)); // RHS
954 // If this is an FP compare, the operands have already been extended.
955 if (MVT::isInteger(Node->getOperand(0).getValueType())) {
956 MVT::ValueType VT = Node->getOperand(0).getValueType();
957 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
959 // Otherwise, we have to insert explicit sign or zero extends. Note
960 // that we could insert sign extends for ALL conditions, but zero extend
961 // is cheaper on many machines (an AND instead of two shifts), so prefer
963 switch (cast<SetCCSDNode>(Node)->getCondition()) {
964 default: assert(0 && "Unknown integer comparison!");
971 // ALL of these operations will work if we either sign or zero extend
972 // the operands (including the unsigned comparisons!). Zero extend is
973 // usually a simpler/cheaper operation, so prefer it.
974 Tmp1 = DAG.getZeroExtendInReg(Tmp1, VT);
975 Tmp2 = DAG.getZeroExtendInReg(Tmp2, VT);
981 Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp1,
982 DAG.getValueType(VT));
983 Tmp2 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp2,
984 DAG.getValueType(VT));
989 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
990 Node->getValueType(0), Tmp1, Tmp2);
993 SDOperand LHSLo, LHSHi, RHSLo, RHSHi;
994 ExpandOp(Node->getOperand(0), LHSLo, LHSHi);
995 ExpandOp(Node->getOperand(1), RHSLo, RHSHi);
996 switch (cast<SetCCSDNode>(Node)->getCondition()) {
1000 if (ConstantSDNode *RHSCST = dyn_cast<ConstantSDNode>(RHSLo))
1001 if (RHSCST->isAllOnesValue()) {
1002 // Comparison to -1.
1003 Tmp1 = DAG.getNode(ISD::AND, LHSLo.getValueType(), LHSLo, LHSHi);
1004 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
1005 Node->getValueType(0), Tmp1, RHSLo);
1009 Tmp1 = DAG.getNode(ISD::XOR, LHSLo.getValueType(), LHSLo, RHSLo);
1010 Tmp2 = DAG.getNode(ISD::XOR, LHSLo.getValueType(), LHSHi, RHSHi);
1011 Tmp1 = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp2);
1012 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
1013 Node->getValueType(0), Tmp1,
1014 DAG.getConstant(0, Tmp1.getValueType()));
1017 // If this is a comparison of the sign bit, just look at the top part.
1019 if (ConstantSDNode *CST = dyn_cast<ConstantSDNode>(Node->getOperand(1)))
1020 if ((cast<SetCCSDNode>(Node)->getCondition() == ISD::SETLT &&
1021 CST->getValue() == 0) || // X < 0
1022 (cast<SetCCSDNode>(Node)->getCondition() == ISD::SETGT &&
1023 (CST->isAllOnesValue()))) // X > -1
1024 return DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
1025 Node->getValueType(0), LHSHi, RHSHi);
1027 // FIXME: This generated code sucks.
1028 ISD::CondCode LowCC;
1029 switch (cast<SetCCSDNode>(Node)->getCondition()) {
1030 default: assert(0 && "Unknown integer setcc!");
1032 case ISD::SETULT: LowCC = ISD::SETULT; break;
1034 case ISD::SETUGT: LowCC = ISD::SETUGT; break;
1036 case ISD::SETULE: LowCC = ISD::SETULE; break;
1038 case ISD::SETUGE: LowCC = ISD::SETUGE; break;
1041 // Tmp1 = lo(op1) < lo(op2) // Always unsigned comparison
1042 // Tmp2 = hi(op1) < hi(op2) // Signedness depends on operands
1043 // dest = hi(op1) == hi(op2) ? Tmp1 : Tmp2;
1045 // NOTE: on targets without efficient SELECT of bools, we can always use
1046 // this identity: (B1 ? B2 : B3) --> (B1 & B2)|(!B1&B3)
1047 Tmp1 = DAG.getSetCC(LowCC, Node->getValueType(0), LHSLo, RHSLo);
1048 Tmp2 = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
1049 Node->getValueType(0), LHSHi, RHSHi);
1050 Result = DAG.getSetCC(ISD::SETEQ, Node->getValueType(0), LHSHi, RHSHi);
1051 Result = DAG.getNode(ISD::SELECT, Tmp1.getValueType(),
1052 Result, Tmp1, Tmp2);
1060 case ISD::MEMMOVE: {
1061 Tmp1 = LegalizeOp(Node->getOperand(0)); // Chain
1062 Tmp2 = LegalizeOp(Node->getOperand(1)); // Pointer
1064 if (Node->getOpcode() == ISD::MEMSET) { // memset = ubyte
1065 switch (getTypeAction(Node->getOperand(2).getValueType())) {
1066 case Expand: assert(0 && "Cannot expand a byte!");
1068 Tmp3 = LegalizeOp(Node->getOperand(2));
1071 Tmp3 = PromoteOp(Node->getOperand(2));
1075 Tmp3 = LegalizeOp(Node->getOperand(2)); // memcpy/move = pointer,
1079 switch (getTypeAction(Node->getOperand(3).getValueType())) {
1081 // Length is too big, just take the lo-part of the length.
1083 ExpandOp(Node->getOperand(3), HiPart, Tmp4);
1087 Tmp4 = LegalizeOp(Node->getOperand(3));
1090 Tmp4 = PromoteOp(Node->getOperand(3));
1095 switch (getTypeAction(Node->getOperand(4).getValueType())) { // uint
1096 case Expand: assert(0 && "Cannot expand this yet!");
1098 Tmp5 = LegalizeOp(Node->getOperand(4));
1101 Tmp5 = PromoteOp(Node->getOperand(4));
1105 switch (TLI.getOperationAction(Node->getOpcode(), MVT::Other)) {
1106 default: assert(0 && "This action not implemented for this operation!");
1107 case TargetLowering::Legal:
1108 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
1109 Tmp3 != Node->getOperand(2) || Tmp4 != Node->getOperand(3) ||
1110 Tmp5 != Node->getOperand(4)) {
1111 std::vector<SDOperand> Ops;
1112 Ops.push_back(Tmp1); Ops.push_back(Tmp2); Ops.push_back(Tmp3);
1113 Ops.push_back(Tmp4); Ops.push_back(Tmp5);
1114 Result = DAG.getNode(Node->getOpcode(), MVT::Other, Ops);
1117 case TargetLowering::Expand: {
1118 // Otherwise, the target does not support this operation. Lower the
1119 // operation to an explicit libcall as appropriate.
1120 MVT::ValueType IntPtr = TLI.getPointerTy();
1121 const Type *IntPtrTy = TLI.getTargetData().getIntPtrType();
1122 std::vector<std::pair<SDOperand, const Type*> > Args;
1124 const char *FnName = 0;
1125 if (Node->getOpcode() == ISD::MEMSET) {
1126 Args.push_back(std::make_pair(Tmp2, IntPtrTy));
1127 // Extend the ubyte argument to be an int value for the call.
1128 Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Tmp3);
1129 Args.push_back(std::make_pair(Tmp3, Type::IntTy));
1130 Args.push_back(std::make_pair(Tmp4, IntPtrTy));
1133 } else if (Node->getOpcode() == ISD::MEMCPY ||
1134 Node->getOpcode() == ISD::MEMMOVE) {
1135 Args.push_back(std::make_pair(Tmp2, IntPtrTy));
1136 Args.push_back(std::make_pair(Tmp3, IntPtrTy));
1137 Args.push_back(std::make_pair(Tmp4, IntPtrTy));
1138 FnName = Node->getOpcode() == ISD::MEMMOVE ? "memmove" : "memcpy";
1140 assert(0 && "Unknown op!");
1143 std::pair<SDOperand,SDOperand> CallResult =
1144 TLI.LowerCallTo(Tmp1, Type::VoidTy, false, CallingConv::C, false,
1145 DAG.getExternalSymbol(FnName, IntPtr), Args, DAG);
1146 Result = CallResult.second;
1147 NeedsAnotherIteration = true;
1150 case TargetLowering::Custom:
1151 std::vector<SDOperand> Ops;
1152 Ops.push_back(Tmp1); Ops.push_back(Tmp2); Ops.push_back(Tmp3);
1153 Ops.push_back(Tmp4); Ops.push_back(Tmp5);
1154 Result = DAG.getNode(Node->getOpcode(), MVT::Other, Ops);
1155 Result = TLI.LowerOperation(Result, DAG);
1156 Result = LegalizeOp(Result);
1163 Tmp1 = LegalizeOp(Node->getOperand(0));
1164 Tmp2 = LegalizeOp(Node->getOperand(1));
1166 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) {
1167 std::vector<MVT::ValueType> VTs(Node->value_begin(), Node->value_end());
1168 std::vector<SDOperand> Ops;
1169 Ops.push_back(Tmp1);
1170 Ops.push_back(Tmp2);
1171 Result = DAG.getNode(ISD::READPORT, VTs, Ops);
1173 Result = SDOperand(Node, 0);
1174 // Since these produce two values, make sure to remember that we legalized
1176 AddLegalizedOperand(SDOperand(Node, 0), Result);
1177 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
1178 return Result.getValue(Op.ResNo);
1179 case ISD::WRITEPORT:
1180 Tmp1 = LegalizeOp(Node->getOperand(0));
1181 Tmp2 = LegalizeOp(Node->getOperand(1));
1182 Tmp3 = LegalizeOp(Node->getOperand(2));
1183 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
1184 Tmp3 != Node->getOperand(2))
1185 Result = DAG.getNode(Node->getOpcode(), MVT::Other, Tmp1, Tmp2, Tmp3);
1189 Tmp1 = LegalizeOp(Node->getOperand(0));
1190 Tmp2 = LegalizeOp(Node->getOperand(1));
1192 switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
1193 case TargetLowering::Custom:
1194 default: assert(0 && "This action not implemented for this operation!");
1195 case TargetLowering::Legal:
1196 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) {
1197 std::vector<MVT::ValueType> VTs(Node->value_begin(), Node->value_end());
1198 std::vector<SDOperand> Ops;
1199 Ops.push_back(Tmp1);
1200 Ops.push_back(Tmp2);
1201 Result = DAG.getNode(ISD::READPORT, VTs, Ops);
1203 Result = SDOperand(Node, 0);
1205 case TargetLowering::Expand:
1206 // Replace this with a load from memory.
1207 Result = DAG.getLoad(Node->getValueType(0), Node->getOperand(0),
1208 Node->getOperand(1), DAG.getSrcValue(NULL));
1209 Result = LegalizeOp(Result);
1213 // Since these produce two values, make sure to remember that we legalized
1215 AddLegalizedOperand(SDOperand(Node, 0), Result);
1216 AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
1217 return Result.getValue(Op.ResNo);
1220 Tmp1 = LegalizeOp(Node->getOperand(0));
1221 Tmp2 = LegalizeOp(Node->getOperand(1));
1222 Tmp3 = LegalizeOp(Node->getOperand(2));
1224 switch (TLI.getOperationAction(Node->getOpcode(),
1225 Node->getOperand(1).getValueType())) {
1226 case TargetLowering::Custom:
1227 default: assert(0 && "This action not implemented for this operation!");
1228 case TargetLowering::Legal:
1229 if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1) ||
1230 Tmp3 != Node->getOperand(2))
1231 Result = DAG.getNode(Node->getOpcode(), MVT::Other, Tmp1, Tmp2, Tmp3);
1233 case TargetLowering::Expand:
1234 // Replace this with a store to memory.
1235 Result = DAG.getNode(ISD::STORE, MVT::Other, Node->getOperand(0),
1236 Node->getOperand(1), Node->getOperand(2),
1237 DAG.getSrcValue(NULL));
1238 Result = LegalizeOp(Result);
1243 case ISD::ADD_PARTS:
1244 case ISD::SUB_PARTS:
1245 case ISD::SHL_PARTS:
1246 case ISD::SRA_PARTS:
1247 case ISD::SRL_PARTS: {
1248 std::vector<SDOperand> Ops;
1249 bool Changed = false;
1250 for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
1251 Ops.push_back(LegalizeOp(Node->getOperand(i)));
1252 Changed |= Ops.back() != Node->getOperand(i);
1255 std::vector<MVT::ValueType> VTs(Node->value_begin(), Node->value_end());
1256 Result = DAG.getNode(Node->getOpcode(), VTs, Ops);
1259 // Since these produce multiple values, make sure to remember that we
1260 // legalized all of them.
1261 for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
1262 AddLegalizedOperand(SDOperand(Node, i), Result.getValue(i));
1263 return Result.getValue(Op.ResNo);
1280 Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS
1281 switch (getTypeAction(Node->getOperand(1).getValueType())) {
1282 case Expand: assert(0 && "Not possible");
1284 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the RHS.
1287 Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the RHS.
1290 if (Tmp1 != Node->getOperand(0) ||
1291 Tmp2 != Node->getOperand(1))
1292 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,Tmp2);
1297 Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS
1298 Tmp2 = LegalizeOp(Node->getOperand(1)); // RHS
1299 switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
1300 case TargetLowering::Legal:
1301 if (Tmp1 != Node->getOperand(0) ||
1302 Tmp2 != Node->getOperand(1))
1303 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,
1306 case TargetLowering::Promote:
1307 case TargetLowering::Custom:
1308 assert(0 && "Cannot promote/custom handle this yet!");
1309 case TargetLowering::Expand: {
1310 MVT::ValueType VT = Node->getValueType(0);
1311 unsigned Opc = (Node->getOpcode() == ISD::UREM) ? ISD::UDIV : ISD::SDIV;
1312 Result = DAG.getNode(Opc, VT, Tmp1, Tmp2);
1313 Result = DAG.getNode(ISD::MUL, VT, Result, Tmp2);
1314 Result = DAG.getNode(ISD::SUB, VT, Tmp1, Result);
1323 Tmp1 = LegalizeOp(Node->getOperand(0)); // Op
1324 switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
1325 case TargetLowering::Legal:
1326 if (Tmp1 != Node->getOperand(0))
1327 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
1329 case TargetLowering::Promote: {
1330 MVT::ValueType OVT = Tmp1.getValueType();
1331 MVT::ValueType NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), OVT);
1333 // Zero extend the argument.
1334 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, NVT, Tmp1);
1335 // Perform the larger operation, then subtract if needed.
1336 Tmp1 = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
1337 switch(Node->getOpcode())
1343 //if Tmp1 == sizeinbits(NVT) then Tmp1 = sizeinbits(Old VT)
1344 Tmp2 = DAG.getSetCC(ISD::SETEQ, TLI.getSetCCResultTy(), Tmp1,
1345 DAG.getConstant(getSizeInBits(NVT), NVT));
1346 Result = DAG.getNode(ISD::SELECT, NVT, Tmp2,
1347 DAG.getConstant(getSizeInBits(OVT),NVT), Tmp1);
1350 //Tmp1 = Tmp1 - (sizeinbits(NVT) - sizeinbits(Old VT))
1351 Result = DAG.getNode(ISD::SUB, NVT, Tmp1,
1352 DAG.getConstant(getSizeInBits(NVT) -
1353 getSizeInBits(OVT), NVT));
1358 case TargetLowering::Custom:
1359 assert(0 && "Cannot custom handle this yet!");
1360 case TargetLowering::Expand:
1361 switch(Node->getOpcode())
1364 static const uint64_t mask[6] = {
1365 0x5555555555555555ULL, 0x3333333333333333ULL,
1366 0x0F0F0F0F0F0F0F0FULL, 0x00FF00FF00FF00FFULL,
1367 0x0000FFFF0000FFFFULL, 0x00000000FFFFFFFFULL
1369 MVT::ValueType VT = Tmp1.getValueType();
1370 MVT::ValueType ShVT = TLI.getShiftAmountTy();
1371 unsigned len = getSizeInBits(VT);
1372 for (unsigned i = 0; (1U << i) <= (len / 2); ++i) {
1373 //x = (x & mask[i][len/8]) + (x >> (1 << i) & mask[i][len/8])
1374 Tmp2 = DAG.getConstant(mask[i], VT);
1375 Tmp3 = DAG.getConstant(1ULL << i, ShVT);
1376 Tmp1 = DAG.getNode(ISD::ADD, VT,
1377 DAG.getNode(ISD::AND, VT, Tmp1, Tmp2),
1378 DAG.getNode(ISD::AND, VT,
1379 DAG.getNode(ISD::SRL, VT, Tmp1, Tmp3),
1386 /* for now, we do this:
1391 x = x | (x >>32); // for 64-bit input
1392 return popcount(~x);
1394 but see also: http://www.hackersdelight.org/HDcode/nlz.cc */
1395 MVT::ValueType VT = Tmp1.getValueType();
1396 MVT::ValueType ShVT = TLI.getShiftAmountTy();
1397 unsigned len = getSizeInBits(VT);
1398 for (unsigned i = 0; (1U << i) <= (len / 2); ++i) {
1399 Tmp3 = DAG.getConstant(1ULL << i, ShVT);
1400 Tmp1 = DAG.getNode(ISD::OR, VT, Tmp1,
1401 DAG.getNode(ISD::SRL, VT, Tmp1, Tmp3));
1403 Tmp3 = DAG.getNode(ISD::XOR, VT, Tmp1, DAG.getConstant(~0ULL, VT));
1404 Result = LegalizeOp(DAG.getNode(ISD::CTPOP, VT, Tmp3));
1408 // for now, we use: { return popcount(~x & (x - 1)); }
1409 // unless the target has ctlz but not ctpop, in which case we use:
1410 // { return 32 - nlz(~x & (x-1)); }
1411 // see also http://www.hackersdelight.org/HDcode/ntz.cc
1412 MVT::ValueType VT = Tmp1.getValueType();
1413 Tmp2 = DAG.getConstant(~0ULL, VT);
1414 Tmp3 = DAG.getNode(ISD::AND, VT,
1415 DAG.getNode(ISD::XOR, VT, Tmp1, Tmp2),
1416 DAG.getNode(ISD::SUB, VT, Tmp1,
1417 DAG.getConstant(1, VT)));
1418 // If ISD::CTLZ is legal and CTPOP isn't, then do that instead
1419 if (TLI.getOperationAction(ISD::CTPOP, VT) != TargetLowering::Legal &&
1420 TLI.getOperationAction(ISD::CTLZ, VT) == TargetLowering::Legal) {
1421 Result = LegalizeOp(DAG.getNode(ISD::SUB, VT,
1422 DAG.getConstant(getSizeInBits(VT), VT),
1423 DAG.getNode(ISD::CTLZ, VT, Tmp3)));
1425 Result = LegalizeOp(DAG.getNode(ISD::CTPOP, VT, Tmp3));
1430 assert(0 && "Cannot expand this yet!");
1443 Tmp1 = LegalizeOp(Node->getOperand(0));
1444 switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
1445 case TargetLowering::Legal:
1446 if (Tmp1 != Node->getOperand(0))
1447 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
1449 case TargetLowering::Promote:
1450 case TargetLowering::Custom:
1451 assert(0 && "Cannot promote/custom handle this yet!");
1452 case TargetLowering::Expand:
1453 switch(Node->getOpcode()) {
1455 // Expand Y = FNEG(X) -> Y = SUB -0.0, X
1456 Tmp2 = DAG.getConstantFP(-0.0, Node->getValueType(0));
1457 Result = LegalizeOp(DAG.getNode(ISD::SUB, Node->getValueType(0),
1462 // Expand Y = FABS(X) -> Y = (X >u 0.0) ? X : fneg(X).
1463 MVT::ValueType VT = Node->getValueType(0);
1464 Tmp2 = DAG.getConstantFP(0.0, VT);
1465 Tmp2 = DAG.getSetCC(ISD::SETUGT, TLI.getSetCCResultTy(), Tmp1, Tmp2);
1466 Tmp3 = DAG.getNode(ISD::FNEG, VT, Tmp1);
1467 Result = DAG.getNode(ISD::SELECT, VT, Tmp2, Tmp1, Tmp3);
1468 Result = LegalizeOp(Result);
1474 MVT::ValueType VT = Node->getValueType(0);
1475 Type *T = VT == MVT::f32 ? Type::FloatTy : Type::DoubleTy;
1476 const char *FnName = 0;
1477 switch(Node->getOpcode()) {
1478 case ISD::FSQRT: FnName = VT == MVT::f32 ? "sqrtf" : "sqrt"; break;
1479 case ISD::FSIN: FnName = VT == MVT::f32 ? "sinf" : "sin"; break;
1480 case ISD::FCOS: FnName = VT == MVT::f32 ? "cosf" : "cos"; break;
1481 default: assert(0 && "Unreachable!");
1483 std::vector<std::pair<SDOperand, const Type*> > Args;
1484 Args.push_back(std::make_pair(Tmp1, T));
1485 // FIXME: should use ExpandLibCall!
1486 std::pair<SDOperand,SDOperand> CallResult =
1487 TLI.LowerCallTo(DAG.getEntryNode(), T, false, CallingConv::C, true,
1488 DAG.getExternalSymbol(FnName, VT), Args, DAG);
1489 Result = LegalizeOp(CallResult.first);
1493 assert(0 && "Unreachable!");
1499 // Conversion operators. The source and destination have different types.
1500 case ISD::SINT_TO_FP:
1501 case ISD::UINT_TO_FP: {
1502 bool isSigned = Node->getOpcode() == ISD::SINT_TO_FP;
1503 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1505 switch (TLI.getOperationAction(Node->getOpcode(),
1506 Node->getOperand(0).getValueType())) {
1507 default: assert(0 && "Unknown operation action!");
1508 case TargetLowering::Expand:
1509 assert(!isSigned && "Legalize cannot Expand SINT_TO_FP yet");
1510 Result = ExpandLegalUINT_TO_FP(LegalizeOp(Node->getOperand(0)),
1511 Node->getValueType(0));
1512 AddLegalizedOperand(Op, Result);
1514 case TargetLowering::Promote:
1515 Result = PromoteLegalINT_TO_FP(LegalizeOp(Node->getOperand(0)),
1516 Node->getValueType(0),
1518 AddLegalizedOperand(Op, Result);
1520 case TargetLowering::Legal:
1524 Tmp1 = LegalizeOp(Node->getOperand(0));
1525 if (Tmp1 != Node->getOperand(0))
1526 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
1529 Result = ExpandIntToFP(Node->getOpcode() == ISD::SINT_TO_FP,
1530 Node->getValueType(0), Node->getOperand(0));
1534 Result = PromoteOp(Node->getOperand(0));
1535 Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(),
1536 Result, DAG.getValueType(Node->getOperand(0).getValueType()));
1537 Result = DAG.getNode(ISD::SINT_TO_FP, Op.getValueType(), Result);
1539 Result = PromoteOp(Node->getOperand(0));
1540 Result = DAG.getZeroExtendInReg(Result,
1541 Node->getOperand(0).getValueType());
1542 Result = DAG.getNode(ISD::UINT_TO_FP, Op.getValueType(), Result);
1549 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1551 Tmp1 = LegalizeOp(Node->getOperand(0));
1552 if (Tmp1 != Node->getOperand(0))
1553 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
1556 ExpandOp(Node->getOperand(0), Tmp1, Tmp2);
1558 // Since the result is legal, we should just be able to truncate the low
1559 // part of the source.
1560 Result = DAG.getNode(ISD::TRUNCATE, Node->getValueType(0), Tmp1);
1563 Result = PromoteOp(Node->getOperand(0));
1564 Result = DAG.getNode(ISD::TRUNCATE, Op.getValueType(), Result);
1569 case ISD::FP_TO_SINT:
1570 case ISD::FP_TO_UINT:
1571 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1573 Tmp1 = LegalizeOp(Node->getOperand(0));
1575 switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))){
1576 default: assert(0 && "Unknown operation action!");
1577 case TargetLowering::Expand:
1578 assert(0 && "Cannot expand FP_TO*INT yet");
1579 case TargetLowering::Promote:
1580 Result = PromoteLegalFP_TO_INT(Tmp1, Node->getValueType(0),
1581 Node->getOpcode() == ISD::FP_TO_SINT);
1582 AddLegalizedOperand(Op, Result);
1584 case TargetLowering::Legal:
1586 case TargetLowering::Custom:
1587 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
1588 Result = TLI.LowerOperation(Result, DAG);
1589 AddLegalizedOperand(Op, Result);
1590 NeedsAnotherIteration = true;
1594 if (Tmp1 != Node->getOperand(0))
1595 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
1598 assert(0 && "Shouldn't need to expand other operators here!");
1600 Result = PromoteOp(Node->getOperand(0));
1601 Result = DAG.getNode(Node->getOpcode(), Op.getValueType(), Result);
1606 case ISD::ZERO_EXTEND:
1607 case ISD::SIGN_EXTEND:
1608 case ISD::FP_EXTEND:
1610 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1612 Tmp1 = LegalizeOp(Node->getOperand(0));
1613 if (Tmp1 != Node->getOperand(0))
1614 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1);
1617 assert(0 && "Shouldn't need to expand other operators here!");
1620 switch (Node->getOpcode()) {
1621 case ISD::ZERO_EXTEND:
1622 Result = PromoteOp(Node->getOperand(0));
1623 // NOTE: Any extend would work here...
1624 Result = DAG.getNode(ISD::ZERO_EXTEND, Op.getValueType(), Result);
1625 Result = DAG.getZeroExtendInReg(Result,
1626 Node->getOperand(0).getValueType());
1628 case ISD::SIGN_EXTEND:
1629 Result = PromoteOp(Node->getOperand(0));
1630 // NOTE: Any extend would work here...
1631 Result = DAG.getNode(ISD::ZERO_EXTEND, Op.getValueType(), Result);
1632 Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(),
1634 DAG.getValueType(Node->getOperand(0).getValueType()));
1636 case ISD::FP_EXTEND:
1637 Result = PromoteOp(Node->getOperand(0));
1638 if (Result.getValueType() != Op.getValueType())
1639 // Dynamically dead while we have only 2 FP types.
1640 Result = DAG.getNode(ISD::FP_EXTEND, Op.getValueType(), Result);
1643 Result = PromoteOp(Node->getOperand(0));
1644 Result = DAG.getNode(Node->getOpcode(), Op.getValueType(), Result);
1649 case ISD::FP_ROUND_INREG:
1650 case ISD::SIGN_EXTEND_INREG: {
1651 Tmp1 = LegalizeOp(Node->getOperand(0));
1652 MVT::ValueType ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT();
1654 // If this operation is not supported, convert it to a shl/shr or load/store
1656 switch (TLI.getOperationAction(Node->getOpcode(), ExtraVT)) {
1657 default: assert(0 && "This action not supported for this op yet!");
1658 case TargetLowering::Legal:
1659 if (Tmp1 != Node->getOperand(0))
1660 Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,
1661 DAG.getValueType(ExtraVT));
1663 case TargetLowering::Expand:
1664 // If this is an integer extend and shifts are supported, do that.
1665 if (Node->getOpcode() == ISD::SIGN_EXTEND_INREG) {
1666 // NOTE: we could fall back on load/store here too for targets without
1667 // SAR. However, it is doubtful that any exist.
1668 unsigned BitsDiff = MVT::getSizeInBits(Node->getValueType(0)) -
1669 MVT::getSizeInBits(ExtraVT);
1670 SDOperand ShiftCst = DAG.getConstant(BitsDiff, TLI.getShiftAmountTy());
1671 Result = DAG.getNode(ISD::SHL, Node->getValueType(0),
1672 Node->getOperand(0), ShiftCst);
1673 Result = DAG.getNode(ISD::SRA, Node->getValueType(0),
1675 } else if (Node->getOpcode() == ISD::FP_ROUND_INREG) {
1676 // The only way we can lower this is to turn it into a STORETRUNC,
1677 // EXTLOAD pair, targetting a temporary location (a stack slot).
1679 // NOTE: there is a choice here between constantly creating new stack
1680 // slots and always reusing the same one. We currently always create
1681 // new ones, as reuse may inhibit scheduling.
1682 const Type *Ty = MVT::getTypeForValueType(ExtraVT);
1683 unsigned TySize = (unsigned)TLI.getTargetData().getTypeSize(Ty);
1684 unsigned Align = TLI.getTargetData().getTypeAlignment(Ty);
1685 MachineFunction &MF = DAG.getMachineFunction();
1687 MF.getFrameInfo()->CreateStackObject((unsigned)TySize, Align);
1688 SDOperand StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
1689 Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, DAG.getEntryNode(),
1690 Node->getOperand(0), StackSlot,
1691 DAG.getSrcValue(NULL), DAG.getValueType(ExtraVT));
1692 Result = DAG.getExtLoad(ISD::EXTLOAD, Node->getValueType(0),
1693 Result, StackSlot, DAG.getSrcValue(NULL),
1696 assert(0 && "Unknown op");
1698 Result = LegalizeOp(Result);
1705 // Note that LegalizeOp may be reentered even from single-use nodes, which
1706 // means that we always must cache transformed nodes.
1707 AddLegalizedOperand(Op, Result);
1711 /// PromoteOp - Given an operation that produces a value in an invalid type,
1712 /// promote it to compute the value into a larger type. The produced value will
1713 /// have the correct bits for the low portion of the register, but no guarantee
1714 /// is made about the top bits: it may be zero, sign-extended, or garbage.
1715 SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) {
1716 MVT::ValueType VT = Op.getValueType();
1717 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
1718 assert(getTypeAction(VT) == Promote &&
1719 "Caller should expand or legalize operands that are not promotable!");
1720 assert(NVT > VT && MVT::isInteger(NVT) == MVT::isInteger(VT) &&
1721 "Cannot promote to smaller type!");
1723 SDOperand Tmp1, Tmp2, Tmp3;
1726 SDNode *Node = Op.Val;
1728 if (!Node->hasOneUse()) {
1729 std::map<SDOperand, SDOperand>::iterator I = PromotedNodes.find(Op);
1730 if (I != PromotedNodes.end()) return I->second;
1732 assert(!PromotedNodes.count(Op) && "Repromoted this node??");
1735 // Promotion needs an optimization step to clean up after it, and is not
1736 // careful to avoid operations the target does not support. Make sure that
1737 // all generated operations are legalized in the next iteration.
1738 NeedsAnotherIteration = true;
1740 switch (Node->getOpcode()) {
1742 std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
1743 assert(0 && "Do not know how to promote this operator!");
1746 Result = DAG.getNode(ISD::UNDEF, NVT);
1749 Result = DAG.getNode(ISD::ZERO_EXTEND, NVT, Op);
1750 assert(isa<ConstantSDNode>(Result) && "Didn't constant fold zext?");
1752 case ISD::ConstantFP:
1753 Result = DAG.getNode(ISD::FP_EXTEND, NVT, Op);
1754 assert(isa<ConstantFPSDNode>(Result) && "Didn't constant fold fp_extend?");
1756 case ISD::CopyFromReg:
1757 Result = DAG.getCopyFromReg(cast<RegSDNode>(Node)->getReg(), NVT,
1758 Node->getOperand(0));
1759 // Remember that we legalized the chain.
1760 AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
1764 assert(getTypeAction(TLI.getSetCCResultTy()) == Legal &&
1765 "SetCC type is not legal??");
1766 Result = DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
1767 TLI.getSetCCResultTy(), Node->getOperand(0),
1768 Node->getOperand(1));
1769 Result = LegalizeOp(Result);
1773 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1775 Result = LegalizeOp(Node->getOperand(0));
1776 assert(Result.getValueType() >= NVT &&
1777 "This truncation doesn't make sense!");
1778 if (Result.getValueType() > NVT) // Truncate to NVT instead of VT
1779 Result = DAG.getNode(ISD::TRUNCATE, NVT, Result);
1782 // The truncation is not required, because we don't guarantee anything
1783 // about high bits anyway.
1784 Result = PromoteOp(Node->getOperand(0));
1787 ExpandOp(Node->getOperand(0), Tmp1, Tmp2);
1788 // Truncate the low part of the expanded value to the result type
1789 Result = DAG.getNode(ISD::TRUNCATE, VT, Tmp1);
1792 case ISD::SIGN_EXTEND:
1793 case ISD::ZERO_EXTEND:
1794 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1795 case Expand: assert(0 && "BUG: Smaller reg should have been promoted!");
1797 // Input is legal? Just do extend all the way to the larger type.
1798 Result = LegalizeOp(Node->getOperand(0));
1799 Result = DAG.getNode(Node->getOpcode(), NVT, Result);
1802 // Promote the reg if it's smaller.
1803 Result = PromoteOp(Node->getOperand(0));
1804 // The high bits are not guaranteed to be anything. Insert an extend.
1805 if (Node->getOpcode() == ISD::SIGN_EXTEND)
1806 Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Result,
1807 DAG.getValueType(Node->getOperand(0).getValueType()));
1809 Result = DAG.getZeroExtendInReg(Result,
1810 Node->getOperand(0).getValueType());
1815 case ISD::FP_EXTEND:
1816 assert(0 && "Case not implemented. Dynamically dead with 2 FP types!");
1818 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1819 case Expand: assert(0 && "BUG: Cannot expand FP regs!");
1820 case Promote: assert(0 && "Unreachable with 2 FP types!");
1822 // Input is legal? Do an FP_ROUND_INREG.
1823 Result = LegalizeOp(Node->getOperand(0));
1824 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result,
1825 DAG.getValueType(VT));
1830 case ISD::SINT_TO_FP:
1831 case ISD::UINT_TO_FP:
1832 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1834 Result = LegalizeOp(Node->getOperand(0));
1835 // No extra round required here.
1836 Result = DAG.getNode(Node->getOpcode(), NVT, Result);
1840 Result = PromoteOp(Node->getOperand(0));
1841 if (Node->getOpcode() == ISD::SINT_TO_FP)
1842 Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(),
1844 DAG.getValueType(Node->getOperand(0).getValueType()));
1846 Result = DAG.getZeroExtendInReg(Result,
1847 Node->getOperand(0).getValueType());
1848 // No extra round required here.
1849 Result = DAG.getNode(Node->getOpcode(), NVT, Result);
1852 Result = ExpandIntToFP(Node->getOpcode() == ISD::SINT_TO_FP, NVT,
1853 Node->getOperand(0));
1854 // Round if we cannot tolerate excess precision.
1855 if (NoExcessFPPrecision)
1856 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result,
1857 DAG.getValueType(VT));
1862 case ISD::FP_TO_SINT:
1863 case ISD::FP_TO_UINT:
1864 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1866 Tmp1 = LegalizeOp(Node->getOperand(0));
1869 // The input result is prerounded, so we don't have to do anything
1871 Tmp1 = PromoteOp(Node->getOperand(0));
1874 assert(0 && "not implemented");
1876 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1);
1881 Tmp1 = PromoteOp(Node->getOperand(0));
1882 assert(Tmp1.getValueType() == NVT);
1883 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1);
1884 // NOTE: we do not have to do any extra rounding here for
1885 // NoExcessFPPrecision, because we know the input will have the appropriate
1886 // precision, and these operations don't modify precision at all.
1892 Tmp1 = PromoteOp(Node->getOperand(0));
1893 assert(Tmp1.getValueType() == NVT);
1894 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1);
1895 if(NoExcessFPPrecision)
1896 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result,
1897 DAG.getValueType(VT));
1906 // The input may have strange things in the top bits of the registers, but
1907 // these operations don't care. They may have wierd bits going out, but
1908 // that too is okay if they are integer operations.
1909 Tmp1 = PromoteOp(Node->getOperand(0));
1910 Tmp2 = PromoteOp(Node->getOperand(1));
1911 assert(Tmp1.getValueType() == NVT && Tmp2.getValueType() == NVT);
1912 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1, Tmp2);
1914 // However, if this is a floating point operation, they will give excess
1915 // precision that we may not be able to tolerate. If we DO allow excess
1916 // precision, just leave it, otherwise excise it.
1917 // FIXME: Why would we need to round FP ops more than integer ones?
1918 // Is Round(Add(Add(A,B),C)) != Round(Add(Round(Add(A,B)), C))
1919 if (MVT::isFloatingPoint(NVT) && NoExcessFPPrecision)
1920 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result,
1921 DAG.getValueType(VT));
1926 // These operators require that their input be sign extended.
1927 Tmp1 = PromoteOp(Node->getOperand(0));
1928 Tmp2 = PromoteOp(Node->getOperand(1));
1929 if (MVT::isInteger(NVT)) {
1930 Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp1,
1931 DAG.getValueType(VT));
1932 Tmp2 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp2,
1933 DAG.getValueType(VT));
1935 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1, Tmp2);
1937 // Perform FP_ROUND: this is probably overly pessimistic.
1938 if (MVT::isFloatingPoint(NVT) && NoExcessFPPrecision)
1939 Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result,
1940 DAG.getValueType(VT));
1945 // These operators require that their input be zero extended.
1946 Tmp1 = PromoteOp(Node->getOperand(0));
1947 Tmp2 = PromoteOp(Node->getOperand(1));
1948 assert(MVT::isInteger(NVT) && "Operators don't apply to FP!");
1949 Tmp1 = DAG.getZeroExtendInReg(Tmp1, VT);
1950 Tmp2 = DAG.getZeroExtendInReg(Tmp2, VT);
1951 Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1, Tmp2);
1955 Tmp1 = PromoteOp(Node->getOperand(0));
1956 Tmp2 = LegalizeOp(Node->getOperand(1));
1957 Result = DAG.getNode(ISD::SHL, NVT, Tmp1, Tmp2);
1960 // The input value must be properly sign extended.
1961 Tmp1 = PromoteOp(Node->getOperand(0));
1962 Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Tmp1,
1963 DAG.getValueType(VT));
1964 Tmp2 = LegalizeOp(Node->getOperand(1));
1965 Result = DAG.getNode(ISD::SRA, NVT, Tmp1, Tmp2);
1968 // The input value must be properly zero extended.
1969 Tmp1 = PromoteOp(Node->getOperand(0));
1970 Tmp1 = DAG.getZeroExtendInReg(Tmp1, VT);
1971 Tmp2 = LegalizeOp(Node->getOperand(1));
1972 Result = DAG.getNode(ISD::SRL, NVT, Tmp1, Tmp2);
1975 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
1976 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
1977 // FIXME: When the DAG combiner exists, change this to use EXTLOAD!
1978 if (MVT::isInteger(NVT))
1979 Result = DAG.getExtLoad(ISD::ZEXTLOAD, NVT, Tmp1, Tmp2,
1980 Node->getOperand(2), VT);
1982 Result = DAG.getExtLoad(ISD::EXTLOAD, NVT, Tmp1, Tmp2,
1983 Node->getOperand(2), VT);
1985 // Remember that we legalized the chain.
1986 AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
1989 switch (getTypeAction(Node->getOperand(0).getValueType())) {
1990 case Expand: assert(0 && "It's impossible to expand bools");
1992 Tmp1 = LegalizeOp(Node->getOperand(0));// Legalize the condition.
1995 Tmp1 = PromoteOp(Node->getOperand(0)); // Promote the condition.
1998 Tmp2 = PromoteOp(Node->getOperand(1)); // Legalize the op0
1999 Tmp3 = PromoteOp(Node->getOperand(2)); // Legalize the op1
2000 Result = DAG.getNode(ISD::SELECT, NVT, Tmp1, Tmp2, Tmp3);
2004 Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
2005 Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the callee.
2007 std::vector<SDOperand> Ops;
2008 for (unsigned i = 2, e = Node->getNumOperands(); i != e; ++i)
2009 Ops.push_back(LegalizeOp(Node->getOperand(i)));
2011 assert(Node->getNumValues() == 2 && Op.ResNo == 0 &&
2012 "Can only promote single result calls");
2013 std::vector<MVT::ValueType> RetTyVTs;
2014 RetTyVTs.reserve(2);
2015 RetTyVTs.push_back(NVT);
2016 RetTyVTs.push_back(MVT::Other);
2017 SDNode *NC = DAG.getCall(RetTyVTs, Tmp1, Tmp2, Ops,
2018 Node->getOpcode() == ISD::TAILCALL);
2019 Result = SDOperand(NC, 0);
2021 // Insert the new chain mapping.
2022 AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
2028 Tmp1 = Node->getOperand(0);
2029 //Zero extend the argument
2030 Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, NVT, Tmp1);
2031 // Perform the larger operation, then subtract if needed.
2032 Tmp1 = DAG.getNode(Node->getOpcode(), NVT, Tmp1);
2033 switch(Node->getOpcode())
2039 //if Tmp1 == sizeinbits(NVT) then Tmp1 = sizeinbits(Old VT)
2040 Tmp2 = DAG.getSetCC(ISD::SETEQ, MVT::i1, Tmp1,
2041 DAG.getConstant(getSizeInBits(NVT), NVT));
2042 Result = DAG.getNode(ISD::SELECT, NVT, Tmp2,
2043 DAG.getConstant(getSizeInBits(VT),NVT), Tmp1);
2046 //Tmp1 = Tmp1 - (sizeinbits(NVT) - sizeinbits(Old VT))
2047 Result = DAG.getNode(ISD::SUB, NVT, Tmp1,
2048 DAG.getConstant(getSizeInBits(NVT) -
2049 getSizeInBits(VT), NVT));
2055 assert(Result.Val && "Didn't set a result!");
2056 AddPromotedOperand(Op, Result);
2060 /// ExpandAddSub - Find a clever way to expand this add operation into
2062 void SelectionDAGLegalize::
2063 ExpandByParts(unsigned NodeOp, SDOperand LHS, SDOperand RHS,
2064 SDOperand &Lo, SDOperand &Hi) {
2065 // Expand the subcomponents.
2066 SDOperand LHSL, LHSH, RHSL, RHSH;
2067 ExpandOp(LHS, LHSL, LHSH);
2068 ExpandOp(RHS, RHSL, RHSH);
2070 // FIXME: this should be moved to the dag combiner someday.
2071 assert(NodeOp == ISD::ADD_PARTS || NodeOp == ISD::SUB_PARTS);
2072 if (LHSL.getValueType() == MVT::i32) {
2074 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(LHSL))
2075 if (C->getValue() == 0)
2077 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(RHSL))
2078 if (C->getValue() == 0)
2081 // Turn this into an add/sub of the high part only.
2083 DAG.getNode(NodeOp == ISD::ADD_PARTS ? ISD::ADD : ISD::SUB,
2084 LowEl.getValueType(), LHSH, RHSH);
2091 std::vector<SDOperand> Ops;
2092 Ops.push_back(LHSL);
2093 Ops.push_back(LHSH);
2094 Ops.push_back(RHSL);
2095 Ops.push_back(RHSH);
2097 std::vector<MVT::ValueType> VTs(2, LHSL.getValueType());
2098 Lo = DAG.getNode(NodeOp, VTs, Ops);
2099 Hi = Lo.getValue(1);
2102 void SelectionDAGLegalize::ExpandShiftParts(unsigned NodeOp,
2103 SDOperand Op, SDOperand Amt,
2104 SDOperand &Lo, SDOperand &Hi) {
2105 // Expand the subcomponents.
2106 SDOperand LHSL, LHSH;
2107 ExpandOp(Op, LHSL, LHSH);
2109 std::vector<SDOperand> Ops;
2110 Ops.push_back(LHSL);
2111 Ops.push_back(LHSH);
2113 std::vector<MVT::ValueType> VTs;
2114 VTs.push_back(LHSL.getValueType());
2115 VTs.push_back(LHSH.getValueType());
2116 VTs.push_back(Amt.getValueType());
2117 Lo = DAG.getNode(NodeOp, VTs, Ops);
2118 Hi = Lo.getValue(1);
2122 /// ExpandShift - Try to find a clever way to expand this shift operation out to
2123 /// smaller elements. If we can't find a way that is more efficient than a
2124 /// libcall on this target, return false. Otherwise, return true with the
2125 /// low-parts expanded into Lo and Hi.
2126 bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt,
2127 SDOperand &Lo, SDOperand &Hi) {
2128 assert((Opc == ISD::SHL || Opc == ISD::SRA || Opc == ISD::SRL) &&
2129 "This is not a shift!");
2131 MVT::ValueType NVT = TLI.getTypeToTransformTo(Op.getValueType());
2132 SDOperand ShAmt = LegalizeOp(Amt);
2133 MVT::ValueType ShTy = ShAmt.getValueType();
2134 unsigned VTBits = MVT::getSizeInBits(Op.getValueType());
2135 unsigned NVTBits = MVT::getSizeInBits(NVT);
2137 // Handle the case when Amt is an immediate. Other cases are currently broken
2138 // and are disabled.
2139 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Amt.Val)) {
2140 unsigned Cst = CN->getValue();
2141 // Expand the incoming operand to be shifted, so that we have its parts
2143 ExpandOp(Op, InL, InH);
2147 Lo = DAG.getConstant(0, NVT);
2148 Hi = DAG.getConstant(0, NVT);
2149 } else if (Cst > NVTBits) {
2150 Lo = DAG.getConstant(0, NVT);
2151 Hi = DAG.getNode(ISD::SHL, NVT, InL, DAG.getConstant(Cst-NVTBits,ShTy));
2152 } else if (Cst == NVTBits) {
2153 Lo = DAG.getConstant(0, NVT);
2156 Lo = DAG.getNode(ISD::SHL, NVT, InL, DAG.getConstant(Cst, ShTy));
2157 Hi = DAG.getNode(ISD::OR, NVT,
2158 DAG.getNode(ISD::SHL, NVT, InH, DAG.getConstant(Cst, ShTy)),
2159 DAG.getNode(ISD::SRL, NVT, InL, DAG.getConstant(NVTBits-Cst, ShTy)));
2164 Lo = DAG.getConstant(0, NVT);
2165 Hi = DAG.getConstant(0, NVT);
2166 } else if (Cst > NVTBits) {
2167 Lo = DAG.getNode(ISD::SRL, NVT, InH, DAG.getConstant(Cst-NVTBits,ShTy));
2168 Hi = DAG.getConstant(0, NVT);
2169 } else if (Cst == NVTBits) {
2171 Hi = DAG.getConstant(0, NVT);
2173 Lo = DAG.getNode(ISD::OR, NVT,
2174 DAG.getNode(ISD::SRL, NVT, InL, DAG.getConstant(Cst, ShTy)),
2175 DAG.getNode(ISD::SHL, NVT, InH, DAG.getConstant(NVTBits-Cst, ShTy)));
2176 Hi = DAG.getNode(ISD::SRL, NVT, InH, DAG.getConstant(Cst, ShTy));
2181 Hi = Lo = DAG.getNode(ISD::SRA, NVT, InH,
2182 DAG.getConstant(NVTBits-1, ShTy));
2183 } else if (Cst > NVTBits) {
2184 Lo = DAG.getNode(ISD::SRA, NVT, InH,
2185 DAG.getConstant(Cst-NVTBits, ShTy));
2186 Hi = DAG.getNode(ISD::SRA, NVT, InH,
2187 DAG.getConstant(NVTBits-1, ShTy));
2188 } else if (Cst == NVTBits) {
2190 Hi = DAG.getNode(ISD::SRA, NVT, InH,
2191 DAG.getConstant(NVTBits-1, ShTy));
2193 Lo = DAG.getNode(ISD::OR, NVT,
2194 DAG.getNode(ISD::SRL, NVT, InL, DAG.getConstant(Cst, ShTy)),
2195 DAG.getNode(ISD::SHL, NVT, InH, DAG.getConstant(NVTBits-Cst, ShTy)));
2196 Hi = DAG.getNode(ISD::SRA, NVT, InH, DAG.getConstant(Cst, ShTy));
2201 // FIXME: The following code for expanding shifts using ISD::SELECT is buggy,
2202 // so disable it for now. Currently targets are handling this via SHL_PARTS
2206 // If we have an efficient select operation (or if the selects will all fold
2207 // away), lower to some complex code, otherwise just emit the libcall.
2208 if (TLI.getOperationAction(ISD::SELECT, NVT) != TargetLowering::Legal &&
2209 !isa<ConstantSDNode>(Amt))
2213 ExpandOp(Op, InL, InH);
2214 SDOperand NAmt = DAG.getNode(ISD::SUB, ShTy, // NAmt = 32-ShAmt
2215 DAG.getConstant(NVTBits, ShTy), ShAmt);
2217 // Compare the unmasked shift amount against 32.
2218 SDOperand Cond = DAG.getSetCC(ISD::SETGE, TLI.getSetCCResultTy(), ShAmt,
2219 DAG.getConstant(NVTBits, ShTy));
2221 if (TLI.getShiftAmountFlavor() != TargetLowering::Mask) {
2222 ShAmt = DAG.getNode(ISD::AND, ShTy, ShAmt, // ShAmt &= 31
2223 DAG.getConstant(NVTBits-1, ShTy));
2224 NAmt = DAG.getNode(ISD::AND, ShTy, NAmt, // NAmt &= 31
2225 DAG.getConstant(NVTBits-1, ShTy));
2228 if (Opc == ISD::SHL) {
2229 SDOperand T1 = DAG.getNode(ISD::OR, NVT,// T1 = (Hi << Amt) | (Lo >> NAmt)
2230 DAG.getNode(ISD::SHL, NVT, InH, ShAmt),
2231 DAG.getNode(ISD::SRL, NVT, InL, NAmt));
2232 SDOperand T2 = DAG.getNode(ISD::SHL, NVT, InL, ShAmt); // T2 = Lo << Amt&31
2234 Hi = DAG.getNode(ISD::SELECT, NVT, Cond, T2, T1);
2235 Lo = DAG.getNode(ISD::SELECT, NVT, Cond, DAG.getConstant(0, NVT), T2);
2237 SDOperand HiLoPart = DAG.getNode(ISD::SELECT, NVT,
2238 DAG.getSetCC(ISD::SETEQ,
2239 TLI.getSetCCResultTy(), NAmt,
2240 DAG.getConstant(32, ShTy)),
2241 DAG.getConstant(0, NVT),
2242 DAG.getNode(ISD::SHL, NVT, InH, NAmt));
2243 SDOperand T1 = DAG.getNode(ISD::OR, NVT,// T1 = (Hi << NAmt) | (Lo >> Amt)
2245 DAG.getNode(ISD::SRL, NVT, InL, ShAmt));
2246 SDOperand T2 = DAG.getNode(Opc, NVT, InH, ShAmt); // T2 = InH >> ShAmt&31
2249 if (Opc == ISD::SRA)
2250 HiPart = DAG.getNode(ISD::SRA, NVT, InH,
2251 DAG.getConstant(NVTBits-1, ShTy));
2253 HiPart = DAG.getConstant(0, NVT);
2254 Lo = DAG.getNode(ISD::SELECT, NVT, Cond, T2, T1);
2255 Hi = DAG.getNode(ISD::SELECT, NVT, Cond, HiPart, T2);
2260 /// FindLatestCallSeqStart - Scan up the dag to find the latest (highest
2261 /// NodeDepth) node that is an CallSeqStart operation and occurs later than
2263 static void FindLatestCallSeqStart(SDNode *Node, SDNode *&Found) {
2264 if (Node->getNodeDepth() <= Found->getNodeDepth()) return;
2266 // If we found an CALLSEQ_START, we already know this node occurs later
2267 // than the Found node. Just remember this node and return.
2268 if (Node->getOpcode() == ISD::CALLSEQ_START) {
2273 // Otherwise, scan the operands of Node to see if any of them is a call.
2274 assert(Node->getNumOperands() != 0 &&
2275 "All leaves should have depth equal to the entry node!");
2276 for (unsigned i = 0, e = Node->getNumOperands()-1; i != e; ++i)
2277 FindLatestCallSeqStart(Node->getOperand(i).Val, Found);
2279 // Tail recurse for the last iteration.
2280 FindLatestCallSeqStart(Node->getOperand(Node->getNumOperands()-1).Val,
2285 /// FindEarliestCallSeqEnd - Scan down the dag to find the earliest (lowest
2286 /// NodeDepth) node that is an CallSeqEnd operation and occurs more recent
2288 static void FindEarliestCallSeqEnd(SDNode *Node, SDNode *&Found) {
2289 if (Found && Node->getNodeDepth() >= Found->getNodeDepth()) return;
2291 // If we found an CALLSEQ_END, we already know this node occurs earlier
2292 // than the Found node. Just remember this node and return.
2293 if (Node->getOpcode() == ISD::CALLSEQ_END) {
2298 // Otherwise, scan the operands of Node to see if any of them is a call.
2299 SDNode::use_iterator UI = Node->use_begin(), E = Node->use_end();
2300 if (UI == E) return;
2301 for (--E; UI != E; ++UI)
2302 FindEarliestCallSeqEnd(*UI, Found);
2304 // Tail recurse for the last iteration.
2305 FindEarliestCallSeqEnd(*UI, Found);
2308 /// FindCallSeqEnd - Given a chained node that is part of a call sequence,
2309 /// find the CALLSEQ_END node that terminates the call sequence.
2310 static SDNode *FindCallSeqEnd(SDNode *Node) {
2311 if (Node->getOpcode() == ISD::CALLSEQ_END)
2313 if (Node->use_empty())
2314 return 0; // No CallSeqEnd
2316 if (Node->hasOneUse()) // Simple case, only has one user to check.
2317 return FindCallSeqEnd(*Node->use_begin());
2319 SDOperand TheChain(Node, Node->getNumValues()-1);
2320 if (TheChain.getValueType() != MVT::Other)
2321 TheChain = SDOperand(Node, 0);
2322 assert(TheChain.getValueType() == MVT::Other && "Is not a token chain!");
2324 for (SDNode::use_iterator UI = Node->use_begin(),
2325 E = Node->use_end(); ; ++UI) {
2326 assert(UI != E && "Didn't find a user of the tokchain, no CALLSEQ_END!");
2328 // Make sure to only follow users of our token chain.
2330 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
2331 if (User->getOperand(i) == TheChain)
2332 if (SDNode *Result = FindCallSeqEnd(User))
2335 assert(0 && "Unreachable");
2339 /// FindCallSeqStart - Given a chained node that is part of a call sequence,
2340 /// find the CALLSEQ_START node that initiates the call sequence.
2341 static SDNode *FindCallSeqStart(SDNode *Node) {
2342 assert(Node && "Didn't find callseq_start for a call??");
2343 if (Node->getOpcode() == ISD::CALLSEQ_START) return Node;
2345 assert(Node->getOperand(0).getValueType() == MVT::Other &&
2346 "Node doesn't have a token chain argument!");
2347 return FindCallSeqStart(Node->getOperand(0).Val);
2351 /// FindInputOutputChains - If we are replacing an operation with a call we need
2352 /// to find the call that occurs before and the call that occurs after it to
2353 /// properly serialize the calls in the block. The returned operand is the
2354 /// input chain value for the new call (e.g. the entry node or the previous
2355 /// call), and OutChain is set to be the chain node to update to point to the
2356 /// end of the call chain.
2357 static SDOperand FindInputOutputChains(SDNode *OpNode, SDNode *&OutChain,
2359 SDNode *LatestCallSeqStart = Entry.Val;
2360 SDNode *LatestCallSeqEnd = 0;
2361 FindLatestCallSeqStart(OpNode, LatestCallSeqStart);
2362 //std::cerr<<"Found node: "; LatestCallSeqStart->dump(); std::cerr <<"\n";
2364 // It is possible that no ISD::CALLSEQ_START was found because there is no
2365 // previous call in the function. LatestCallStackDown may in that case be
2366 // the entry node itself. Do not attempt to find a matching CALLSEQ_END
2367 // unless LatestCallStackDown is an CALLSEQ_START.
2368 if (LatestCallSeqStart->getOpcode() == ISD::CALLSEQ_START)
2369 LatestCallSeqEnd = FindCallSeqEnd(LatestCallSeqStart);
2371 LatestCallSeqEnd = Entry.Val;
2372 assert(LatestCallSeqEnd && "NULL return from FindCallSeqEnd");
2374 // Finally, find the first call that this must come before, first we find the
2375 // CallSeqEnd that ends the call.
2377 FindEarliestCallSeqEnd(OpNode, OutChain);
2379 // If we found one, translate from the adj up to the callseq_start.
2381 OutChain = FindCallSeqStart(OutChain);
2383 return SDOperand(LatestCallSeqEnd, 0);
2386 /// SpliceCallInto - Given the result chain of a libcall (CallResult), and a
2387 void SelectionDAGLegalize::SpliceCallInto(const SDOperand &CallResult,
2389 // Nothing to splice it into?
2390 if (OutChain == 0) return;
2392 assert(OutChain->getOperand(0).getValueType() == MVT::Other);
2395 // Form a token factor node merging the old inval and the new inval.
2396 SDOperand InToken = DAG.getNode(ISD::TokenFactor, MVT::Other, CallResult,
2397 OutChain->getOperand(0));
2398 // Change the node to refer to the new token.
2399 OutChain->setAdjCallChain(InToken);
2403 // ExpandLibCall - Expand a node into a call to a libcall. If the result value
2404 // does not fit into a register, return the lo part and set the hi part to the
2405 // by-reg argument. If it does fit into a single register, return the result
2406 // and leave the Hi part unset.
2407 SDOperand SelectionDAGLegalize::ExpandLibCall(const char *Name, SDNode *Node,
2410 SDOperand InChain = FindInputOutputChains(Node, OutChain,
2411 DAG.getEntryNode());
2412 if (InChain.Val == 0)
2413 InChain = DAG.getEntryNode();
2415 TargetLowering::ArgListTy Args;
2416 for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
2417 MVT::ValueType ArgVT = Node->getOperand(i).getValueType();
2418 const Type *ArgTy = MVT::getTypeForValueType(ArgVT);
2419 Args.push_back(std::make_pair(Node->getOperand(i), ArgTy));
2421 SDOperand Callee = DAG.getExternalSymbol(Name, TLI.getPointerTy());
2423 // Splice the libcall in wherever FindInputOutputChains tells us to.
2424 const Type *RetTy = MVT::getTypeForValueType(Node->getValueType(0));
2425 std::pair<SDOperand,SDOperand> CallInfo =
2426 TLI.LowerCallTo(InChain, RetTy, false, CallingConv::C, false,
2428 SpliceCallInto(CallInfo.second, OutChain);
2430 NeedsAnotherIteration = true;
2432 switch (getTypeAction(CallInfo.first.getValueType())) {
2433 default: assert(0 && "Unknown thing");
2435 return CallInfo.first;
2437 assert(0 && "Cannot promote this yet!");
2440 ExpandOp(CallInfo.first, Lo, Hi);
2446 /// ExpandIntToFP - Expand a [US]INT_TO_FP operation, assuming that the
2447 /// destination type is legal.
2448 SDOperand SelectionDAGLegalize::
2449 ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) {
2450 assert(getTypeAction(DestTy) == Legal && "Destination type is not legal!");
2451 assert(getTypeAction(Source.getValueType()) == Expand &&
2452 "This is not an expansion!");
2453 assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!");
2456 assert(Source.getValueType() == MVT::i64 &&
2457 "This only works for 64-bit -> FP");
2458 // The 64-bit value loaded will be incorrectly if the 'sign bit' of the
2459 // incoming integer is set. To handle this, we dynamically test to see if
2460 // it is set, and, if so, add a fudge factor.
2462 ExpandOp(Source, Lo, Hi);
2464 // If this is unsigned, and not supported, first perform the conversion to
2465 // signed, then adjust the result if the sign bit is set.
2466 SDOperand SignedConv = ExpandIntToFP(true, DestTy,
2467 DAG.getNode(ISD::BUILD_PAIR, Source.getValueType(), Lo, Hi));
2469 SDOperand SignSet = DAG.getSetCC(ISD::SETLT, TLI.getSetCCResultTy(), Hi,
2470 DAG.getConstant(0, Hi.getValueType()));
2471 SDOperand Zero = getIntPtrConstant(0), Four = getIntPtrConstant(4);
2472 SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(),
2473 SignSet, Four, Zero);
2474 uint64_t FF = 0x5f800000ULL;
2475 if (TLI.isLittleEndian()) FF <<= 32;
2476 static Constant *FudgeFactor = ConstantUInt::get(Type::ULongTy, FF);
2478 MachineConstantPool *CP = DAG.getMachineFunction().getConstantPool();
2479 SDOperand CPIdx = DAG.getConstantPool(CP->getConstantPoolIndex(FudgeFactor),
2480 TLI.getPointerTy());
2481 CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
2482 SDOperand FudgeInReg;
2483 if (DestTy == MVT::f32)
2484 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
2485 DAG.getSrcValue(NULL));
2487 assert(DestTy == MVT::f64 && "Unexpected conversion");
2488 FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(),
2489 CPIdx, DAG.getSrcValue(NULL), MVT::f32);
2491 return DAG.getNode(ISD::ADD, DestTy, SignedConv, FudgeInReg);
2494 // Check to see if the target has a custom way to lower this. If so, use it.
2495 switch (TLI.getOperationAction(ISD::SINT_TO_FP, Source.getValueType())) {
2496 default: assert(0 && "This action not implemented for this operation!");
2497 case TargetLowering::Legal:
2498 case TargetLowering::Expand:
2499 break; // This case is handled below.
2500 case TargetLowering::Custom:
2501 Source = DAG.getNode(ISD::SINT_TO_FP, DestTy, Source);
2502 return LegalizeOp(TLI.LowerOperation(Source, DAG));
2505 // Expand the source, then glue it back together for the call. We must expand
2506 // the source in case it is shared (this pass of legalize must traverse it).
2507 SDOperand SrcLo, SrcHi;
2508 ExpandOp(Source, SrcLo, SrcHi);
2509 Source = DAG.getNode(ISD::BUILD_PAIR, Source.getValueType(), SrcLo, SrcHi);
2511 SDNode *OutChain = 0;
2512 SDOperand InChain = FindInputOutputChains(Source.Val, OutChain,
2513 DAG.getEntryNode());
2514 const char *FnName = 0;
2515 if (DestTy == MVT::f32)
2516 FnName = "__floatdisf";
2518 assert(DestTy == MVT::f64 && "Unknown fp value type!");
2519 FnName = "__floatdidf";
2522 SDOperand Callee = DAG.getExternalSymbol(FnName, TLI.getPointerTy());
2524 TargetLowering::ArgListTy Args;
2525 const Type *ArgTy = MVT::getTypeForValueType(Source.getValueType());
2527 Args.push_back(std::make_pair(Source, ArgTy));
2529 // We don't care about token chains for libcalls. We just use the entry
2530 // node as our input and ignore the output chain. This allows us to place
2531 // calls wherever we need them to satisfy data dependences.
2532 const Type *RetTy = MVT::getTypeForValueType(DestTy);
2534 std::pair<SDOperand,SDOperand> CallResult =
2535 TLI.LowerCallTo(InChain, RetTy, false, CallingConv::C, true,
2538 SpliceCallInto(CallResult.second, OutChain);
2539 return CallResult.first;
2544 /// ExpandOp - Expand the specified SDOperand into its two component pieces
2545 /// Lo&Hi. Note that the Op MUST be an expanded type. As a result of this, the
2546 /// LegalizeNodes map is filled in for any results that are not expanded, the
2547 /// ExpandedNodes map is filled in for any results that are expanded, and the
2548 /// Lo/Hi values are returned.
2549 void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
2550 MVT::ValueType VT = Op.getValueType();
2551 MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
2552 SDNode *Node = Op.Val;
2553 assert(getTypeAction(VT) == Expand && "Not an expanded type!");
2554 assert(MVT::isInteger(VT) && "Cannot expand FP values!");
2555 assert(MVT::isInteger(NVT) && NVT < VT &&
2556 "Cannot expand to FP value or to larger int value!");
2558 // If there is more than one use of this, see if we already expanded it.
2559 // There is no use remembering values that only have a single use, as the map
2560 // entries will never be reused.
2561 if (!Node->hasOneUse()) {
2562 std::map<SDOperand, std::pair<SDOperand, SDOperand> >::iterator I
2563 = ExpandedNodes.find(Op);
2564 if (I != ExpandedNodes.end()) {
2565 Lo = I->second.first;
2566 Hi = I->second.second;
2570 assert(!ExpandedNodes.count(Op) && "Re-expanding a node!");
2573 // Expanding to multiple registers needs to perform an optimization step, and
2574 // is not careful to avoid operations the target does not support. Make sure
2575 // that all generated operations are legalized in the next iteration.
2576 NeedsAnotherIteration = true;
2578 switch (Node->getOpcode()) {
2580 std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
2581 assert(0 && "Do not know how to expand this operator!");
2584 Lo = DAG.getNode(ISD::UNDEF, NVT);
2585 Hi = DAG.getNode(ISD::UNDEF, NVT);
2587 case ISD::Constant: {
2588 uint64_t Cst = cast<ConstantSDNode>(Node)->getValue();
2589 Lo = DAG.getConstant(Cst, NVT);
2590 Hi = DAG.getConstant(Cst >> MVT::getSizeInBits(NVT), NVT);
2594 case ISD::CopyFromReg: {
2595 unsigned Reg = cast<RegSDNode>(Node)->getReg();
2596 // Aggregate register values are always in consequtive pairs.
2597 Lo = DAG.getCopyFromReg(Reg, NVT, Node->getOperand(0));
2598 Hi = DAG.getCopyFromReg(Reg+1, NVT, Lo.getValue(1));
2600 // Remember that we legalized the chain.
2601 AddLegalizedOperand(Op.getValue(1), Hi.getValue(1));
2603 assert(isTypeLegal(NVT) && "Cannot expand this multiple times yet!");
2607 case ISD::BUILD_PAIR:
2608 // Legalize both operands. FIXME: in the future we should handle the case
2609 // where the two elements are not legal.
2610 assert(isTypeLegal(NVT) && "Cannot expand this multiple times yet!");
2611 Lo = LegalizeOp(Node->getOperand(0));
2612 Hi = LegalizeOp(Node->getOperand(1));
2616 ExpandOp(Node->getOperand(0), Lo, Hi);
2617 Lo = DAG.getNode(ISD::ADD, NVT, // ctpop(HL) -> ctpop(H)+ctpop(L)
2618 DAG.getNode(ISD::CTPOP, NVT, Lo),
2619 DAG.getNode(ISD::CTPOP, NVT, Hi));
2620 Hi = DAG.getConstant(0, NVT);
2624 // ctlz (HL) -> ctlz(H) != 32 ? ctlz(H) : (ctlz(L)+32)
2625 ExpandOp(Node->getOperand(0), Lo, Hi);
2626 SDOperand BitsC = DAG.getConstant(MVT::getSizeInBits(NVT), NVT);
2627 SDOperand HLZ = DAG.getNode(ISD::CTLZ, NVT, Hi);
2628 SDOperand TopNotZero = DAG.getSetCC(ISD::SETNE, TLI.getSetCCResultTy(),
2630 SDOperand LowPart = DAG.getNode(ISD::CTLZ, NVT, Lo);
2631 LowPart = DAG.getNode(ISD::ADD, NVT, LowPart, BitsC);
2633 Lo = DAG.getNode(ISD::SELECT, NVT, TopNotZero, HLZ, LowPart);
2634 Hi = DAG.getConstant(0, NVT);
2639 // cttz (HL) -> cttz(L) != 32 ? cttz(L) : (cttz(H)+32)
2640 ExpandOp(Node->getOperand(0), Lo, Hi);
2641 SDOperand BitsC = DAG.getConstant(MVT::getSizeInBits(NVT), NVT);
2642 SDOperand LTZ = DAG.getNode(ISD::CTTZ, NVT, Lo);
2643 SDOperand BotNotZero = DAG.getSetCC(ISD::SETNE, TLI.getSetCCResultTy(),
2645 SDOperand HiPart = DAG.getNode(ISD::CTTZ, NVT, Hi);
2646 HiPart = DAG.getNode(ISD::ADD, NVT, HiPart, BitsC);
2648 Lo = DAG.getNode(ISD::SELECT, NVT, BotNotZero, LTZ, HiPart);
2649 Hi = DAG.getConstant(0, NVT);
2654 SDOperand Ch = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
2655 SDOperand Ptr = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
2656 Lo = DAG.getLoad(NVT, Ch, Ptr, Node->getOperand(2));
2658 // Increment the pointer to the other half.
2659 unsigned IncrementSize = MVT::getSizeInBits(Lo.getValueType())/8;
2660 Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
2661 getIntPtrConstant(IncrementSize));
2662 //Is this safe? declaring that the two parts of the split load
2663 //are from the same instruction?
2664 Hi = DAG.getLoad(NVT, Ch, Ptr, Node->getOperand(2));
2666 // Build a factor node to remember that this load is independent of the
2668 SDOperand TF = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo.getValue(1),
2671 // Remember that we legalized the chain.
2672 AddLegalizedOperand(Op.getValue(1), TF);
2673 if (!TLI.isLittleEndian())
2679 SDOperand Chain = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
2680 SDOperand Callee = LegalizeOp(Node->getOperand(1)); // Legalize the callee.
2682 bool Changed = false;
2683 std::vector<SDOperand> Ops;
2684 for (unsigned i = 2, e = Node->getNumOperands(); i != e; ++i) {
2685 Ops.push_back(LegalizeOp(Node->getOperand(i)));
2686 Changed |= Ops.back() != Node->getOperand(i);
2689 assert(Node->getNumValues() == 2 && Op.ResNo == 0 &&
2690 "Can only expand a call once so far, not i64 -> i16!");
2692 std::vector<MVT::ValueType> RetTyVTs;
2693 RetTyVTs.reserve(3);
2694 RetTyVTs.push_back(NVT);
2695 RetTyVTs.push_back(NVT);
2696 RetTyVTs.push_back(MVT::Other);
2697 SDNode *NC = DAG.getCall(RetTyVTs, Chain, Callee, Ops,
2698 Node->getOpcode() == ISD::TAILCALL);
2699 Lo = SDOperand(NC, 0);
2700 Hi = SDOperand(NC, 1);
2702 // Insert the new chain mapping.
2703 AddLegalizedOperand(Op.getValue(1), Hi.getValue(2));
2708 case ISD::XOR: { // Simple logical operators -> two trivial pieces.
2709 SDOperand LL, LH, RL, RH;
2710 ExpandOp(Node->getOperand(0), LL, LH);
2711 ExpandOp(Node->getOperand(1), RL, RH);
2712 Lo = DAG.getNode(Node->getOpcode(), NVT, LL, RL);
2713 Hi = DAG.getNode(Node->getOpcode(), NVT, LH, RH);
2717 SDOperand C, LL, LH, RL, RH;
2719 switch (getTypeAction(Node->getOperand(0).getValueType())) {
2720 case Expand: assert(0 && "It's impossible to expand bools");
2722 C = LegalizeOp(Node->getOperand(0)); // Legalize the condition.
2725 C = PromoteOp(Node->getOperand(0)); // Promote the condition.
2728 ExpandOp(Node->getOperand(1), LL, LH);
2729 ExpandOp(Node->getOperand(2), RL, RH);
2730 Lo = DAG.getNode(ISD::SELECT, NVT, C, LL, RL);
2731 Hi = DAG.getNode(ISD::SELECT, NVT, C, LH, RH);
2734 case ISD::SIGN_EXTEND: {
2736 switch (getTypeAction(Node->getOperand(0).getValueType())) {
2737 case Expand: assert(0 && "expand-expand not implemented yet!");
2738 case Legal: In = LegalizeOp(Node->getOperand(0)); break;
2740 In = PromoteOp(Node->getOperand(0));
2741 // Emit the appropriate sign_extend_inreg to get the value we want.
2742 In = DAG.getNode(ISD::SIGN_EXTEND_INREG, In.getValueType(), In,
2743 DAG.getValueType(Node->getOperand(0).getValueType()));
2747 // The low part is just a sign extension of the input (which degenerates to
2749 Lo = DAG.getNode(ISD::SIGN_EXTEND, NVT, In);
2751 // The high part is obtained by SRA'ing all but one of the bits of the lo
2753 unsigned LoSize = MVT::getSizeInBits(Lo.getValueType());
2754 Hi = DAG.getNode(ISD::SRA, NVT, Lo, DAG.getConstant(LoSize-1,
2755 TLI.getShiftAmountTy()));
2758 case ISD::ZERO_EXTEND: {
2760 switch (getTypeAction(Node->getOperand(0).getValueType())) {
2761 case Expand: assert(0 && "expand-expand not implemented yet!");
2762 case Legal: In = LegalizeOp(Node->getOperand(0)); break;
2764 In = PromoteOp(Node->getOperand(0));
2765 // Emit the appropriate zero_extend_inreg to get the value we want.
2766 In = DAG.getZeroExtendInReg(In, Node->getOperand(0).getValueType());
2770 // The low part is just a zero extension of the input (which degenerates to
2772 Lo = DAG.getNode(ISD::ZERO_EXTEND, NVT, In);
2774 // The high part is just a zero.
2775 Hi = DAG.getConstant(0, NVT);
2778 // These operators cannot be expanded directly, emit them as calls to
2779 // library functions.
2780 case ISD::FP_TO_SINT:
2781 if (TLI.getOperationAction(ISD::FP_TO_SINT, VT) == TargetLowering::Custom) {
2783 switch (getTypeAction(Node->getOperand(0).getValueType())) {
2784 case Expand: assert(0 && "cannot expand FP!");
2785 case Legal: Op = LegalizeOp(Node->getOperand(0)); break;
2786 case Promote: Op = PromoteOp(Node->getOperand(0)); break;
2789 Op = TLI.LowerOperation(DAG.getNode(ISD::FP_TO_SINT, VT, Op), DAG);
2791 // Now that the custom expander is done, expand the result, which is still
2793 ExpandOp(Op, Lo, Hi);
2797 if (Node->getOperand(0).getValueType() == MVT::f32)
2798 Lo = ExpandLibCall("__fixsfdi", Node, Hi);
2800 Lo = ExpandLibCall("__fixdfdi", Node, Hi);
2803 case ISD::FP_TO_UINT:
2804 if (TLI.getOperationAction(ISD::FP_TO_UINT, VT) == TargetLowering::Custom) {
2805 SDOperand Op = DAG.getNode(ISD::FP_TO_UINT, VT,
2806 LegalizeOp(Node->getOperand(0)));
2807 // Now that the custom expander is done, expand the result, which is still
2809 ExpandOp(TLI.LowerOperation(Op, DAG), Lo, Hi);
2813 if (Node->getOperand(0).getValueType() == MVT::f32)
2814 Lo = ExpandLibCall("__fixunssfdi", Node, Hi);
2816 Lo = ExpandLibCall("__fixunsdfdi", Node, Hi);
2820 // If we can emit an efficient shift operation, do so now.
2821 if (ExpandShift(ISD::SHL, Node->getOperand(0), Node->getOperand(1), Lo, Hi))
2824 // If this target supports SHL_PARTS, use it.
2825 if (TLI.getOperationAction(ISD::SHL_PARTS, NVT) == TargetLowering::Legal) {
2826 ExpandShiftParts(ISD::SHL_PARTS, Node->getOperand(0), Node->getOperand(1),
2831 // Otherwise, emit a libcall.
2832 Lo = ExpandLibCall("__ashldi3", Node, Hi);
2836 // If we can emit an efficient shift operation, do so now.
2837 if (ExpandShift(ISD::SRA, Node->getOperand(0), Node->getOperand(1), Lo, Hi))
2840 // If this target supports SRA_PARTS, use it.
2841 if (TLI.getOperationAction(ISD::SRA_PARTS, NVT) == TargetLowering::Legal) {
2842 ExpandShiftParts(ISD::SRA_PARTS, Node->getOperand(0), Node->getOperand(1),
2847 // Otherwise, emit a libcall.
2848 Lo = ExpandLibCall("__ashrdi3", Node, Hi);
2851 // If we can emit an efficient shift operation, do so now.
2852 if (ExpandShift(ISD::SRL, Node->getOperand(0), Node->getOperand(1), Lo, Hi))
2855 // If this target supports SRL_PARTS, use it.
2856 if (TLI.getOperationAction(ISD::SRL_PARTS, NVT) == TargetLowering::Legal) {
2857 ExpandShiftParts(ISD::SRL_PARTS, Node->getOperand(0), Node->getOperand(1),
2862 // Otherwise, emit a libcall.
2863 Lo = ExpandLibCall("__lshrdi3", Node, Hi);
2867 ExpandByParts(ISD::ADD_PARTS, Node->getOperand(0), Node->getOperand(1),
2871 ExpandByParts(ISD::SUB_PARTS, Node->getOperand(0), Node->getOperand(1),
2875 if (TLI.getOperationAction(ISD::MULHU, NVT) == TargetLowering::Legal) {
2876 SDOperand LL, LH, RL, RH;
2877 ExpandOp(Node->getOperand(0), LL, LH);
2878 ExpandOp(Node->getOperand(1), RL, RH);
2879 Hi = DAG.getNode(ISD::MULHU, NVT, LL, RL);
2880 RH = DAG.getNode(ISD::MUL, NVT, LL, RH);
2881 LH = DAG.getNode(ISD::MUL, NVT, LH, RL);
2882 Hi = DAG.getNode(ISD::ADD, NVT, Hi, RH);
2883 Hi = DAG.getNode(ISD::ADD, NVT, Hi, LH);
2884 Lo = DAG.getNode(ISD::MUL, NVT, LL, RL);
2886 Lo = ExpandLibCall("__muldi3" , Node, Hi); break;
2890 case ISD::SDIV: Lo = ExpandLibCall("__divdi3" , Node, Hi); break;
2891 case ISD::UDIV: Lo = ExpandLibCall("__udivdi3", Node, Hi); break;
2892 case ISD::SREM: Lo = ExpandLibCall("__moddi3" , Node, Hi); break;
2893 case ISD::UREM: Lo = ExpandLibCall("__umoddi3", Node, Hi); break;
2896 // Remember in a map if the values will be reused later.
2897 if (!Node->hasOneUse()) {
2898 bool isNew = ExpandedNodes.insert(std::make_pair(Op,
2899 std::make_pair(Lo, Hi))).second;
2900 assert(isNew && "Value already expanded?!?");
2905 // SelectionDAG::Legalize - This is the entry point for the file.
2907 void SelectionDAG::Legalize() {
2908 /// run - This is the main entry point to this class.
2910 SelectionDAGLegalize(*this).Run();