1 //===-- DAGCombiner.cpp - Implement a trivial DAG combiner ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Nate Begeman and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass combines dag nodes to form fewer, simpler DAG nodes. It can be run
11 // both before and after the DAG is legalized.
13 // FIXME: Missing folds
14 // sdiv, udiv, srem, urem (X, const) where X is an integer can be expanded into
15 // a sequence of multiplies, shifts, and adds. This should be controlled by
16 // some kind of hint from the target that int div is expensive.
17 // various folds of mulh[s,u] by constants such as -1, powers of 2, etc.
19 // FIXME: Should add a corresponding version of fold AND with
20 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which
23 // FIXME: mul (x, const) -> shifts + adds
25 // FIXME: undef values
27 // FIXME: zero extend when top bits are 0 -> drop it ?
29 //===----------------------------------------------------------------------===//
31 #define DEBUG_TYPE "dagcombine"
32 #include "llvm/ADT/Statistic.h"
33 #include "llvm/CodeGen/SelectionDAG.h"
34 #include "llvm/Support/MathExtras.h"
35 #include "llvm/Target/TargetLowering.h"
40 Statistic<> NodesCombined ("dagcombiner", "Number of dag nodes combined");
46 // Worklist of all of the nodes that need to be simplified.
47 std::vector<SDNode*> WorkList;
49 /// AddUsersToWorkList - When an instruction is simplified, add all users of
50 /// the instruction to the work lists because they might get more simplified
53 void AddUsersToWorkList(SDNode *N) {
54 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
57 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
58 WorkList.push_back(U->getOperand(i).Val);
62 /// removeFromWorkList - remove all instances of N from the worklist.
63 void removeFromWorkList(SDNode *N) {
64 WorkList.erase(std::remove(WorkList.begin(), WorkList.end(), N),
68 /// visit - call the node-specific routine that knows how to fold each
69 /// particular type of node.
70 SDNode *visit(SDNode *N);
72 // Visitation implementation - Implement dag node combining for different
73 // node types. The semantics are as follows:
75 // null - No change was made
76 // otherwise - Node N should be replaced by the returned node.
78 SDNode *visitTokenFactor(SDNode *N);
79 SDNode *visitAdd(SDNode *N);
80 SDNode *visitSub(SDNode *N);
81 SDNode *visitMul(SDNode *N);
82 SDNode *visitSdiv(SDNode *N);
83 SDNode *visitUdiv(SDNode *N);
84 SDNode *visitSrem(SDNode *N);
85 SDNode *visitUrem(SDNode *N);
86 SDNode *visitMulHiU(SDNode *N);
87 SDNode *visitMulHiS(SDNode *N);
88 SDNode *visitAnd(SDNode *N);
89 SDNode *visitOr(SDNode *N);
90 SDNode *visitXor(SDNode *N);
91 SDNode *visitShl(SDNode *N);
92 SDNode *visitSra(SDNode *N);
93 SDNode *visitSrl(SDNode *N);
94 SDNode *visitCtlz(SDNode *N);
95 SDNode *visitCttz(SDNode *N);
96 SDNode *visitCtpop(SDNode *N);
100 SDNode *visitSignExtend(SDNode *N);
101 SDNode *visitZeroExtend(SDNode *N);
102 SDNode *visitSignExtendInReg(SDNode *N);
103 SDNode *visitTruncate(SDNode *N);
104 SDNode *visitSintToFP(SDNode *N);
105 SDNode *visitUintToFP(SDNode *N);
106 SDNode *visitFPToSint(SDNode *N);
107 SDNode *visitFPToUint(SDNode *N);
108 SDNode *visitFPRound(SDNode *N);
109 SDNode *visitFPRoundInReg(SDNode *N);
110 SDNode *visitFPExtend(SDNode *N);
111 SDNode *visitFneg(SDNode *N);
112 SDNode *visitFabs(SDNode *N);
113 SDNode *visitExtLoad(SDNode *N);
114 SDNode *visitSextLoad(SDNode *N);
115 SDNode *visitZextLoad(SDNode *N);
116 SDNode *visitTruncStore(SDNode *N);
122 DAGCombiner(SelectionDAG &D)
123 : DAG(D), TLI(D.getTargetLoweringInfo()) {
124 // Add all the dag nodes to the worklist.
125 WorkList.insert(WorkList.end(), D.allnodes_begin(), D.allnodes_end());
128 /// Run - runs the dag combiner on all nodes in the work list
129 void Run(bool AfterLegalize);
133 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
134 /// this predicate to simplify operations downstream. V and Mask are known to
135 /// be the same type.
136 static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask,
137 const TargetLowering &TLI) {
139 if (Mask == 0) return true;
141 // If we know the result of a setcc has the top bits zero, use this info.
142 switch (Op.getOpcode()) {
144 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0;
147 return ((Mask & 1) == 0) &&
148 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult;
151 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(3))->getVT());
152 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
153 case ISD::ZERO_EXTEND:
154 case ISD::AssertZext:
155 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType());
156 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI);
159 // (X & C1) & C2 == 0 iff C1 & C2 == 0.
160 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
161 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI);
166 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) &&
167 MaskedValueIsZero(Op.getOperand(1), Mask, TLI);
169 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) &&
170 MaskedValueIsZero(Op.getOperand(2), Mask, TLI);
172 return MaskedValueIsZero(Op.getOperand(2), Mask, TLI) &&
173 MaskedValueIsZero(Op.getOperand(3), Mask, TLI);
175 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0
176 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
177 uint64_t NewVal = Mask << ShAmt->getValue();
178 SrcBits = MVT::getSizeInBits(Op.getValueType());
179 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1;
180 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
184 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0
185 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
186 uint64_t NewVal = Mask >> ShAmt->getValue();
187 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
193 // Bit counting instructions can not set the high bits of the result
194 // register. The max number of bits sets depends on the input.
195 return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0;
197 // TODO we could handle some SRA cases here.
204 // isInvertibleForFree - Return true if there is no cost to emitting the logical
205 // inverse of this node.
206 static bool isInvertibleForFree(SDOperand N) {
207 if (isa<ConstantSDNode>(N.Val)) return true;
208 if (N.Val->getOpcode() == ISD::SETCC && N.Val->hasOneUse())
213 // isSetCCEquivalent - Return true if this node is a select_cc that selects
214 // between the values 1 and 0, making it equivalent to a setcc.
215 static bool isSetCCEquivalent(SDOperand N) {
216 if (N.getOpcode() == ISD::SELECT_CC &&
217 N.getOperand(2).getOpcode() == ISD::Constant &&
218 N.getOperand(3).getOpcode() == ISD::Constant &&
219 cast<ConstantSDNode>(N.getOperand(2))->getValue() == 1 &&
220 cast<ConstantSDNode>(N.getOperand(3))->isNullValue())
225 void DAGCombiner::Run(bool AfterLegalize) {
226 // while the worklist isn't empty, inspect the node on the end of it and
227 // try and combine it.
228 while (!WorkList.empty()) {
229 SDNode *N = WorkList.back();
232 // If N has no uses, it is dead. Make sure to revisit all N's operands once
233 // N is deleted from the DAG, since they too may now be dead.
234 if (N->use_empty()) {
235 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
236 WorkList.push_back(N->getOperand(i).Val);
239 removeFromWorkList(N);
243 if (SDNode *Result = visit(N)) {
245 assert(Result != N && "Modifying DAG nodes in place is illegal!");
247 std::cerr << "DC: Old = "; N->dump();
248 std::cerr << " New = "; Result->dump();
250 DAG.ReplaceAllUsesWith(N, Result);
252 // Push the new node and any users onto the worklist
253 WorkList.push_back(Result);
254 AddUsersToWorkList(Result);
256 // Nodes can end up on the worklist more than once. Make sure we do
257 // not process a node that has been replaced.
258 removeFromWorkList(N);
263 SDNode *DAGCombiner::visit(SDNode *N) {
264 switch(N->getOpcode()) {
266 case ISD::TokenFactor:
267 return visitTokenFactor(N);
282 case ISD::SIGN_EXTEND:
283 return visitSignExtend(N);
284 case ISD::ZERO_EXTEND:
285 return visitZeroExtend(N);
292 SDNode *DAGCombiner::visitTokenFactor(SDNode *N) {
293 // If the token factor only has one operand, fold TF(x) -> x
294 if (N->getNumOperands() == 1)
295 return N->getOperand(0).Val;
297 // If the token factor has two operands and one is the entry token, replace
298 // the token factor with the other operand.
299 if (N->getNumOperands() == 2) {
300 if (N->getOperand(0).getOpcode() == ISD::EntryToken)
301 return N->getOperand(1).Val;
302 if (N->getOperand(1).getOpcode() == ISD::EntryToken)
303 return N->getOperand(0).Val;
308 SDNode *DAGCombiner::visitAdd(SDNode *N) {
309 SDOperand N0 = N->getOperand(0);
310 SDOperand N1 = N->getOperand(1);
311 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
312 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
313 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N0.Val);
314 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
316 // fold (add c1, c2) -> c1+c2
318 return DAG.getConstant(N1C->getValue() + N2C->getValue(),
319 N->getValueType(0)).Val;
320 // fold (add x, 0) -> x
321 if (N2C && N2C->isNullValue())
323 // fold floating point (add c1, c2) -> c1+c2
325 return DAG.getConstantFP(N1CFP->getValue() + N2CFP->getValue(),
326 N->getValueType(0)).Val;
327 // fold (A + (-B)) -> A-B
328 if (N1.getOpcode() == ISD::FNEG)
329 return DAG.getNode(ISD::SUB, N->getValueType(0), N0, N1.getOperand(0)).Val;
330 // fold ((-A) + B) -> B-A
331 if (N0.getOpcode() == ISD::FNEG)
332 return DAG.getNode(ISD::SUB, N->getValueType(0), N1, N0.getOperand(0)).Val;
333 // fold ((0-A) + B) -> B-A
334 if (N0.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N0.getOperand(0)) &&
335 cast<ConstantSDNode>(N0.getOperand(0))->isNullValue())
336 return DAG.getNode(ISD::SUB, N->getValueType(0), N1, N0.getOperand(1)).Val;
337 // fold (A + (0-B)) -> A-B
338 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) &&
339 cast<ConstantSDNode>(N1.getOperand(0))->isNullValue())
340 return DAG.getNode(ISD::SUB, N->getValueType(0), N0, N1.getOperand(1)).Val;
341 // fold (A+(B-A)) -> B for non-fp types
342 if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(1) &&
343 !MVT::isFloatingPoint(N1.getValueType()))
344 return N1.getOperand(0).Val;
348 SDNode *DAGCombiner::visitSub(SDNode *N) {
349 SDOperand N0 = N->getOperand(0);
350 SDOperand N1 = N->getOperand(1);
351 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
352 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
353 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N0.Val);
354 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
356 // fold (sub c1, c2) -> c1-c2
358 return DAG.getConstant(N1C->getValue() - N2C->getValue(),
359 N->getValueType(0)).Val;
360 // fold (sub x, 0) -> x
361 if (N2C && N2C->isNullValue())
363 // fold floating point (sub c1, c2) -> c1-c2
365 return DAG.getConstantFP(N1CFP->getValue() - N2CFP->getValue(),
366 N->getValueType(0)).Val;
368 if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N1 &&
369 !MVT::isFloatingPoint(N1.getValueType()))
370 return N0.getOperand(1).Val;
372 if (N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1 &&
373 !MVT::isFloatingPoint(N1.getValueType()))
374 return N0.getOperand(0).Val;
375 // fold (A-(-B)) -> A+B
376 if (N1.getOpcode() == ISD::FNEG)
377 return DAG.getNode(ISD::ADD, N0.getValueType(), N0, N1.getOperand(0)).Val;
381 SDNode *DAGCombiner::visitMul(SDNode *N) {
382 SDOperand N0 = N->getOperand(0);
383 SDOperand N1 = N->getOperand(1);
384 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
385 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
386 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N0.Val);
387 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
389 // fold (mul c1, c2) -> c1*c2
391 return DAG.getConstant(N1C->getValue() * N2C->getValue(),
392 N->getValueType(0)).Val;
393 // fold (mul x, 0) -> 0
394 if (N2C && N2C->isNullValue())
396 // fold (mul x, -1) -> 0-x
397 if (N2C && N2C->isAllOnesValue())
398 return DAG.getNode(ISD::SUB, N->getValueType(0),
399 DAG.getConstant(0, N->getValueType(0)), N0).Val;
400 // fold (mul x, (1 << c)) -> x << c
401 if (N2C && isPowerOf2_64(N2C->getValue()))
402 return DAG.getNode(ISD::SHL, N->getValueType(0), N0,
403 DAG.getConstant(Log2_64(N2C->getValue()),
404 TLI.getShiftAmountTy())).Val;
405 // fold floating point (mul c1, c2) -> c1*c2
407 return DAG.getConstantFP(N1CFP->getValue() * N2CFP->getValue(),
408 N->getValueType(0)).Val;
412 SDNode *DAGCombiner::visitSdiv(SDNode *N) {
413 SDOperand N0 = N->getOperand(0);
414 SDOperand N1 = N->getOperand(1);
415 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
416 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
417 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N0.Val);
418 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
420 // fold (sdiv c1, c2) -> c1/c2
422 return DAG.getConstant(N1C->getSignExtended() / N2C->getSignExtended(),
423 N->getValueType(0)).Val;
424 // fold floating point (sdiv c1, c2) -> c1/c2
426 return DAG.getConstantFP(N1CFP->getValue() / N2CFP->getValue(),
427 N->getValueType(0)).Val;
431 SDNode *DAGCombiner::visitUdiv(SDNode *N) {
432 SDOperand N0 = N->getOperand(0);
433 SDOperand N1 = N->getOperand(1);
434 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
435 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
437 // fold (udiv c1, c2) -> c1/c2
439 return DAG.getConstant(N1C->getValue() / N2C->getValue(),
440 N->getValueType(0)).Val;
441 // fold (udiv x, (1 << c)) -> x >>u c
442 if (N2C && isPowerOf2_64(N2C->getValue()))
443 return DAG.getNode(ISD::SRL, N->getValueType(0), N0,
444 DAG.getConstant(Log2_64(N2C->getValue()),
445 TLI.getShiftAmountTy())).Val;
449 SDNode *DAGCombiner::visitSrem(SDNode *N) {
450 SDOperand N0 = N->getOperand(0);
451 SDOperand N1 = N->getOperand(1);
452 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
453 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
454 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N0.Val);
455 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
457 // fold (srem c1, c2) -> c1%c2
459 return DAG.getConstant(N1C->getSignExtended() % N2C->getSignExtended(),
460 N->getValueType(0)).Val;
461 // fold floating point (srem c1, c2) -> fmod(c1, c2)
463 return DAG.getConstantFP(fmod(N1CFP->getValue(),N2CFP->getValue()),
464 N->getValueType(0)).Val;
468 SDNode *DAGCombiner::visitUrem(SDNode *N) {
469 SDOperand N0 = N->getOperand(0);
470 SDOperand N1 = N->getOperand(1);
471 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
472 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
474 // fold (urem c1, c2) -> c1%c2
476 return DAG.getConstant(N1C->getValue() % N2C->getValue(),
477 N->getValueType(0)).Val;
481 SDNode *DAGCombiner::visitMulHiS(SDNode *N) {
482 SDOperand N0 = N->getOperand(0);
483 SDOperand N1 = N->getOperand(1);
484 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
486 // fold (mulhs x, 0) -> 0
487 if (N2C && N2C->isNullValue())
490 // fold (mulhs x, 1) -> (sra x, size(x)-1)
491 if (N2C && N2C->getValue() == 1)
492 return DAG.getNode(ISD::SRA, N0.getValueType(), N0,
493 DAG.getConstant(MVT::getSizeInBits(N0.getValueType())-1,
494 TLI.getShiftAmountTy())).Val;
498 SDNode *DAGCombiner::visitMulHiU(SDNode *N) {
499 SDOperand N0 = N->getOperand(0);
500 SDOperand N1 = N->getOperand(1);
501 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
503 // fold (mulhu x, 0) -> 0
504 if (N2C && N2C->isNullValue())
507 // fold (mulhu x, 1) -> 0
508 if (N2C && N2C->getValue() == 1)
509 return DAG.getConstant(0, N0.getValueType()).Val;
513 SDNode *DAGCombiner::visitAnd(SDNode *N) {
514 SDOperand N0 = N->getOperand(0);
515 SDOperand N1 = N->getOperand(1);
516 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
517 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
518 MVT::ValueType VT = N1.getValueType();
520 // fold (and c1, c2) -> c1&c2
522 return DAG.getConstant(N1C->getValue() & N2C->getValue(), VT).Val;
523 // fold (and x, 0) -> 0
524 if (N2C && N2C->isNullValue())
526 // fold (and x, -1) -> x
527 if (N2C && N2C->isAllOnesValue())
529 // fold (and x, 0) -> 0
530 if (MaskedValueIsZero(N0, N2C->getValue(), TLI))
531 return DAG.getConstant(0, VT).Val;
532 // fold (and x, mask containing x) -> x
533 uint64_t NotC2 = ~N2C->getValue();
534 if (MVT::i64 != VT) NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1;
535 if (MaskedValueIsZero(N0, NotC2, TLI))
537 // fold (and (sign_extend_inreg x, i16 to i32), 1) -> (and x, 1)
538 if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG) {
539 unsigned ExtendBits =
540 MVT::getSizeInBits(cast<VTSDNode>(N0.getOperand(1))->getVT());
541 if ((N2C->getValue() & (~0ULL << ExtendBits)) == 0)
542 return DAG.getNode(ISD::AND, VT, N0.getOperand(0), N1).Val;
544 // fold (and (or x, 0xFFFF), 0xFF) -> 0xFF
545 if (N0.getOpcode() == ISD::OR)
546 if (ConstantSDNode *ORI = dyn_cast<ConstantSDNode>(N0.getOperand(1)))
547 if ((ORI->getValue() & N2C->getValue()) == N2C->getValue())
549 // fold (and (assert_zext x, i16), 0xFFFF) -> (assert_zext x, i16)
550 if (N0.getOpcode() == ISD::AssertZext) {
551 unsigned ExtendBits =
552 MVT::getSizeInBits(cast<VTSDNode>(N0.getOperand(1))->getVT());
553 if (N2C->getValue() == (1ULL << ExtendBits)-1)
559 SDNode *DAGCombiner::visitOr(SDNode *N) {
560 SDOperand N0 = N->getOperand(0);
561 SDOperand N1 = N->getOperand(1);
562 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
563 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
565 // fold (or c1, c2) -> c1|c2
567 return DAG.getConstant(N1C->getValue() | N2C->getValue(),
568 N->getValueType(0)).Val;
569 // fold (or x, 0) -> x
570 if (N2C && N2C->isNullValue())
572 // fold (or x, -1) -> -1
573 if (N2C && N2C->isAllOnesValue())
578 SDNode *DAGCombiner::visitXor(SDNode *N) {
579 SDOperand N0 = N->getOperand(0);
580 SDOperand N1 = N->getOperand(1);
581 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
582 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
583 MVT::ValueType VT = N0.getValueType();
585 // fold (xor c1, c2) -> c1^c2
587 return DAG.getConstant(N1C->getValue() ^ N2C->getValue(), VT).Val;
588 // fold (xor x, 0) -> x
589 if (N2C && N2C->isNullValue())
591 // fold !(x cc y) -> (x !cc y)
592 if (N2C && N2C->isAllOnesValue() && N0.getOpcode() == ISD::SETCC) {
593 bool isInt = MVT::isInteger(N0.getOperand(0).getValueType());
594 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
595 return DAG.getSetCC(VT, N0.getOperand(0), N0.getOperand(1),
596 ISD::getSetCCInverse(CC, isInt)).Val;
598 // fold !(x cc y) -> (x !cc y)
599 if (N2C && N2C->isAllOnesValue() && isSetCCEquivalent(N0)) {
600 bool isInt = MVT::isInteger(N0.getOperand(0).getValueType());
601 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(4))->get();
602 return DAG.getSelectCC(N0.getOperand(0), N0.getOperand(1),
603 N0.getOperand(2), N0.getOperand(3),
604 ISD::getSetCCInverse(CC, isInt)).Val;
606 // fold !(x or y) -> (!x and !y) iff x or y are freely invertible
607 if (N2C && N2C->isAllOnesValue() && N0.getOpcode() == ISD::OR) {
608 SDOperand LHS = N0.getOperand(0), RHS = N0.getOperand(1);
609 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) {
610 LHS = DAG.getNode(ISD::XOR, VT, LHS, N1); // RHS = ~LHS
611 RHS = DAG.getNode(ISD::XOR, VT, RHS, N1); // RHS = ~RHS
612 return DAG.getNode(ISD::AND, VT, LHS, RHS).Val;
615 // fold !(x and y) -> (!x or !y) iff x or y are freely invertible
616 if (N2C && N2C->isAllOnesValue() && N0.getOpcode() == ISD::AND) {
617 SDOperand LHS = N0.getOperand(0), RHS = N0.getOperand(1);
618 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) {
619 LHS = DAG.getNode(ISD::XOR, VT, LHS, N1); // RHS = ~LHS
620 RHS = DAG.getNode(ISD::XOR, VT, RHS, N1); // RHS = ~RHS
621 return DAG.getNode(ISD::OR, VT, LHS, RHS).Val;
627 SDNode *DAGCombiner::visitShl(SDNode *N) {
628 SDOperand N0 = N->getOperand(0);
629 SDOperand N1 = N->getOperand(1);
630 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
631 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
632 MVT::ValueType VT = N0.getValueType();
633 unsigned OpSizeInBits = MVT::getSizeInBits(VT);
635 // fold (shl c1, c2) -> c1<<c2
637 return DAG.getConstant(N1C->getValue() << N2C->getValue(), VT).Val;
638 // fold (shl 0, x) -> 0
639 if (N1C && N1C->isNullValue())
641 // fold (shl x, c >= size(x)) -> undef
642 if (N2C && N2C->getValue() >= OpSizeInBits)
643 return DAG.getNode(ISD::UNDEF, VT).Val;
644 // fold (shl x, 0) -> x
645 if (N2C && N2C->isNullValue())
647 // if (shl x, c) is known to be zero, return 0
648 if (N2C && MaskedValueIsZero(N0,(~0ULL >> (64-OpSizeInBits))>>N2C->getValue(),
650 return DAG.getConstant(0, VT).Val;
651 // fold (shl (shl x, c1), c2) -> 0 or (shl x, c1+c2)
652 if (N2C && N0.getOpcode() == ISD::SHL &&
653 N0.getOperand(1).getOpcode() == ISD::Constant) {
654 uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
655 uint64_t c2 = N2C->getValue();
656 if (c1 + c2 > OpSizeInBits)
657 return DAG.getConstant(0, VT).Val;
658 return DAG.getNode(ISD::SHL, VT, N0.getOperand(0),
659 DAG.getConstant(c1 + c2, N1.getValueType())).Val;
661 // fold (shl (srl x, c1), c2) -> (shl (and x, -1 << c1), c2-c1) or
662 // (srl (and x, -1 << c1), c1-c2)
663 if (N2C && N0.getOpcode() == ISD::SRL &&
664 N0.getOperand(1).getOpcode() == ISD::Constant) {
665 uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
666 uint64_t c2 = N2C->getValue();
667 SDOperand Mask = DAG.getNode(ISD::AND, VT, N0.getOperand(0),
668 DAG.getConstant(~0ULL << c1, VT));
670 return DAG.getNode(ISD::SHL, VT, Mask,
671 DAG.getConstant(c2-c1, N1.getValueType())).Val;
673 return DAG.getNode(ISD::SRL, VT, Mask,
674 DAG.getConstant(c1-c2, N1.getValueType())).Val;
676 // fold (shl (sra x, c1), c1) -> (and x, -1 << c1)
677 if (N2C && N0.getOpcode() == ISD::SRA &&
678 N0.getOperand(1).getOpcode() == ISD::Constant) {
679 uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
680 uint64_t c2 = N2C->getValue();
682 return DAG.getNode(ISD::AND, VT, N0.getOperand(0),
683 DAG.getConstant(~0ULL << c1, VT)).Val;
688 SDNode *DAGCombiner::visitSra(SDNode *N) {
689 SDOperand N0 = N->getOperand(0);
690 SDOperand N1 = N->getOperand(1);
691 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
692 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
693 MVT::ValueType VT = N0.getValueType();
694 unsigned OpSizeInBits = MVT::getSizeInBits(VT);
696 // fold (sra c1, c2) -> c1>>c2
698 return DAG.getConstant(N1C->getSignExtended() >> N2C->getValue(), VT).Val;
699 // fold (sra 0, x) -> 0
700 if (N1C && N1C->isNullValue())
702 // fold (sra -1, x) -> -1
703 if (N1C && N1C->isAllOnesValue())
705 // fold (sra x, c >= size(x)) -> undef
706 if (N2C && N2C->getValue() >= OpSizeInBits)
707 return DAG.getNode(ISD::UNDEF, VT).Val;
708 // fold (sra x, 0) -> x
709 if (N2C && N2C->isNullValue())
711 // If the sign bit is known to be zero, switch this to a SRL.
712 if (N2C && MaskedValueIsZero(N0, (1ULL << (OpSizeInBits-1)), TLI))
713 return DAG.getNode(ISD::SRL, VT, N0, N1).Val;
717 SDNode *DAGCombiner::visitSrl(SDNode *N) {
718 SDOperand N0 = N->getOperand(0);
719 SDOperand N1 = N->getOperand(1);
720 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
721 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N1.Val);
722 MVT::ValueType VT = N0.getValueType();
723 unsigned OpSizeInBits = MVT::getSizeInBits(VT);
725 // fold (srl c1, c2) -> c1 >>u c2
727 return DAG.getConstant(N1C->getValue() >> N2C->getValue(), VT).Val;
728 // fold (srl 0, x) -> 0
729 if (N1C && N1C->isNullValue())
731 // fold (srl x, c >= size(x)) -> undef
732 if (N2C && N2C->getValue() >= OpSizeInBits)
733 return DAG.getNode(ISD::UNDEF, VT).Val;
734 // fold (srl x, 0) -> x
735 if (N2C && N2C->isNullValue())
737 // if (srl x, c) is known to be zero, return 0
738 if (N2C && MaskedValueIsZero(N0,(~0ULL >> (64-OpSizeInBits))<<N2C->getValue(),
740 return DAG.getConstant(0, VT).Val;
741 // fold (srl (srl x, c1), c2) -> 0 or (srl x, c1+c2)
742 if (N2C && N0.getOpcode() == ISD::SRL &&
743 N0.getOperand(1).getOpcode() == ISD::Constant) {
744 uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
745 uint64_t c2 = N2C->getValue();
746 if (c1 + c2 > OpSizeInBits)
747 return DAG.getConstant(0, VT).Val;
748 return DAG.getNode(ISD::SRL, VT, N0.getOperand(0),
749 DAG.getConstant(c1 + c2, N1.getValueType())).Val;
754 SDNode *DAGCombiner::visitCtlz(SDNode *N) {
755 SDOperand N0 = N->getOperand(0);
756 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
758 // fold (ctlz c1) -> c2
760 return DAG.getConstant(CountLeadingZeros_64(N1C->getValue()),
761 N0.getValueType()).Val;
765 SDNode *DAGCombiner::visitCttz(SDNode *N) {
766 SDOperand N0 = N->getOperand(0);
767 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
769 // fold (cttz c1) -> c2
771 return DAG.getConstant(CountTrailingZeros_64(N1C->getValue()),
772 N0.getValueType()).Val;
776 SDNode *DAGCombiner::visitCtpop(SDNode *N) {
777 SDOperand N0 = N->getOperand(0);
778 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
780 // fold (ctpop c1) -> c2
782 return DAG.getConstant(CountPopulation_64(N1C->getValue()),
783 N0.getValueType()).Val;
787 SDNode *DAGCombiner::visitSignExtend(SDNode *N) {
788 SDOperand N0 = N->getOperand(0);
789 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
790 MVT::ValueType VT = N->getValueType(0);
793 if (N0.getValueType() == N->getValueType(0))
795 // fold (sext c1) -> c1
797 return DAG.getConstant(N1C->getSignExtended(), VT).Val;
798 // fold (sext (sext x)) -> (sext x)
799 if (N0.getOpcode() == ISD::SIGN_EXTEND)
800 return DAG.getNode(ISD::SIGN_EXTEND, VT, N0.getOperand(0)).Val;
804 SDNode *DAGCombiner::visitZeroExtend(SDNode *N) {
805 SDOperand N0 = N->getOperand(0);
806 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
807 MVT::ValueType VT = N->getValueType(0);
810 if (N0.getValueType() == N->getValueType(0))
812 // fold (zext c1) -> c1
814 return DAG.getConstant(N1C->getValue(), VT).Val;
815 // fold (zext (zext x)) -> (zext x)
816 if (N0.getOpcode() == ISD::ZERO_EXTEND)
817 return DAG.getNode(ISD::ZERO_EXTEND, VT, N0.getOperand(0)).Val;
821 SDNode *DAGCombiner::visitSignExtendInReg(SDNode *N) {
822 SDOperand N0 = N->getOperand(0);
823 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
824 MVT::ValueType VT = N->getValueType(0);
825 MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
830 // fold (sext_in_reg c1) -> c1
832 SDOperand Truncate = DAG.getConstant(N1C->getValue(), EVT);
833 return DAG.getNode(ISD::SIGN_EXTEND, VT, Truncate).Val;
835 // fold (sext_in_reg (sext_in_reg x)) -> (sext_in_reg x)
836 if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
837 cast<VTSDNode>(N0.getOperand(1))->getVT() <= EVT) {
840 // fold (sext_in_reg (assert_sext x)) -> (assert_sext x)
841 if (N0.getOpcode() == ISD::AssertSext &&
842 cast<VTSDNode>(N0.getOperand(1))->getVT() <= EVT) {
845 // fold (sext_in_reg (sextload x)) -> (sextload x)
846 if (N0.getOpcode() == ISD::SEXTLOAD &&
847 cast<VTSDNode>(N0.getOperand(3))->getVT() <= EVT) {
850 // fold (sext_in_reg (setcc x)) -> setcc x iff (setcc x) == 0 or 1
851 if (N0.getOpcode() == ISD::SETCC &&
852 TLI.getSetCCResultContents() ==
853 TargetLowering::ZeroOrNegativeOneSetCCResult)
855 // FIXME: this code is currently just ported over from SelectionDAG.cpp
856 // we probably actually want to handle this in two pieces. Rather than
857 // checking all the top bits for zero, just check the sign bit here and turn
858 // it into a zero extend inreg (AND with constant).
859 // then, let the code for AND figure out if the mask is superfluous rather
860 // than doing so here.
861 if (N0.getOpcode() == ISD::AND &&
862 N0.getOperand(1).getOpcode() == ISD::Constant) {
863 uint64_t Mask = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
864 unsigned NumBits = MVT::getSizeInBits(EVT);
865 if ((Mask & (~0ULL << (NumBits-1))) == 0)
871 SDNode *DAGCombiner::visitTruncate(SDNode *N) {
872 SDOperand N0 = N->getOperand(0);
873 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
874 MVT::ValueType VT = N->getValueType(0);
877 if (N0.getValueType() == N->getValueType(0))
879 // fold (truncate c1) -> c1
881 return DAG.getConstant(N1C->getValue(), VT).Val;
882 // fold (truncate (truncate x)) -> (truncate x)
883 if (N0.getOpcode() == ISD::TRUNCATE)
884 return DAG.getNode(ISD::TRUNCATE, VT, N0.getOperand(0)).Val;
885 // fold (truncate (ext x)) -> (ext x) or (truncate x) or x
886 if (N0.getOpcode() == ISD::ZERO_EXTEND || N0.getOpcode() == ISD::SIGN_EXTEND){
887 if (N0.getValueType() < VT)
888 // if the source is smaller than the dest, we still need an extend
889 return DAG.getNode(N0.getOpcode(), VT, N0.getOperand(0)).Val;
890 else if (N0.getValueType() > VT)
891 // if the source is larger than the dest, than we just need the truncate
892 return DAG.getNode(ISD::TRUNCATE, VT, N0.getOperand(0)).Val;
894 // if the source and dest are the same type, we can drop both the extend
896 return N0.getOperand(0).Val;
901 SDNode *DAGCombiner::visitSintToFP(SDNode *N) {
902 SDOperand N0 = N->getOperand(0);
903 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
904 MVT::ValueType VT = N->getValueType(0);
906 // fold (sint_to_fp c1) -> c1fp
908 return DAG.getConstantFP(N1C->getSignExtended(), VT).Val;
912 SDNode *DAGCombiner::visitUintToFP(SDNode *N) {
913 SDOperand N0 = N->getOperand(0);
914 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N0.Val);
915 MVT::ValueType VT = N->getValueType(0);
917 // fold (uint_to_fp c1) -> c1fp
919 return DAG.getConstantFP(N1C->getValue(), VT).Val;
923 SDNode *DAGCombiner::visitFPToSint(SDNode *N) {
924 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
926 // fold (fp_to_sint c1fp) -> c1
928 return DAG.getConstant((int64_t)N1CFP->getValue(), N->getValueType(0)).Val;
932 SDNode *DAGCombiner::visitFPToUint(SDNode *N) {
933 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
935 // fold (fp_to_uint c1fp) -> c1
937 return DAG.getConstant((uint64_t)N1CFP->getValue(), N->getValueType(0)).Val;
941 SDNode *DAGCombiner::visitFPRound(SDNode *N) {
942 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
944 // fold (fp_round c1fp) -> c1fp
946 return DAG.getConstantFP(N1CFP->getValue(), N->getValueType(0)).Val;
950 SDNode *DAGCombiner::visitFPRoundInReg(SDNode *N) {
951 SDOperand N0 = N->getOperand(0);
952 MVT::ValueType VT = N->getValueType(0);
953 MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
954 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N0);
956 // noop fp_round_inreg
959 // fold (fp_round_inreg c1fp) -> c1fp
961 SDOperand Round = DAG.getConstantFP(N1CFP->getValue(), EVT);
962 return DAG.getNode(ISD::FP_EXTEND, VT, Round).Val;
967 SDNode *DAGCombiner::visitFPExtend(SDNode *N) {
968 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
970 // fold (fp_extend c1fp) -> c1fp
972 return DAG.getConstantFP(N1CFP->getValue(), N->getValueType(0)).Val;
976 SDNode *DAGCombiner::visitFneg(SDNode *N) {
977 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
978 // fold (neg c1) -> -c1
980 return DAG.getConstantFP(-N1CFP->getValue(), N->getValueType(0)).Val;
981 // fold (neg (sub x, y)) -> (sub y, x)
982 if (N->getOperand(0).getOpcode() == ISD::SUB)
983 return DAG.getNode(ISD::SUB, N->getValueType(0), N->getOperand(1),
984 N->getOperand(0)).Val;
985 // fold (neg (neg x)) -> x
986 if (N->getOperand(0).getOpcode() == ISD::FNEG)
987 return N->getOperand(0).getOperand(0).Val;
991 SDNode *DAGCombiner::visitFabs(SDNode *N) {
992 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
993 // fold (fabs c1) -> fabs(c1)
995 return DAG.getConstantFP(fabs(N1CFP->getValue()), N->getValueType(0)).Val;
996 // fold (fabs (fabs x)) -> (fabs x)
997 if (N->getOperand(0).getOpcode() == ISD::FABS)
998 return N->getOperand(0).Val;
999 // fold (fabs (fneg x)) -> (fabs x)
1000 if (N->getOperand(0).getOpcode() == ISD::FNEG)
1001 return DAG.getNode(ISD::FABS, N->getValueType(0),
1002 N->getOperand(0).getOperand(0)).Val;
1006 SDNode *DAGCombiner::visitExtLoad(SDNode *N) {
1007 MVT::ValueType VT = N->getValueType(0);
1008 MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(3))->getVT();
1010 // fold (extload vt, x) -> (load x)
1012 return DAG.getLoad(VT, N->getOperand(0), N->getOperand(1),
1013 N->getOperand(2)).Val;
1017 SDNode *DAGCombiner::visitSextLoad(SDNode *N) {
1018 MVT::ValueType VT = N->getValueType(0);
1019 MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(3))->getVT();
1021 // fold (sextload vt, x) -> (load x)
1023 return DAG.getLoad(VT, N->getOperand(0), N->getOperand(1),
1024 N->getOperand(2)).Val;
1028 SDNode *DAGCombiner::visitZextLoad(SDNode *N) {
1029 MVT::ValueType VT = N->getValueType(0);
1030 MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(3))->getVT();
1032 // fold (zextload vt, x) -> (load x)
1034 return DAG.getLoad(VT, N->getOperand(0), N->getOperand(1),
1035 N->getOperand(2)).Val;
1039 SDNode *DAGCombiner::visitTruncStore(SDNode *N) {
1040 MVT::ValueType VT = N->getValueType(0);
1041 MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(4))->getVT();
1043 // fold (truncstore x, vt) -> (store x)
1044 if (N->getOperand(0).getValueType() == EVT)
1045 return DAG.getNode(ISD::STORE, VT, N->getOperand(0), N->getOperand(1),
1046 N->getOperand(2), N->getOperand(3)).Val;
1050 // SelectionDAG::Combine - This is the entry point for the file.
1052 void SelectionDAG::Combine(bool AfterLegalize) {
1053 /// run - This is the main entry point to this class.
1055 DAGCombiner(*this).Run(AfterLegalize);