1 //===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This register allocator allocates registers to a basic block at a time,
11 // attempting to keep values in registers and reusing registers as appropriate.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
16 #include "llvm/BasicBlock.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/LiveVariables.h"
23 #include "llvm/CodeGen/RegAllocRegistry.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/Compiler.h"
29 #include "llvm/ADT/IndexedMap.h"
30 #include "llvm/ADT/SmallVector.h"
31 #include "llvm/ADT/Statistic.h"
35 STATISTIC(NumStores, "Number of stores added");
36 STATISTIC(NumLoads , "Number of loads added");
37 STATISTIC(NumFolded, "Number of loads/stores folded into instructions");
40 static RegisterRegAlloc
41 localRegAlloc("local", " local register allocator",
42 createLocalRegisterAllocator);
45 class VISIBILITY_HIDDEN RALocal : public MachineFunctionPass {
48 RALocal() : MachineFunctionPass((intptr_t)&ID) {}
50 const TargetMachine *TM;
52 const MRegisterInfo *MRI;
53 const TargetInstrInfo *TII;
56 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
57 // values are spilled.
58 std::map<unsigned, int> StackSlotForVirtReg;
60 // Virt2PhysRegMap - This map contains entries for each virtual register
61 // that is currently available in a physical register.
62 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysRegMap;
64 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
65 return Virt2PhysRegMap[VirtReg];
68 // PhysRegsUsed - This array is effectively a map, containing entries for
69 // each physical register that currently has a value (ie, it is in
70 // Virt2PhysRegMap). The value mapped to is the virtual register
71 // corresponding to the physical register (the inverse of the
72 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
73 // because it is used by a future instruction, and to -2 if it is not
74 // allocatable. If the entry for a physical register is -1, then the
75 // physical register is "not in the map".
77 std::vector<int> PhysRegsUsed;
79 // PhysRegsUseOrder - This contains a list of the physical registers that
80 // currently have a virtual register value in them. This list provides an
81 // ordering of registers, imposing a reallocation order. This list is only
82 // used if all registers are allocated and we have to spill one, in which
83 // case we spill the least recently used register. Entries at the front of
84 // the list are the least recently used registers, entries at the back are
85 // the most recently used.
87 std::vector<unsigned> PhysRegsUseOrder;
89 // VirtRegModified - This bitset contains information about which virtual
90 // registers need to be spilled back to memory when their registers are
91 // scavenged. If a virtual register has simply been rematerialized, there
92 // is no reason to spill it to memory when we need the register back.
94 std::vector<bool> VirtRegModified;
96 void markVirtRegModified(unsigned Reg, bool Val = true) {
97 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
98 Reg -= MRegisterInfo::FirstVirtualRegister;
99 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
100 VirtRegModified[Reg] = Val;
103 bool isVirtRegModified(unsigned Reg) const {
104 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
105 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
106 && "Illegal virtual register!");
107 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
110 void AddToPhysRegsUseOrder(unsigned Reg) {
111 std::vector<unsigned>::iterator It =
112 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), Reg);
113 if (It != PhysRegsUseOrder.end())
114 PhysRegsUseOrder.erase(It);
115 PhysRegsUseOrder.push_back(Reg);
118 void MarkPhysRegRecentlyUsed(unsigned Reg) {
119 if (PhysRegsUseOrder.empty() ||
120 PhysRegsUseOrder.back() == Reg) return; // Already most recently used
122 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
123 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
124 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
125 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
126 // Add it to the end of the list
127 PhysRegsUseOrder.push_back(RegMatch);
129 return; // Found an exact match, exit early
134 virtual const char *getPassName() const {
135 return "Local Register Allocator";
138 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
139 AU.addRequired<LiveVariables>();
140 AU.addRequiredID(PHIEliminationID);
141 AU.addRequiredID(TwoAddressInstructionPassID);
142 MachineFunctionPass::getAnalysisUsage(AU);
146 /// runOnMachineFunction - Register allocate the whole function
147 bool runOnMachineFunction(MachineFunction &Fn);
149 /// AllocateBasicBlock - Register allocate the specified basic block.
150 void AllocateBasicBlock(MachineBasicBlock &MBB);
153 /// areRegsEqual - This method returns true if the specified registers are
154 /// related to each other. To do this, it checks to see if they are equal
155 /// or if the first register is in the alias set of the second register.
157 bool areRegsEqual(unsigned R1, unsigned R2) const {
158 if (R1 == R2) return true;
159 for (const unsigned *AliasSet = MRI->getAliasSet(R2);
160 *AliasSet; ++AliasSet) {
161 if (*AliasSet == R1) return true;
166 /// getStackSpaceFor - This returns the frame index of the specified virtual
167 /// register on the stack, allocating space if necessary.
168 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
170 /// removePhysReg - This method marks the specified physical register as no
171 /// longer being in use.
173 void removePhysReg(unsigned PhysReg);
175 /// spillVirtReg - This method spills the value specified by PhysReg into
176 /// the virtual register slot specified by VirtReg. It then updates the RA
177 /// data structures to indicate the fact that PhysReg is now available.
179 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
180 unsigned VirtReg, unsigned PhysReg);
182 /// spillPhysReg - This method spills the specified physical register into
183 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
184 /// true, then the request is ignored if the physical register does not
185 /// contain a virtual register.
187 void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
188 unsigned PhysReg, bool OnlyVirtRegs = false);
190 /// assignVirtToPhysReg - This method updates local state so that we know
191 /// that PhysReg is the proper container for VirtReg now. The physical
192 /// register must not be used for anything else when this is called.
194 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
196 /// isPhysRegAvailable - Return true if the specified physical register is
197 /// free and available for use. This also includes checking to see if
198 /// aliased registers are all free...
200 bool isPhysRegAvailable(unsigned PhysReg) const;
202 /// getFreeReg - Look to see if there is a free register available in the
203 /// specified register class. If not, return 0.
205 unsigned getFreeReg(const TargetRegisterClass *RC);
207 /// getReg - Find a physical register to hold the specified virtual
208 /// register. If all compatible physical registers are used, this method
209 /// spills the last used virtual register to the stack, and uses that
212 unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
215 /// reloadVirtReg - This method transforms the specified specified virtual
216 /// register use to refer to a physical register. This method may do this
217 /// in one of several ways: if the register is available in a physical
218 /// register already, it uses that physical register. If the value is not
219 /// in a physical register, and if there are physical registers available,
220 /// it loads it into a register. If register pressure is high, and it is
221 /// possible, it tries to fold the load of the virtual register into the
222 /// instruction itself. It avoids doing this if register pressure is low to
223 /// improve the chance that subsequent instructions can use the reloaded
224 /// value. This method returns the modified instruction.
226 MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
230 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
233 char RALocal::ID = 0;
236 /// getStackSpaceFor - This allocates space for the specified virtual register
237 /// to be held on the stack.
238 int RALocal::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
239 // Find the location Reg would belong...
240 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
242 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
243 return I->second; // Already has space allocated?
245 // Allocate a new stack object for this spill location...
246 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
249 // Assign the slot...
250 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
255 /// removePhysReg - This method marks the specified physical register as no
256 /// longer being in use.
258 void RALocal::removePhysReg(unsigned PhysReg) {
259 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
261 std::vector<unsigned>::iterator It =
262 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
263 if (It != PhysRegsUseOrder.end())
264 PhysRegsUseOrder.erase(It);
268 /// spillVirtReg - This method spills the value specified by PhysReg into the
269 /// virtual register slot specified by VirtReg. It then updates the RA data
270 /// structures to indicate the fact that PhysReg is now available.
272 void RALocal::spillVirtReg(MachineBasicBlock &MBB,
273 MachineBasicBlock::iterator I,
274 unsigned VirtReg, unsigned PhysReg) {
275 assert(VirtReg && "Spilling a physical register is illegal!"
276 " Must not have appropriate kill for the register or use exists beyond"
277 " the intended one.");
278 DOUT << " Spilling register " << MRI->getName(PhysReg)
279 << " containing %reg" << VirtReg;
281 const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
283 if (!isVirtRegModified(VirtReg))
284 DOUT << " which has not been modified, so no store necessary!";
286 // Otherwise, there is a virtual register corresponding to this physical
287 // register. We only need to spill it into its stack slot if it has been
289 if (isVirtRegModified(VirtReg)) {
290 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
291 int FrameIndex = getStackSpaceFor(VirtReg, RC);
292 DOUT << " to stack slot #" << FrameIndex;
293 TII->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIndex, RC);
294 ++NumStores; // Update statistics
297 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
300 removePhysReg(PhysReg);
304 /// spillPhysReg - This method spills the specified physical register into the
305 /// virtual register slot associated with it. If OnlyVirtRegs is set to true,
306 /// then the request is ignored if the physical register does not contain a
307 /// virtual register.
309 void RALocal::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
310 unsigned PhysReg, bool OnlyVirtRegs) {
311 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
312 assert(PhysRegsUsed[PhysReg] != -2 && "Non allocable reg used!");
313 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
314 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
316 // If the selected register aliases any other registers, we must make
317 // sure that one of the aliases isn't alive.
318 for (const unsigned *AliasSet = MRI->getAliasSet(PhysReg);
319 *AliasSet; ++AliasSet)
320 if (PhysRegsUsed[*AliasSet] != -1 && // Spill aliased register.
321 PhysRegsUsed[*AliasSet] != -2) // If allocatable.
322 if (PhysRegsUsed[*AliasSet])
323 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
328 /// assignVirtToPhysReg - This method updates local state so that we know
329 /// that PhysReg is the proper container for VirtReg now. The physical
330 /// register must not be used for anything else when this is called.
332 void RALocal::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
333 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
334 // Update information to note the fact that this register was just used, and
336 PhysRegsUsed[PhysReg] = VirtReg;
337 getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
338 AddToPhysRegsUseOrder(PhysReg); // New use of PhysReg
342 /// isPhysRegAvailable - Return true if the specified physical register is free
343 /// and available for use. This also includes checking to see if aliased
344 /// registers are all free...
346 bool RALocal::isPhysRegAvailable(unsigned PhysReg) const {
347 if (PhysRegsUsed[PhysReg] != -1) return false;
349 // If the selected register aliases any other allocated registers, it is
351 for (const unsigned *AliasSet = MRI->getAliasSet(PhysReg);
352 *AliasSet; ++AliasSet)
353 if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
354 return false; // Can't use this reg then.
359 /// getFreeReg - Look to see if there is a free register available in the
360 /// specified register class. If not, return 0.
362 unsigned RALocal::getFreeReg(const TargetRegisterClass *RC) {
363 // Get iterators defining the range of registers that are valid to allocate in
364 // this class, which also specifies the preferred allocation order.
365 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
366 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
368 for (; RI != RE; ++RI)
369 if (isPhysRegAvailable(*RI)) { // Is reg unused?
370 assert(*RI != 0 && "Cannot use register!");
371 return *RI; // Found an unused register!
377 /// getReg - Find a physical register to hold the specified virtual
378 /// register. If all compatible physical registers are used, this method spills
379 /// the last used virtual register to the stack, and uses that register.
381 unsigned RALocal::getReg(MachineBasicBlock &MBB, MachineInstr *I,
383 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
385 // First check to see if we have a free register of the requested type...
386 unsigned PhysReg = getFreeReg(RC);
388 // If we didn't find an unused register, scavenge one now!
390 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
392 // Loop over all of the preallocated registers from the least recently used
393 // to the most recently used. When we find one that is capable of holding
394 // our register, use it.
395 for (unsigned i = 0; PhysReg == 0; ++i) {
396 assert(i != PhysRegsUseOrder.size() &&
397 "Couldn't find a register of the appropriate class!");
399 unsigned R = PhysRegsUseOrder[i];
401 // We can only use this register if it holds a virtual register (ie, it
402 // can be spilled). Do not use it if it is an explicitly allocated
403 // physical register!
404 assert(PhysRegsUsed[R] != -1 &&
405 "PhysReg in PhysRegsUseOrder, but is not allocated?");
406 if (PhysRegsUsed[R] && PhysRegsUsed[R] != -2) {
407 // If the current register is compatible, use it.
408 if (RC->contains(R)) {
412 // If one of the registers aliased to the current register is
413 // compatible, use it.
414 for (const unsigned *AliasIt = MRI->getAliasSet(R);
415 *AliasIt; ++AliasIt) {
416 if (RC->contains(*AliasIt) &&
417 // If this is pinned down for some reason, don't use it. For
418 // example, if CL is pinned, and we run across CH, don't use
419 // CH as justification for using scavenging ECX (which will
421 PhysRegsUsed[*AliasIt] != 0 &&
423 // Make sure the register is allocatable. Don't allocate SIL on
425 PhysRegsUsed[*AliasIt] != -2) {
426 PhysReg = *AliasIt; // Take an aliased register
434 assert(PhysReg && "Physical register not assigned!?!?");
436 // At this point PhysRegsUseOrder[i] is the least recently used register of
437 // compatible register class. Spill it to memory and reap its remains.
438 spillPhysReg(MBB, I, PhysReg);
441 // Now that we know which register we need to assign this to, do it now!
442 assignVirtToPhysReg(VirtReg, PhysReg);
447 /// reloadVirtReg - This method transforms the specified specified virtual
448 /// register use to refer to a physical register. This method may do this in
449 /// one of several ways: if the register is available in a physical register
450 /// already, it uses that physical register. If the value is not in a physical
451 /// register, and if there are physical registers available, it loads it into a
452 /// register. If register pressure is high, and it is possible, it tries to
453 /// fold the load of the virtual register into the instruction itself. It
454 /// avoids doing this if register pressure is low to improve the chance that
455 /// subsequent instructions can use the reloaded value. This method returns the
456 /// modified instruction.
458 MachineInstr *RALocal::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
460 unsigned VirtReg = MI->getOperand(OpNum).getReg();
462 // If the virtual register is already available, just update the instruction
464 if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
465 MarkPhysRegRecentlyUsed(PR); // Already have this value available!
466 MI->getOperand(OpNum).setReg(PR); // Assign the input register
470 // Otherwise, we need to fold it into the current instruction, or reload it.
471 // If we have registers available to hold the value, use them.
472 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
473 unsigned PhysReg = getFreeReg(RC);
474 int FrameIndex = getStackSpaceFor(VirtReg, RC);
476 if (PhysReg) { // Register is available, allocate it!
477 assignVirtToPhysReg(VirtReg, PhysReg);
478 } else { // No registers available.
479 // If we can fold this spill into this instruction, do so now.
480 SmallVector<unsigned, 2> Ops;
481 Ops.push_back(OpNum);
482 if (MachineInstr* FMI = TII->foldMemoryOperand(MI, Ops, FrameIndex)) {
484 // Since we changed the address of MI, make sure to update live variables
485 // to know that the new instruction has the properties of the old one.
486 LV->instructionChanged(MI, FMI);
487 return MBB.insert(MBB.erase(MI), FMI);
490 // It looks like we can't fold this virtual register load into this
491 // instruction. Force some poor hapless value out of the register file to
492 // make room for the new register, and reload it.
493 PhysReg = getReg(MBB, MI, VirtReg);
496 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
498 DOUT << " Reloading %reg" << VirtReg << " into "
499 << MRI->getName(PhysReg) << "\n";
501 // Add move instruction(s)
502 const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
503 TII->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
504 ++NumLoads; // Update statistics
506 MF->getRegInfo().setPhysRegUsed(PhysReg);
507 MI->getOperand(OpNum).setReg(PhysReg); // Assign the input register
511 /// isReadModWriteImplicitKill - True if this is an implicit kill for a
512 /// read/mod/write register, i.e. update partial register.
513 static bool isReadModWriteImplicitKill(MachineInstr *MI, unsigned Reg) {
514 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
515 MachineOperand& MO = MI->getOperand(i);
516 if (MO.isRegister() && MO.getReg() == Reg && MO.isImplicit() &&
517 MO.isDef() && !MO.isDead())
523 /// isReadModWriteImplicitDef - True if this is an implicit def for a
524 /// read/mod/write register, i.e. update partial register.
525 static bool isReadModWriteImplicitDef(MachineInstr *MI, unsigned Reg) {
526 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
527 MachineOperand& MO = MI->getOperand(i);
528 if (MO.isRegister() && MO.getReg() == Reg && MO.isImplicit() &&
529 !MO.isDef() && MO.isKill())
535 void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
536 // loop over each instruction
537 MachineBasicBlock::iterator MII = MBB.begin();
538 const TargetInstrInfo &TII = *TM->getInstrInfo();
540 DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
541 if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
543 // If this is the first basic block in the machine function, add live-in
544 // registers as active.
545 if (&MBB == &*MF->begin()) {
546 for (MachineRegisterInfo::livein_iterator I=MF->getRegInfo().livein_begin(),
547 E = MF->getRegInfo().livein_end(); I != E; ++I) {
548 unsigned Reg = I->first;
549 MF->getRegInfo().setPhysRegUsed(Reg);
550 PhysRegsUsed[Reg] = 0; // It is free and reserved now
551 AddToPhysRegsUseOrder(Reg);
552 for (const unsigned *AliasSet = MRI->getSubRegisters(Reg);
553 *AliasSet; ++AliasSet) {
554 if (PhysRegsUsed[*AliasSet] != -2) {
555 AddToPhysRegsUseOrder(*AliasSet);
556 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
557 MF->getRegInfo().setPhysRegUsed(*AliasSet);
563 // Otherwise, sequentially allocate each instruction in the MBB.
564 while (MII != MBB.end()) {
565 MachineInstr *MI = MII++;
566 const TargetInstrDesc &TID = MI->getDesc();
567 DEBUG(DOUT << "\nStarting RegAlloc of: " << *MI;
568 DOUT << " Regs have values: ";
569 for (unsigned i = 0; i != MRI->getNumRegs(); ++i)
570 if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
571 DOUT << "[" << MRI->getName(i)
572 << ",%reg" << PhysRegsUsed[i] << "] ";
575 // Loop over the implicit uses, making sure that they are at the head of the
576 // use order list, so they don't get reallocated.
577 if (TID.ImplicitUses) {
578 for (const unsigned *ImplicitUses = TID.ImplicitUses;
579 *ImplicitUses; ++ImplicitUses)
580 MarkPhysRegRecentlyUsed(*ImplicitUses);
583 SmallVector<unsigned, 8> Kills;
584 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
585 MachineOperand& MO = MI->getOperand(i);
586 if (MO.isRegister() && MO.isKill()) {
587 if (!MO.isImplicit())
588 Kills.push_back(MO.getReg());
589 else if (!isReadModWriteImplicitKill(MI, MO.getReg()))
590 // These are extra physical register kills when a sub-register
591 // is defined (def of a sub-register is a read/mod/write of the
592 // larger registers). Ignore.
593 Kills.push_back(MO.getReg());
597 // Get the used operands into registers. This has the potential to spill
598 // incoming values if we are out of registers. Note that we completely
599 // ignore physical register uses here. We assume that if an explicit
600 // physical register is referenced by the instruction, that it is guaranteed
601 // to be live-in, or the input is badly hosed.
603 for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
604 MachineOperand& MO = MI->getOperand(i);
605 // here we are looking for only used operands (never def&use)
606 if (MO.isRegister() && !MO.isDef() && MO.getReg() && !MO.isImplicit() &&
607 MRegisterInfo::isVirtualRegister(MO.getReg()))
608 MI = reloadVirtReg(MBB, MI, i);
611 // If this instruction is the last user of this register, kill the
612 // value, freeing the register being used, so it doesn't need to be
613 // spilled to memory.
615 for (unsigned i = 0, e = Kills.size(); i != e; ++i) {
616 unsigned VirtReg = Kills[i];
617 unsigned PhysReg = VirtReg;
618 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
619 // If the virtual register was never materialized into a register, it
620 // might not be in the map, but it won't hurt to zero it out anyway.
621 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
622 PhysReg = PhysRegSlot;
624 } else if (PhysRegsUsed[PhysReg] == -2) {
625 // Unallocatable register dead, ignore.
628 assert((!PhysRegsUsed[PhysReg] || PhysRegsUsed[PhysReg] == -1) &&
629 "Silently clearing a virtual register?");
633 DOUT << " Last use of " << MRI->getName(PhysReg)
634 << "[%reg" << VirtReg <<"], removing it from live set\n";
635 removePhysReg(PhysReg);
636 for (const unsigned *AliasSet = MRI->getSubRegisters(PhysReg);
637 *AliasSet; ++AliasSet) {
638 if (PhysRegsUsed[*AliasSet] != -2) {
639 DOUT << " Last use of "
640 << MRI->getName(*AliasSet)
641 << "[%reg" << VirtReg <<"], removing it from live set\n";
642 removePhysReg(*AliasSet);
648 // Loop over all of the operands of the instruction, spilling registers that
649 // are defined, and marking explicit destinations in the PhysRegsUsed map.
650 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
651 MachineOperand& MO = MI->getOperand(i);
652 if (MO.isRegister() && MO.isDef() && !MO.isImplicit() && MO.getReg() &&
653 MRegisterInfo::isPhysicalRegister(MO.getReg())) {
654 unsigned Reg = MO.getReg();
655 if (PhysRegsUsed[Reg] == -2) continue; // Something like ESP.
656 // These are extra physical register defs when a sub-register
657 // is defined (def of a sub-register is a read/mod/write of the
658 // larger registers). Ignore.
659 if (isReadModWriteImplicitDef(MI, MO.getReg())) continue;
661 MF->getRegInfo().setPhysRegUsed(Reg);
662 spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in reg
663 PhysRegsUsed[Reg] = 0; // It is free and reserved now
664 AddToPhysRegsUseOrder(Reg);
666 for (const unsigned *AliasSet = MRI->getSubRegisters(Reg);
667 *AliasSet; ++AliasSet) {
668 if (PhysRegsUsed[*AliasSet] != -2) {
669 MF->getRegInfo().setPhysRegUsed(*AliasSet);
670 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
671 AddToPhysRegsUseOrder(*AliasSet);
677 // Loop over the implicit defs, spilling them as well.
678 if (TID.ImplicitDefs) {
679 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
680 *ImplicitDefs; ++ImplicitDefs) {
681 unsigned Reg = *ImplicitDefs;
682 if (PhysRegsUsed[Reg] != -2) {
683 spillPhysReg(MBB, MI, Reg, true);
684 AddToPhysRegsUseOrder(Reg);
685 PhysRegsUsed[Reg] = 0; // It is free and reserved now
687 MF->getRegInfo().setPhysRegUsed(Reg);
688 for (const unsigned *AliasSet = MRI->getSubRegisters(Reg);
689 *AliasSet; ++AliasSet) {
690 if (PhysRegsUsed[*AliasSet] != -2) {
691 AddToPhysRegsUseOrder(*AliasSet);
692 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
693 MF->getRegInfo().setPhysRegUsed(*AliasSet);
699 SmallVector<unsigned, 8> DeadDefs;
700 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
701 MachineOperand& MO = MI->getOperand(i);
702 if (MO.isRegister() && MO.isDead())
703 DeadDefs.push_back(MO.getReg());
706 // Okay, we have allocated all of the source operands and spilled any values
707 // that would be destroyed by defs of this instruction. Loop over the
708 // explicit defs and assign them to a register, spilling incoming values if
709 // we need to scavenge a register.
711 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
712 MachineOperand& MO = MI->getOperand(i);
713 if (MO.isRegister() && MO.isDef() && MO.getReg() &&
714 MRegisterInfo::isVirtualRegister(MO.getReg())) {
715 unsigned DestVirtReg = MO.getReg();
716 unsigned DestPhysReg;
718 // If DestVirtReg already has a value, use it.
719 if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
720 DestPhysReg = getReg(MBB, MI, DestVirtReg);
721 MF->getRegInfo().setPhysRegUsed(DestPhysReg);
722 markVirtRegModified(DestVirtReg);
723 MI->getOperand(i).setReg(DestPhysReg); // Assign the output register
727 // If this instruction defines any registers that are immediately dead,
730 for (unsigned i = 0, e = DeadDefs.size(); i != e; ++i) {
731 unsigned VirtReg = DeadDefs[i];
732 unsigned PhysReg = VirtReg;
733 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
734 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
735 PhysReg = PhysRegSlot;
736 assert(PhysReg != 0);
738 } else if (PhysRegsUsed[PhysReg] == -2) {
739 // Unallocatable register dead, ignore.
744 DOUT << " Register " << MRI->getName(PhysReg)
745 << " [%reg" << VirtReg
746 << "] is never used, removing it frame live list\n";
747 removePhysReg(PhysReg);
748 for (const unsigned *AliasSet = MRI->getAliasSet(PhysReg);
749 *AliasSet; ++AliasSet) {
750 if (PhysRegsUsed[*AliasSet] != -2) {
751 DOUT << " Register " << MRI->getName(*AliasSet)
752 << " [%reg" << *AliasSet
753 << "] is never used, removing it frame live list\n";
754 removePhysReg(*AliasSet);
760 // Finally, if this is a noop copy instruction, zap it.
761 unsigned SrcReg, DstReg;
762 if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg) {
763 LV->removeVirtualRegistersKilled(MI);
764 LV->removeVirtualRegistersDead(MI);
769 MachineBasicBlock::iterator MI = MBB.getFirstTerminator();
771 // Spill all physical registers holding virtual registers now.
772 for (unsigned i = 0, e = MRI->getNumRegs(); i != e; ++i)
773 if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
774 if (unsigned VirtReg = PhysRegsUsed[i])
775 spillVirtReg(MBB, MI, VirtReg, i);
780 // This checking code is very expensive.
782 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
783 e = MF->getRegInfo().getLastVirtReg(); i <= e; ++i)
784 if (unsigned PR = Virt2PhysRegMap[i]) {
785 cerr << "Register still mapped: " << i << " -> " << PR << "\n";
788 assert(AllOk && "Virtual registers still in phys regs?");
791 // Clear any physical register which appear live at the end of the basic
792 // block, but which do not hold any virtual registers. e.g., the stack
794 PhysRegsUseOrder.clear();
798 /// runOnMachineFunction - Register allocate the whole function
800 bool RALocal::runOnMachineFunction(MachineFunction &Fn) {
801 DOUT << "Machine Function " << "\n";
803 TM = &Fn.getTarget();
804 MRI = TM->getRegisterInfo();
805 TII = TM->getInstrInfo();
806 LV = &getAnalysis<LiveVariables>();
808 PhysRegsUsed.assign(MRI->getNumRegs(), -1);
810 // At various places we want to efficiently check to see whether a register
811 // is allocatable. To handle this, we mark all unallocatable registers as
812 // being pinned down, permanently.
814 BitVector Allocable = MRI->getAllocatableSet(Fn);
815 for (unsigned i = 0, e = Allocable.size(); i != e; ++i)
817 PhysRegsUsed[i] = -2; // Mark the reg unallocable.
820 // initialize the virtual->physical register map to have a 'null'
821 // mapping for all virtual registers
822 Virt2PhysRegMap.grow(MF->getRegInfo().getLastVirtReg());
824 // Loop over all of the basic blocks, eliminating virtual register references
825 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
827 AllocateBasicBlock(*MBB);
829 StackSlotForVirtReg.clear();
830 PhysRegsUsed.clear();
831 VirtRegModified.clear();
832 Virt2PhysRegMap.clear();
836 FunctionPass *llvm::createLocalRegisterAllocator() {
837 return new RALocal();