lib/CodeGen/RegAllocLinearScan.cpp

   1 //===-- RegAllocLinearScan.cpp - Linear Scan register allocator -----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by the LLVM research group and is distributed under
   6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements a linear scan register allocator.
  11 //
  12 //===----------------------------------------------------------------------===//
  13 #define DEBUG_TYPE "regalloc"
  14 #include "llvm/Function.h"
  15 #include "llvm/CodeGen/LiveIntervals.h"
  16 #include "llvm/CodeGen/LiveVariables.h"
  17 #include "llvm/CodeGen/MachineFrameInfo.h"
  18 #include "llvm/CodeGen/MachineFunctionPass.h"
  19 #include "llvm/CodeGen/MachineInstr.h"
  20 #include "llvm/CodeGen/Passes.h"
  21 #include "llvm/CodeGen/SSARegMap.h"
  22 #include "llvm/Target/MRegisterInfo.h"
  23 #include "llvm/Target/TargetInstrInfo.h"
  24 #include "llvm/Target/TargetMachine.h"
  25 #include "llvm/Target/TargetRegInfo.h"
  26 #include "llvm/Support/CFG.h"
  27 #include "Support/Debug.h"
  28 #include "Support/DepthFirstIterator.h"
  29 #include "Support/Statistic.h"
  30 #include "Support/STLExtras.h"
  31 #include <iostream>
  32
  33 using namespace llvm;
  34
  35 namespace {
  36     Statistic<> numSpilled ("ra-linearscan", "Number of registers spilled");
  37
  38     class RA : public MachineFunctionPass {
  39     public:
  40         typedef std::vector<const LiveIntervals::Interval*> IntervalPtrs;
  41
  42     private:
  43         MachineFunction* mf_;
  44         const TargetMachine* tm_;
  45         const MRegisterInfo* mri_;
  46         MachineBasicBlock* currentMbb_;
  47         MachineBasicBlock::iterator currentInstr_;
  48         typedef LiveIntervals::Intervals Intervals;
  49         const Intervals* li_;
  50         IntervalPtrs active_, inactive_;
  51
  52         typedef std::vector<unsigned> Regs;
  53         Regs tempUseOperands_;
  54         Regs tempDefOperands_;
  55
  56         Regs reserved_;
  57
  58         typedef LiveIntervals::MachineBasicBlockPtrs MachineBasicBlockPtrs;
  59         MachineBasicBlockPtrs mbbs_;
  60
  61         typedef std::vector<unsigned> Phys2VirtMap;
  62         Phys2VirtMap p2vMap_;
  63
  64         typedef std::map<unsigned, unsigned> Virt2PhysMap;
  65         Virt2PhysMap v2pMap_;
  66
  67         typedef std::map<unsigned, int> Virt2StackSlotMap;
  68         Virt2StackSlotMap v2ssMap_;
  69
  70         int instrAdded_;
  71
  72     public:
  73         virtual const char* getPassName() const {
  74             return "Linear Scan Register Allocator";
  75         }
  76
  77         virtual void getAnalysisUsage(AnalysisUsage &AU) const {
  78             AU.addRequired<LiveVariables>();
  79             AU.addRequired<LiveIntervals>();
  80             MachineFunctionPass::getAnalysisUsage(AU);
  81         }
  82
  83     private:
  84         /// runOnMachineFunction - register allocate the whole function
  85         bool runOnMachineFunction(MachineFunction&);
  86
  87         /// processActiveIntervals - expire old intervals and move
  88         /// non-overlapping ones to the incative list
  89         void processActiveIntervals(Intervals::const_iterator cur);
  90
  91         /// processInactiveIntervals - expire old intervals and move
  92         /// overlapping ones to the active list
  93         void processInactiveIntervals(Intervals::const_iterator cur);
  94
  95         /// assignStackSlotAtInterval - choose and spill
  96         /// interval. Currently we spill the interval with the last
  97         /// end point in the active and inactive lists and the current
  98         /// interval
  99         void assignStackSlotAtInterval(Intervals::const_iterator cur);
 100
 101         ///
 102         /// register handling helpers
 103         ///
 104
 105         /// reservePhysReg - reserves a physical register and spills
 106         /// any value assigned to it if any
 107         void reservePhysReg(unsigned reg);
 108
 109         /// clearReservedPhysReg - marks pysical register as free for
 110         /// use
 111         void clearReservedPhysReg(unsigned reg);
 112
 113         /// physRegAvailable - returns true if the specifed physical
 114         /// register is available
 115         bool physRegAvailable(unsigned physReg);
 116
 117         /// getFreePhysReg - return a free physical register for this
 118         /// virtual register if we have one, otherwise return 0
 119         unsigned getFreePhysReg(unsigned virtReg);
 120
 121
 122         /// tempPhysRegAvailable - returns true if the specifed
 123         /// temporary physical register is available
 124         bool tempPhysRegAvailable(unsigned physReg);
 125
 126         /// getFreeTempPhysReg - return a free temprorary physical
 127         /// register for this register class if we have one (should
 128         /// never return 0)
 129         unsigned getFreeTempPhysReg(const TargetRegisterClass* rc);
 130
 131         /// getFreeTempPhysReg - return a free temprorary physical
 132         /// register for this virtual register if we have one (should
 133         /// never return 0)
 134         unsigned getFreeTempPhysReg(unsigned virtReg) {
 135             const TargetRegisterClass* rc =
 136                 mf_->getSSARegMap()->getRegClass(virtReg);
 137             return getFreeTempPhysReg(rc);
 138         }
 139
 140         /// assignVirt2PhysReg - assigns the free physical register to
 141         /// the virtual register passed as arguments
 142         void assignVirt2PhysReg(unsigned virtReg, unsigned physReg);
 143
 144         /// clearVirtReg - free the physical register associated with this
 145         /// virtual register and disassociate virtual->physical and
 146         /// physical->virtual mappings
 147         void clearVirtReg(unsigned virtReg);
 148
 149         /// assignVirt2StackSlot - assigns this virtual register to a
 150         /// stack slot
 151         void assignVirt2StackSlot(unsigned virtReg);
 152
 153         /// getStackSlot - returns the offset of the specified
 154         /// register on the stack
 155         int getStackSlot(unsigned virtReg);
 156
 157         /// spillVirtReg - spills the virtual register
 158         void spillVirtReg(unsigned virtReg);
 159
 160         /// loadPhysReg - loads to the physical register the value of
 161         /// the virtual register specifed. Virtual register must have
 162         /// an assigned stack slot
 163         void loadVirt2PhysReg(unsigned virtReg, unsigned physReg);
 164
 165         void printVirt2PhysMap() const {
 166             std::cerr << "allocated registers:\n";
 167             for (Virt2PhysMap::const_iterator
 168                      i = v2pMap_.begin(), e = v2pMap_.end(); i != e; ++i) {
 169                 std::cerr << '[' << i->first << ','
 170                           << mri_->getName(i->second) << "]\n";
 171             }
 172             std::cerr << '\n';
 173         }
 174         void printIntervals(const char* const str,
 175                             RA::IntervalPtrs::const_iterator i,
 176                             RA::IntervalPtrs::const_iterator e) const {
 177             if (str) std::cerr << str << " intervals:\n";
 178             for (; i != e; ++i) {
 179                 std::cerr << "\t\t" << **i << " -> ";
 180                 if ((*i)->reg < MRegisterInfo::FirstVirtualRegister) {
 181                     std::cerr << mri_->getName((*i)->reg);
 182                 }
 183                 else {
 184                     std::cerr << mri_->getName(v2pMap_.find((*i)->reg)->second);
 185                 }
 186                 std::cerr << '\n';
 187             }
 188         }
 189     };
 190 }
 191
 192 bool RA::runOnMachineFunction(MachineFunction &fn) {
 193     mf_ = &fn;
 194     tm_ = &fn.getTarget();
 195     mri_ = tm_->getRegisterInfo();
 196     li_ = &getAnalysis<LiveIntervals>().getIntervals();
 197     active_.clear();
 198     inactive_.clear();
 199     mbbs_ = getAnalysis<LiveIntervals>().getOrderedMachineBasicBlockPtrs();
 200     p2vMap_.resize(MRegisterInfo::FirstVirtualRegister-1);
 201     p2vMap_.clear();
 202     v2pMap_.clear();
 203     v2ssMap_.clear();
 204
 205     DEBUG(
 206         for (MachineBasicBlockPtrs::iterator
 207                  mbbi = mbbs_.begin(), mbbe = mbbs_.end();
 208              mbbi != mbbe; ++mbbi) {
 209             MachineBasicBlock* mbb = *mbbi;
 210             std::cerr << mbb->getBasicBlock()->getName() << '\n';
 211             for (MachineBasicBlock::iterator
 212                      ii = mbb->begin(), ie = mbb->end();
 213                  ii != ie; ++ii) {
 214                 MachineInstr* instr = *ii;
 215
 216                 std::cerr << "\t";
 217                 instr->print(std::cerr, *tm_);
 218             }
 219         }
 220         );
 221
 222     // FIXME: this will work only for the X86 backend. I need to
 223     // device an algorthm to select the minimal (considering register
 224     // aliasing) number of temp registers to reserve so that we have 2
 225     // registers for each register class available.
 226
 227     // reserve R32: EDI, EBX,
 228     //         R16:  DI,  BX,
 229     //         R8:   DH,  BH,
 230     //         RFP: FP5, FP6
 231     reserved_.push_back(19); /* EDI */
 232     reserved_.push_back(17); /* EBX */
 233     reserved_.push_back(12); /*  DI */
 234     reserved_.push_back( 7); /*  BX */
 235     reserved_.push_back(11); /*  DH */
 236     reserved_.push_back( 4); /*  BH */
 237     reserved_.push_back(28); /* FP5 */
 238     reserved_.push_back(29); /* FP6 */
 239
 240     // liner scan algorithm
 241     for (Intervals::const_iterator
 242              i = li_->begin(), e = li_->end(); i != e; ++i) {
 243         DEBUG(std::cerr << "processing current interval: " << *i << '\n');
 244
 245         DEBUG(printIntervals("\tactive", active_.begin(), active_.end()));
 246         DEBUG(printIntervals("\tinactive", inactive_.begin(), inactive_.end()));
 247
 248         processActiveIntervals(i);
 249         // processInactiveIntervals(i);
 250
 251         // if this register is preallocated, look for an interval that
 252         // overlaps with it and assign it to a memory location
 253         if (i->reg < MRegisterInfo::FirstVirtualRegister) {
 254             reservePhysReg(i->reg);
 255             active_.push_back(&*i);
 256         }
 257         // otherwise we are allocating a virtual register. try to find
 258         // a free physical register or spill an interval in order to
 259         // assign it one (we could spill the current though).
 260         else {
 261             unsigned physReg = getFreePhysReg(i->reg);
 262             if (!physReg) {
 263                 assignStackSlotAtInterval(i);
 264             }
 265             else {
 266                 assignVirt2PhysReg(i->reg, physReg);
 267                 active_.push_back(&*i);
 268             }
 269         }
 270     }
 271     DEBUG(std::cerr << "finished register allocation\n");
 272     DEBUG(printVirt2PhysMap());
 273
 274     DEBUG(std::cerr << "Rewrite machine code:\n");
 275     for (MachineBasicBlockPtrs::iterator
 276              mbbi = mbbs_.begin(), mbbe = mbbs_.end(); mbbi != mbbe; ++mbbi) {
 277         instrAdded_ = 0;
 278         currentMbb_ = *mbbi;
 279
 280         for (currentInstr_ = currentMbb_->begin();
 281              currentInstr_ != currentMbb_->end(); ++currentInstr_) {
 282
 283             DEBUG(std::cerr << "\tinstruction: ";
 284                   (*currentInstr_)->print(std::cerr, *tm_););
 285
 286             // use our current mapping and actually replace and
 287             // virtual register with its allocated physical registers
 288             DEBUG(std::cerr << "\t\treplacing virtual registers with mapped "
 289                   "physical registers:\n");
 290             for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
 291                  i != e; ++i) {
 292                 MachineOperand& op = (*currentInstr_)->getOperand(i);
 293                 if (op.isVirtualRegister()) {
 294                     unsigned virtReg = op.getAllocatedRegNum();
 295                     unsigned physReg = v2pMap_[virtReg];
 296                     // if this virtual registers lives on the stack,
 297                     // load it to a temporary physical register
 298                     if (physReg) {
 299                         DEBUG(std::cerr << "\t\t\t%reg" << virtReg
 300                               << " -> " << mri_->getName(physReg) << '\n');
 301                         (*currentInstr_)->SetMachineOperandReg(i, physReg);
 302                     }
 303                 }
 304             }
 305
 306             DEBUG(std::cerr << "\t\tloading temporarily used operands to "
 307                   "registers:\n");
 308             for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
 309                  i != e; ++i) {
 310                 MachineOperand& op = (*currentInstr_)->getOperand(i);
 311                 if (op.isVirtualRegister() && op.opIsUse()) {
 312                     unsigned virtReg = op.getAllocatedRegNum();
 313                     unsigned physReg = v2pMap_[virtReg];
 314                     if (!physReg) {
 315                         physReg = getFreeTempPhysReg(virtReg);
 316                     }
 317                     loadVirt2PhysReg(virtReg, physReg);
 318                     tempUseOperands_.push_back(virtReg);
 319                     (*currentInstr_)->SetMachineOperandReg(i, physReg);
 320                 }
 321             }
 322
 323             DEBUG(std::cerr << "\t\tclearing temporarily used operands:\n");
 324             for (unsigned i = 0, e = tempUseOperands_.size(); i != e; ++i) {
 325                 clearVirtReg(tempUseOperands_[i]);
 326             }
 327             tempUseOperands_.clear();
 328
 329             DEBUG(std::cerr << "\t\tassigning temporarily defined operands to "
 330                   "registers:\n");
 331             for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
 332                  i != e; ++i) {
 333                 MachineOperand& op = (*currentInstr_)->getOperand(i);
 334                 if (op.isVirtualRegister() && !op.opIsUse()) {
 335                     unsigned virtReg = op.getAllocatedRegNum();
 336                     unsigned physReg = v2pMap_[virtReg];
 337                     if (!physReg) {
 338                         physReg = getFreeTempPhysReg(virtReg);
 339                     }
 340                     if (op.opIsDefAndUse()) {
 341                         loadVirt2PhysReg(virtReg, physReg);
 342                     }
 343                     else {
 344                         assignVirt2PhysReg(virtReg, physReg);
 345                     }
 346                     tempDefOperands_.push_back(virtReg);
 347                     (*currentInstr_)->SetMachineOperandReg(i, physReg);
 348                 }
 349             }
 350
 351
 352             // if the instruction is a two address instruction and the
 353             // source operands are not identical we need to insert
 354             // extra instructions.
 355
 356             unsigned opcode = (*currentInstr_)->getOpcode();
 357             if (tm_->getInstrInfo().isTwoAddrInstr(opcode) &&
 358                 (*currentInstr_)->getOperand(0).getAllocatedRegNum() !=
 359                 (*currentInstr_)->getOperand(1).getAllocatedRegNum()) {
 360                 assert((*currentInstr_)->getOperand(1).isRegister() &&
 361                        (*currentInstr_)->getOperand(1).getAllocatedRegNum() &&
 362                        (*currentInstr_)->getOperand(1).opIsUse() &&
 363                        "Two address instruction invalid");
 364
 365                 unsigned regA =
 366                     (*currentInstr_)->getOperand(0).getAllocatedRegNum();
 367                 unsigned regB =
 368                     (*currentInstr_)->getOperand(1).getAllocatedRegNum();
 369                 unsigned regC =
 370                     ((*currentInstr_)->getNumOperands() > 2 &&
 371                      (*currentInstr_)->getOperand(2).isRegister()) ?
 372                     (*currentInstr_)->getOperand(2).getAllocatedRegNum() :
 373                     0;
 374
 375                 const TargetRegisterClass* rc = mri_->getRegClass(regA);
 376
 377                 // special case: "a = b op a". If b is a temporary
 378                 // reserved register rewrite as: "b = b op a; a = b"
 379                 // otherwise use a temporary reserved register t and
 380                 // rewrite as: "t = b; t = t op a; a = t"
 381                 if (regC && regA == regC) {
 382                     // b is a temp reserved register
 383                     if (find(reserved_.begin(), reserved_.end(),
 384                              regB) != reserved_.end()) {
 385                         (*currentInstr_)->SetMachineOperandReg(0, regB);
 386                         ++currentInstr_;
 387                         instrAdded_ += mri_->copyRegToReg(*currentMbb_,
 388                                                           currentInstr_,
 389                                                           regA,
 390                                                           regB,
 391                                                           rc);
 392                         --currentInstr_;
 393                     }
 394                     // b is just a normal register
 395                     else {
 396                         unsigned tempReg = getFreeTempPhysReg(rc);
 397                         assert (tempReg &&
 398                                 "no free temp reserved physical register?");
 399                         instrAdded_ += mri_->copyRegToReg(*currentMbb_,
 400                                                           currentInstr_,
 401                                                           tempReg,
 402                                                           regB,
 403                                                           rc);
 404                         (*currentInstr_)->SetMachineOperandReg(0, tempReg);
 405                         (*currentInstr_)->SetMachineOperandReg(1, tempReg);
 406                         ++currentInstr_;
 407                         instrAdded_ += mri_->copyRegToReg(*currentMbb_,
 408                                                           currentInstr_,
 409                                                           regA,
 410                                                           tempReg,
 411                                                           rc);
 412                         --currentInstr_;
 413                     }
 414                 }
 415                 // "a = b op c" gets rewritten to "a = b; a = a op c"
 416                 else {
 417                     instrAdded_ += mri_->copyRegToReg(*currentMbb_,
 418                                                       currentInstr_,
 419                                                       regA,
 420                                                       regB,
 421                                                       rc);
 422                     (*currentInstr_)->SetMachineOperandReg(1, regA);
 423                 }
 424             }
 425
 426             DEBUG(std::cerr << "\t\tspilling temporarily defined operands "
 427                   "of this instruction:\n");
 428             ++currentInstr_; // we want to insert after this instruction
 429             for (unsigned i = 0, e = tempDefOperands_.size(); i != e; ++i) {
 430                 spillVirtReg(tempDefOperands_[i]);
 431             }
 432             --currentInstr_; // restore currentInstr_ iterator
 433             tempDefOperands_.clear();
 434         }
 435
 436         for (unsigned i = 0, e = p2vMap_.size(); i != e; ++i) {
 437             assert(p2vMap_[i] != i &&
 438                    "reserved physical registers at end of basic block?");
 439         }
 440     }
 441
 442     return true;
 443 }
 444
 445 void RA::processActiveIntervals(Intervals::const_iterator cur)
 446 {
 447     DEBUG(std::cerr << "\tprocessing active intervals:\n");
 448     for (IntervalPtrs::iterator i = active_.begin(); i != active_.end();) {
 449         unsigned reg = (*i)->reg;
 450         // remove expired intervals. we expire earlier because this if
 451         // an interval expires this is going to be the last use. in
 452         // this case we can reuse the register for a def in the same
 453         // instruction
 454         if ((*i)->expired(cur->start() + 1)) {
 455             DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
 456             if (reg < MRegisterInfo::FirstVirtualRegister) {
 457                 clearReservedPhysReg(reg);
 458             }
 459             else {
 460                 p2vMap_[v2pMap_[reg]] = 0;
 461             }
 462             // remove interval from active
 463             i = active_.erase(i);
 464         }
 465         // move not active intervals to inactive list
 466 //         else if (!(*i)->overlaps(curIndex)) {
 467 //             DEBUG(std::cerr << "\t\t\tinterval " << **i << " inactive\n");
 468 //             unmarkReg(virtReg);
 469 //             // add interval to inactive
 470 //             inactive_.push_back(*i);
 471 //             // remove interval from active
 472 //             i = active_.erase(i);
 473 //         }
 474         else {
 475             ++i;
 476         }
 477     }
 478 }
 479
 480 void RA::processInactiveIntervals(Intervals::const_iterator cur)
 481 {
 482 //     DEBUG(std::cerr << "\tprocessing inactive intervals:\n");
 483 //     for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end();) {
 484 //         unsigned virtReg = (*i)->reg;
 485 //         // remove expired intervals
 486 //         if ((*i)->expired(curIndex)) {
 487 //             DEBUG(std::cerr << "\t\t\tinterval " << **i << " expired\n");
 488 //             freePhysReg(virtReg);
 489 //             // remove from inactive
 490 //             i = inactive_.erase(i);
 491 //         }
 492 //         // move re-activated intervals in active list
 493 //         else if ((*i)->overlaps(curIndex)) {
 494 //             DEBUG(std::cerr << "\t\t\tinterval " << **i << " active\n");
 495 //             markReg(virtReg);
 496 //             // add to active
 497 //             active_.push_back(*i);
 498 //             // remove from inactive
 499 //             i = inactive_.erase(i);
 500 //         }
 501 //         else {
 502 //             ++i;
 503 //         }
 504 //     }
 505 }
 506
 507 void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
 508 {
 509     DEBUG(std::cerr << "\t\tassigning stack slot at interval "
 510           << *cur << ":\n");
 511     assert(!active_.empty() &&
 512            "active set cannot be empty when choosing a register to spill");
 513     const TargetRegisterClass* rcCur =
 514         mf_->getSSARegMap()->getRegClass(cur->reg);
 515
 516     // find the interval for a virtual register that ends last in
 517     // active and belongs to the same register class as the current
 518     // interval
 519     IntervalPtrs::iterator lastEndActive = active_.begin();
 520     for (IntervalPtrs::iterator e = active_.end();
 521          lastEndActive != e; ++lastEndActive) {
 522         if ((*lastEndActive)->reg >= MRegisterInfo::FirstVirtualRegister) {
 523             const TargetRegisterClass* rc =
 524                 mri_->getRegClass(v2pMap_[(*lastEndActive)->reg]);
 525             if (rcCur == rc) {
 526                 break;
 527             }
 528         }
 529     }
 530     for (IntervalPtrs::iterator i = lastEndActive, e = active_.end();
 531          i != e; ++i) {
 532         if ((*i)->reg >= MRegisterInfo::FirstVirtualRegister) {
 533             const TargetRegisterClass* rc =
 534                 mri_->getRegClass(v2pMap_[(*i)->reg]);
 535             if (rcCur == rc &&
 536                 (*lastEndActive)->end() < (*i)->end()) {
 537                 lastEndActive = i;
 538             }
 539         }
 540     }
 541
 542     // find the interval for a virtual register that ends last in
 543     // inactive and belongs to the same register class as the current
 544     // interval
 545     IntervalPtrs::iterator lastEndInactive = inactive_.begin();
 546     for (IntervalPtrs::iterator e = inactive_.end();
 547          lastEndInactive != e; ++lastEndInactive) {
 548         if ((*lastEndInactive)->reg >= MRegisterInfo::FirstVirtualRegister) {
 549             const TargetRegisterClass* rc =
 550                 mri_->getRegClass(v2pMap_[(*lastEndInactive)->reg]);
 551             if (rcCur == rc) {
 552                 break;
 553             }
 554         }
 555     }
 556     for (IntervalPtrs::iterator i = lastEndInactive, e = inactive_.end();
 557          i != e; ++i) {
 558         if ((*i)->reg >= MRegisterInfo::FirstVirtualRegister) {
 559             const TargetRegisterClass* rc =
 560                 mri_->getRegClass(v2pMap_[(*i)->reg]);
 561             if (rcCur == rc &&
 562                 (*lastEndInactive)->end() < (*i)->end()) {
 563                 lastEndInactive = i;
 564             }
 565         }
 566     }
 567
 568     unsigned lastEndActiveInactive = 0;
 569     if (lastEndActive != active_.end() &&
 570         lastEndActiveInactive < (*lastEndActive)->end()) {
 571         lastEndActiveInactive = (*lastEndActive)->end();
 572     }
 573     if (lastEndInactive != inactive_.end() &&
 574         lastEndActiveInactive < (*lastEndInactive)->end()) {
 575         lastEndActiveInactive = (*lastEndInactive)->end();
 576     }
 577
 578     if (lastEndActiveInactive > cur->end()) {
 579         if (lastEndInactive == inactive_.end() ||
 580             (*lastEndActive)->end() > (*lastEndInactive)->end()) {
 581             assignVirt2StackSlot((*lastEndActive)->reg);
 582             active_.erase(lastEndActive);
 583         }
 584         else {
 585             assignVirt2StackSlot((*lastEndInactive)->reg);
 586             inactive_.erase(lastEndInactive);
 587         }
 588         unsigned physReg = getFreePhysReg(cur->reg);
 589         assert(physReg && "no free physical register after spill?");
 590         assignVirt2PhysReg(cur->reg, physReg);
 591         active_.push_back(&*cur);
 592     }
 593     else {
 594         assignVirt2StackSlot(cur->reg);
 595     }
 596 }
 597
 598 void RA::reservePhysReg(unsigned physReg)
 599 {
 600     DEBUG(std::cerr << "\t\t\treserving physical register: "
 601           << mri_->getName(physReg) << '\n');
 602     // if this register holds a value spill it
 603     unsigned virtReg = p2vMap_[physReg];
 604     if (virtReg != 0) {
 605         assert(virtReg != physReg && "reserving an already reserved phus reg?");
 606         // remove interval from active
 607         for (IntervalPtrs::iterator i = active_.begin(), e = active_.end();
 608              i != e; ++i) {
 609             if ((*i)->reg == virtReg) {
 610                 active_.erase(i);
 611                 break;
 612             }
 613         }
 614         assignVirt2StackSlot(virtReg);
 615     }
 616     p2vMap_[physReg] = physReg; // this denotes a reserved physical register
 617 }
 618
 619 void RA::clearReservedPhysReg(unsigned physReg)
 620 {
 621     DEBUG(std::cerr << "\t\t\tclearing reserved physical register: "
 622           << mri_->getName(physReg) << '\n');
 623     assert(p2vMap_[physReg] == physReg &&
 624            "attempt to clear a non reserved physical register");
 625     p2vMap_[physReg] = 0;
 626 }
 627
 628 bool RA::physRegAvailable(unsigned physReg)
 629 {
 630     if (p2vMap_[physReg]) {
 631         return false;
 632     }
 633
 634     // if it aliases other registers it is still not free
 635     for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
 636         if (p2vMap_[*as]) {
 637             return false;
 638         }
 639     }
 640
 641     // if it is one of the reserved registers it is still not free
 642     if (find(reserved_.begin(), reserved_.end(), physReg) != reserved_.end()) {
 643         return false;
 644     }
 645
 646     return true;
 647 }
 648
 649 unsigned RA::getFreePhysReg(unsigned virtReg)
 650 {
 651     DEBUG(std::cerr << "\t\tgetting free physical register: ");
 652     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
 653     TargetRegisterClass::iterator reg = rc->allocation_order_begin(*mf_);
 654     TargetRegisterClass::iterator regEnd = rc->allocation_order_end(*mf_);
 655
 656     for (; reg != regEnd; ++reg) {
 657         if (physRegAvailable(*reg)) {
 658             assert(*reg != 0 && "Cannot use register!");
 659             DEBUG(std::cerr << mri_->getName(*reg) << '\n');
 660             return *reg; // Found an unused register!
 661         }
 662     }
 663
 664     DEBUG(std::cerr << "no free register\n");
 665     return 0;
 666 }
 667
 668 bool RA::tempPhysRegAvailable(unsigned physReg)
 669 {
 670     assert(find(reserved_.begin(), reserved_.end(), physReg) != reserved_.end()
 671            && "cannot call this method with a non reserved temp register");
 672
 673     if (p2vMap_[physReg]) {
 674         return false;
 675     }
 676
 677     // if it aliases other registers it is still not free
 678     for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
 679         if (p2vMap_[*as]) {
 680             return false;
 681         }
 682     }
 683
 684     return true;
 685 }
 686
 687 unsigned RA::getFreeTempPhysReg(const TargetRegisterClass* rc)
 688 {
 689     DEBUG(std::cerr << "\t\tgetting free temporary physical register: ");
 690
 691     for (Regs::const_iterator
 692              reg = reserved_.begin(), regEnd = reserved_.end();
 693          reg != regEnd; ++reg) {
 694         if (rc == mri_->getRegClass(*reg) && tempPhysRegAvailable(*reg)) {
 695             assert(*reg != 0 && "Cannot use register!");
 696             DEBUG(std::cerr << mri_->getName(*reg) << '\n');
 697             return *reg; // Found an unused register!
 698         }
 699     }
 700     assert(0 && "no free temporary physical register?");
 701     return 0;
 702 }
 703
 704 void RA::assignVirt2PhysReg(unsigned virtReg, unsigned physReg)
 705 {
 706     assert((physRegAvailable(physReg) ||
 707             find(reserved_.begin(),
 708                  reserved_.end(),
 709                  physReg) != reserved_.end()) &&
 710            "attempt to allocate to a not available physical register");
 711     v2pMap_[virtReg] = physReg;
 712     p2vMap_[physReg] = virtReg;
 713 }
 714
 715 void RA::clearVirtReg(unsigned virtReg)
 716 {
 717     Virt2PhysMap::iterator it = v2pMap_.find(virtReg);
 718     assert(it != v2pMap_.end() &&
 719            "attempting to clear a not allocated virtual register");
 720     unsigned physReg = it->second;
 721     p2vMap_[physReg] = 0;
 722     v2pMap_[virtReg] = 0; // this marks that this virtual register
 723                           // lives on the stack
 724     DEBUG(std::cerr << "\t\t\tcleared register " << mri_->getName(physReg)
 725           << "\n");
 726 }
 727
 728 void RA::assignVirt2StackSlot(unsigned virtReg)
 729 {
 730     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
 731     int frameIndex = mf_->getFrameInfo()->CreateStackObject(rc);
 732
 733     bool inserted = v2ssMap_.insert(std::make_pair(virtReg, frameIndex)).second;
 734     assert(inserted &&
 735            "attempt to assign stack slot to already assigned register?");
 736     // if the virtual register was previously assigned clear the mapping
 737     // and free the virtual register
 738     if (v2pMap_.find(virtReg) != v2pMap_.end()) {
 739         clearVirtReg(virtReg);
 740     }
 741     else {
 742         v2pMap_[virtReg] = 0; // this marks that this virtual register
 743                               // lives on the stack
 744     }
 745 }
 746
 747 int RA::getStackSlot(unsigned virtReg)
 748 {
 749     // use lower_bound so that we can do a possibly O(1) insert later
 750     // if necessary
 751     Virt2StackSlotMap::iterator it = v2ssMap_.find(virtReg);
 752     assert(it != v2ssMap_.end() &&
 753            "attempt to get stack slot on register that does not live on the stack");
 754     return it->second;
 755 }
 756
 757 void RA::spillVirtReg(unsigned virtReg)
 758 {
 759     DEBUG(std::cerr << "\t\t\tspilling register: " << virtReg);
 760     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
 761     int frameIndex = getStackSlot(virtReg);
 762     DEBUG(std::cerr << " to stack slot #" << frameIndex << '\n');
 763     ++numSpilled;
 764     instrAdded_ += mri_->storeRegToStackSlot(*currentMbb_, currentInstr_,
 765                                              v2pMap_[virtReg], frameIndex, rc);
 766     clearVirtReg(virtReg);
 767 }
 768
 769 void RA::loadVirt2PhysReg(unsigned virtReg, unsigned physReg)
 770 {
 771     DEBUG(std::cerr << "\t\t\tloading register: " << virtReg);
 772     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
 773     int frameIndex = getStackSlot(virtReg);
 774     DEBUG(std::cerr << " from stack slot #" << frameIndex << '\n');
 775     instrAdded_ += mri_->loadRegFromStackSlot(*currentMbb_, currentInstr_,
 776                                               physReg, frameIndex, rc);
 777     assignVirt2PhysReg(virtReg, physReg);
 778 }
 779
 780 FunctionPass* llvm::createLinearScanRegisterAllocator() {
 781     return new RA();
 782 }