lib/CodeGen/RegAllocLinearScan.cpp

   1 //===-- RegAllocLinearScan.cpp - Linear Scan register allocator -----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by the LLVM research group and is distributed under
   6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements a linear scan register allocator.
  11 //
  12 //===----------------------------------------------------------------------===//
  13 #define DEBUG_TYPE "regalloc"
  14 #include "llvm/Function.h"
  15 #include "llvm/CodeGen/LiveIntervals.h"
  16 #include "llvm/CodeGen/LiveVariables.h"
  17 #include "llvm/CodeGen/MachineFrameInfo.h"
  18 #include "llvm/CodeGen/MachineFunctionPass.h"
  19 #include "llvm/CodeGen/MachineInstr.h"
  20 #include "llvm/CodeGen/Passes.h"
  21 #include "llvm/CodeGen/SSARegMap.h"
  22 #include "llvm/Target/MRegisterInfo.h"
  23 #include "llvm/Target/TargetInstrInfo.h"
  24 #include "llvm/Target/TargetMachine.h"
  25 #include "llvm/Target/TargetRegInfo.h"
  26 #include "llvm/Support/CFG.h"
  27 #include "Support/Debug.h"
  28 #include "Support/DepthFirstIterator.h"
  29 #include "Support/Statistic.h"
  30 #include "Support/STLExtras.h"
  31 #include <iostream>
  32
  33 using namespace llvm;
  34
  35 namespace {
  36     Statistic<> numSpilled ("ra-linearscan", "Number of registers spilled");
  37
  38     class RA : public MachineFunctionPass {
  39     public:
  40         typedef std::vector<const LiveIntervals::Interval*> IntervalPtrs;
  41
  42     private:
  43         MachineFunction* mf_;
  44         const TargetMachine* tm_;
  45         const MRegisterInfo* mri_;
  46         MachineBasicBlock* currentMbb_;
  47         MachineBasicBlock::iterator currentInstr_;
  48         typedef LiveIntervals::Intervals Intervals;
  49         const Intervals* li_;
  50         IntervalPtrs active_, inactive_;
  51
  52         typedef std::vector<unsigned> Regs;
  53         Regs tempUseOperands_;
  54         Regs tempDefOperands_;
  55
  56         Regs reserved_;
  57
  58         typedef LiveIntervals::MachineBasicBlockPtrs MachineBasicBlockPtrs;
  59         MachineBasicBlockPtrs mbbs_;
  60
  61         typedef std::vector<unsigned> Phys2VirtMap;
  62         Phys2VirtMap p2vMap_;
  63
  64         typedef std::map<unsigned, unsigned> Virt2PhysMap;
  65         Virt2PhysMap v2pMap_;
  66
  67         typedef std::map<unsigned, int> Virt2StackSlotMap;
  68         Virt2StackSlotMap v2ssMap_;
  69
  70         int instrAdded_;
  71
  72     public:
  73         virtual const char* getPassName() const {
  74             return "Linear Scan Register Allocator";
  75         }
  76
  77         virtual void getAnalysisUsage(AnalysisUsage &AU) const {
  78             AU.addRequired<LiveVariables>();
  79             AU.addRequired<LiveIntervals>();
  80             MachineFunctionPass::getAnalysisUsage(AU);
  81         }
  82
  83     private:
  84         /// runOnMachineFunction - register allocate the whole function
  85         bool runOnMachineFunction(MachineFunction&);
  86
  87         /// processActiveIntervals - expire old intervals and move
  88         /// non-overlapping ones to the incative list
  89         void processActiveIntervals(Intervals::const_iterator cur);
  90
  91         /// processInactiveIntervals - expire old intervals and move
  92         /// overlapping ones to the active list
  93         void processInactiveIntervals(Intervals::const_iterator cur);
  94
  95         /// assignStackSlotAtInterval - choose and spill
  96         /// interval. Currently we spill the interval with the last
  97         /// end point in the active and inactive lists and the current
  98         /// interval
  99         void assignStackSlotAtInterval(Intervals::const_iterator cur);
 100
 101         ///
 102         /// register handling helpers
 103         ///
 104
 105         /// reservePhysReg - reserves a physical register and spills
 106         /// any value assigned to it if any
 107         void reservePhysReg(unsigned reg);
 108
 109         /// clearReservedPhysReg - marks pysical register as free for
 110         /// use
 111         void clearReservedPhysReg(unsigned reg);
 112
 113         /// physRegAvailable - returns true if the specifed physical
 114         /// register is available
 115         bool physRegAvailable(unsigned physReg);
 116
 117         /// getFreePhysReg - return a free physical register for this
 118         /// virtual register if we have one, otherwise return 0
 119         unsigned getFreePhysReg(unsigned virtReg);
 120
 121
 122         /// tempPhysRegAvailable - returns true if the specifed
 123         /// temporary physical register is available
 124         bool tempPhysRegAvailable(unsigned physReg);
 125
 126         /// getFreeTempPhysReg - return a free temprorary physical
 127         /// register for this register class if we have one (should
 128         /// never return 0)
 129         unsigned getFreeTempPhysReg(const TargetRegisterClass* rc);
 130
 131         /// getFreeTempPhysReg - return a free temprorary physical
 132         /// register for this virtual register if we have one (should
 133         /// never return 0)
 134         unsigned getFreeTempPhysReg(unsigned virtReg) {
 135             const TargetRegisterClass* rc =
 136                 mf_->getSSARegMap()->getRegClass(virtReg);
 137             return getFreeTempPhysReg(rc);
 138         }
 139
 140         /// assignVirt2PhysReg - assigns the free physical register to
 141         /// the virtual register passed as arguments
 142         void assignVirt2PhysReg(unsigned virtReg, unsigned physReg);
 143
 144         /// clearVirtReg - free the physical register associated with this
 145         /// virtual register and disassociate virtual->physical and
 146         /// physical->virtual mappings
 147         void clearVirtReg(unsigned virtReg);
 148
 149         /// assignVirt2StackSlot - assigns this virtual register to a
 150         /// stack slot
 151         void assignVirt2StackSlot(unsigned virtReg);
 152
 153         /// getStackSlot - returns the offset of the specified
 154         /// register on the stack
 155         int getStackSlot(unsigned virtReg);
 156
 157         /// spillVirtReg - spills the virtual register
 158         void spillVirtReg(unsigned virtReg);
 159
 160         /// loadPhysReg - loads to the physical register the value of
 161         /// the virtual register specifed. Virtual register must have
 162         /// an assigned stack slot
 163         void loadVirt2PhysReg(unsigned virtReg, unsigned physReg);
 164
 165         void printVirt2PhysMap() const {
 166             std::cerr << "allocated registers:\n";
 167             for (Virt2PhysMap::const_iterator
 168                      i = v2pMap_.begin(), e = v2pMap_.end(); i != e; ++i) {
 169                 std::cerr << '[' << i->first << ','
 170                           << mri_->getName(i->second) << "]\n";
 171             }
 172             std::cerr << '\n';
 173         }
 174         void printIntervals(const char* const str,
 175                             RA::IntervalPtrs::const_iterator i,
 176                             RA::IntervalPtrs::const_iterator e) const {
 177             if (str) std::cerr << str << " intervals:\n";
 178             for (; i != e; ++i) {
 179                 std::cerr << "\t\t" << **i << " -> ";
 180                 if ((*i)->reg < MRegisterInfo::FirstVirtualRegister) {
 181                     std::cerr << mri_->getName((*i)->reg);
 182                 }
 183                 else {
 184                     std::cerr << mri_->getName(v2pMap_.find((*i)->reg)->second);
 185                 }
 186                 std::cerr << '\n';
 187             }
 188         }
 189     };
 190 }
 191
 192 bool RA::runOnMachineFunction(MachineFunction &fn) {
 193     mf_ = &fn;
 194     tm_ = &fn.getTarget();
 195     mri_ = tm_->getRegisterInfo();
 196     li_ = &getAnalysis<LiveIntervals>().getIntervals();
 197     active_.clear();
 198     inactive_.clear();
 199     mbbs_ = getAnalysis<LiveIntervals>().getOrderedMachineBasicBlockPtrs();
 200     p2vMap_.resize(MRegisterInfo::FirstVirtualRegister-1);
 201     p2vMap_.clear();
 202     v2pMap_.clear();
 203     v2ssMap_.clear();
 204
 205     DEBUG(
 206         unsigned i = 0;
 207         for (MachineBasicBlockPtrs::iterator
 208                  mbbi = mbbs_.begin(), mbbe = mbbs_.end();
 209              mbbi != mbbe; ++mbbi) {
 210             MachineBasicBlock* mbb = *mbbi;
 211             std::cerr << mbb->getBasicBlock()->getName() << '\n';
 212             for (MachineBasicBlock::iterator
 213                      ii = mbb->begin(), ie = mbb->end();
 214                  ii != ie; ++ii) {
 215                 MachineInstr* instr = *ii;
 216
 217                 std::cerr << i++ << "\t";
 218                 instr->print(std::cerr, *tm_);
 219             }
 220         }
 221         );
 222
 223     // FIXME: this will work only for the X86 backend. I need to
 224     // device an algorthm to select the minimal (considering register
 225     // aliasing) number of temp registers to reserve so that we have 2
 226     // registers for each register class available.
 227
 228     // reserve R32: EDI, EBX,
 229     //         R16:  DI,  BX,
 230     //         R8:   DH,  BH,
 231     //         RFP: FP5, FP6
 232     reserved_.push_back(19); /* EDI */
 233     reserved_.push_back(17); /* EBX */
 234     reserved_.push_back(12); /*  DI */
 235     reserved_.push_back( 7); /*  BX */
 236     reserved_.push_back(11); /*  DH */
 237     reserved_.push_back( 4); /*  BH */
 238     reserved_.push_back(28); /* FP5 */
 239     reserved_.push_back(29); /* FP6 */
 240
 241     // liner scan algorithm
 242     for (Intervals::const_iterator
 243              i = li_->begin(), e = li_->end(); i != e; ++i) {
 244         DEBUG(std::cerr << "processing current interval: " << *i << '\n');
 245
 246         DEBUG(printIntervals("\tactive", active_.begin(), active_.end()));
 247         DEBUG(printIntervals("\tinactive", inactive_.begin(), inactive_.end()));
 248         processActiveIntervals(i);
 249         // processInactiveIntervals(i);
 250
 251         // if this register is preallocated, look for an interval that
 252         // overlaps with it and assign it to a memory location
 253         if (i->reg < MRegisterInfo::FirstVirtualRegister) {
 254             reservePhysReg(i->reg);
 255             active_.push_back(&*i);
 256         }
 257         // otherwise we are allocating a virtual register. try to find
 258         // a free physical register or spill an interval in order to
 259         // assign it one (we could spill the current though).
 260         else {
 261             unsigned physReg = getFreePhysReg(i->reg);
 262             if (!physReg) {
 263                 assignStackSlotAtInterval(i);
 264             }
 265             else {
 266                 assignVirt2PhysReg(i->reg, physReg);
 267                 active_.push_back(&*i);
 268             }
 269         }
 270     }
 271     // expire any remaining active intervals
 272     for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
 273         unsigned reg = (*i)->reg;
 274         DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
 275         if (reg < MRegisterInfo::FirstVirtualRegister) {
 276             clearReservedPhysReg(reg);
 277         }
 278         else {
 279             p2vMap_[v2pMap_[reg]] = 0;
 280         }
 281         // remove interval from active
 282     }
 283
 284     DEBUG(std::cerr << "finished register allocation\n");
 285     DEBUG(printVirt2PhysMap());
 286
 287     DEBUG(std::cerr << "Rewrite machine code:\n");
 288     for (MachineBasicBlockPtrs::iterator
 289              mbbi = mbbs_.begin(), mbbe = mbbs_.end(); mbbi != mbbe; ++mbbi) {
 290         instrAdded_ = 0;
 291         currentMbb_ = *mbbi;
 292
 293         for (currentInstr_ = currentMbb_->begin();
 294              currentInstr_ != currentMbb_->end(); ++currentInstr_) {
 295
 296             DEBUG(std::cerr << "\tinstruction: ";
 297                   (*currentInstr_)->print(std::cerr, *tm_););
 298
 299             // use our current mapping and actually replace and
 300             // virtual register with its allocated physical registers
 301             DEBUG(std::cerr << "\t\treplacing virtual registers with mapped "
 302                   "physical registers:\n");
 303             for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
 304                  i != e; ++i) {
 305                 MachineOperand& op = (*currentInstr_)->getOperand(i);
 306                 if (op.isVirtualRegister()) {
 307                     unsigned virtReg = op.getAllocatedRegNum();
 308                     unsigned physReg = v2pMap_[virtReg];
 309                     // if this virtual registers lives on the stack,
 310                     // load it to a temporary physical register
 311                     if (physReg) {
 312                         DEBUG(std::cerr << "\t\t\t%reg" << virtReg
 313                               << " -> " << mri_->getName(physReg) << '\n');
 314                         (*currentInstr_)->SetMachineOperandReg(i, physReg);
 315                     }
 316                 }
 317             }
 318
 319             DEBUG(std::cerr << "\t\tloading temporarily used operands to "
 320                   "registers:\n");
 321             for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
 322                  i != e; ++i) {
 323                 MachineOperand& op = (*currentInstr_)->getOperand(i);
 324                 if (op.isVirtualRegister() && op.isUse()) {
 325                     unsigned virtReg = op.getAllocatedRegNum();
 326                     unsigned physReg = v2pMap_[virtReg];
 327                     if (!physReg) {
 328                         physReg = getFreeTempPhysReg(virtReg);
 329                     }
 330                     loadVirt2PhysReg(virtReg, physReg);
 331                     tempUseOperands_.push_back(virtReg);
 332                     (*currentInstr_)->SetMachineOperandReg(i, physReg);
 333                 }
 334             }
 335
 336             DEBUG(std::cerr << "\t\tclearing temporarily used operands:\n");
 337             for (unsigned i = 0, e = tempUseOperands_.size(); i != e; ++i) {
 338                 clearVirtReg(tempUseOperands_[i]);
 339             }
 340             tempUseOperands_.clear();
 341
 342             DEBUG(std::cerr << "\t\tassigning temporarily defined operands to "
 343                   "registers:\n");
 344             for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
 345                  i != e; ++i) {
 346                 MachineOperand& op = (*currentInstr_)->getOperand(i);
 347                 if (op.isVirtualRegister() && op.isDef()) {
 348                     unsigned virtReg = op.getAllocatedRegNum();
 349                     unsigned physReg = v2pMap_[virtReg];
 350                     if (!physReg) {
 351                         physReg = getFreeTempPhysReg(virtReg);
 352                     }
 353                     if (op.isUse()) { // def and use
 354                         loadVirt2PhysReg(virtReg, physReg);
 355                     }
 356                     else {
 357                         assignVirt2PhysReg(virtReg, physReg);
 358                     }
 359                     tempDefOperands_.push_back(virtReg);
 360                     (*currentInstr_)->SetMachineOperandReg(i, physReg);
 361                 }
 362             }
 363
 364
 365             // if the instruction is a two address instruction and the
 366             // source operands are not identical we need to insert
 367             // extra instructions.
 368
 369             unsigned opcode = (*currentInstr_)->getOpcode();
 370             if (tm_->getInstrInfo().isTwoAddrInstr(opcode) &&
 371                 (*currentInstr_)->getOperand(0).getAllocatedRegNum() !=
 372                 (*currentInstr_)->getOperand(1).getAllocatedRegNum()) {
 373                 assert((*currentInstr_)->getOperand(1).isRegister() &&
 374                        (*currentInstr_)->getOperand(1).getAllocatedRegNum() &&
 375                        (*currentInstr_)->getOperand(1).isUse() &&
 376                        "Two address instruction invalid");
 377
 378                 unsigned regA =
 379                     (*currentInstr_)->getOperand(0).getAllocatedRegNum();
 380                 unsigned regB =
 381                     (*currentInstr_)->getOperand(1).getAllocatedRegNum();
 382                 unsigned regC =
 383                     ((*currentInstr_)->getNumOperands() > 2 &&
 384                      (*currentInstr_)->getOperand(2).isRegister()) ?
 385                     (*currentInstr_)->getOperand(2).getAllocatedRegNum() :
 386                     0;
 387
 388                 const TargetRegisterClass* rc = mri_->getRegClass(regA);
 389
 390                 // special case: "a = b op a". If b is a temporary
 391                 // reserved register rewrite as: "b = b op a; a = b"
 392                 // otherwise use a temporary reserved register t and
 393                 // rewrite as: "t = b; t = t op a; a = t"
 394                 if (regC && regA == regC) {
 395                     // b is a temp reserved register
 396                     if (find(reserved_.begin(), reserved_.end(),
 397                              regB) != reserved_.end()) {
 398                         (*currentInstr_)->SetMachineOperandReg(0, regB);
 399                         ++currentInstr_;
 400                         instrAdded_ += mri_->copyRegToReg(*currentMbb_,
 401                                                           currentInstr_,
 402                                                           regA,
 403                                                           regB,
 404                                                           rc);
 405                         --currentInstr_;
 406                     }
 407                     // b is just a normal register
 408                     else {
 409                         unsigned tempReg = getFreeTempPhysReg(rc);
 410                         assert (tempReg &&
 411                                 "no free temp reserved physical register?");
 412                         instrAdded_ += mri_->copyRegToReg(*currentMbb_,
 413                                                           currentInstr_,
 414                                                           tempReg,
 415                                                           regB,
 416                                                           rc);
 417                         (*currentInstr_)->SetMachineOperandReg(0, tempReg);
 418                         (*currentInstr_)->SetMachineOperandReg(1, tempReg);
 419                         ++currentInstr_;
 420                         instrAdded_ += mri_->copyRegToReg(*currentMbb_,
 421                                                           currentInstr_,
 422                                                           regA,
 423                                                           tempReg,
 424                                                           rc);
 425                         --currentInstr_;
 426                     }
 427                 }
 428                 // "a = b op c" gets rewritten to "a = b; a = a op c"
 429                 else {
 430                     instrAdded_ += mri_->copyRegToReg(*currentMbb_,
 431                                                       currentInstr_,
 432                                                       regA,
 433                                                       regB,
 434                                                       rc);
 435                     (*currentInstr_)->SetMachineOperandReg(1, regA);
 436                 }
 437             }
 438
 439             DEBUG(std::cerr << "\t\tspilling temporarily defined operands "
 440                   "of this instruction:\n");
 441             ++currentInstr_; // we want to insert after this instruction
 442             for (unsigned i = 0, e = tempDefOperands_.size(); i != e; ++i) {
 443                 spillVirtReg(tempDefOperands_[i]);
 444             }
 445             --currentInstr_; // restore currentInstr_ iterator
 446             tempDefOperands_.clear();
 447         }
 448
 449         for (unsigned i = 0, e = p2vMap_.size(); i != e; ++i) {
 450             assert(p2vMap_[i] != i &&
 451                    "reserved physical registers at end of basic block?");
 452         }
 453     }
 454
 455     return true;
 456 }
 457
 458 void RA::processActiveIntervals(Intervals::const_iterator cur)
 459 {
 460     DEBUG(std::cerr << "\tprocessing active intervals:\n");
 461     for (IntervalPtrs::iterator i = active_.begin(); i != active_.end();) {
 462         unsigned reg = (*i)->reg;
 463         // remove expired intervals. we expire earlier because this if
 464         // an interval expires this is going to be the last use. in
 465         // this case we can reuse the register for a def in the same
 466         // instruction
 467         if ((*i)->expired(cur->start() + 1)) {
 468             DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
 469             if (reg < MRegisterInfo::FirstVirtualRegister) {
 470                 clearReservedPhysReg(reg);
 471             }
 472             else {
 473                 p2vMap_[v2pMap_[reg]] = 0;
 474             }
 475             // remove interval from active
 476             i = active_.erase(i);
 477         }
 478         // move not active intervals to inactive list
 479 //         else if (!(*i)->overlaps(curIndex)) {
 480 //             DEBUG(std::cerr << "\t\t\tinterval " << **i << " inactive\n");
 481 //             unmarkReg(virtReg);
 482 //             // add interval to inactive
 483 //             inactive_.push_back(*i);
 484 //             // remove interval from active
 485 //             i = active_.erase(i);
 486 //         }
 487         else {
 488             ++i;
 489         }
 490     }
 491 }
 492
 493 void RA::processInactiveIntervals(Intervals::const_iterator cur)
 494 {
 495 //     DEBUG(std::cerr << "\tprocessing inactive intervals:\n");
 496 //     for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end();) {
 497 //         unsigned virtReg = (*i)->reg;
 498 //         // remove expired intervals
 499 //         if ((*i)->expired(curIndex)) {
 500 //             DEBUG(std::cerr << "\t\t\tinterval " << **i << " expired\n");
 501 //             freePhysReg(virtReg);
 502 //             // remove from inactive
 503 //             i = inactive_.erase(i);
 504 //         }
 505 //         // move re-activated intervals in active list
 506 //         else if ((*i)->overlaps(curIndex)) {
 507 //             DEBUG(std::cerr << "\t\t\tinterval " << **i << " active\n");
 508 //             markReg(virtReg);
 509 //             // add to active
 510 //             active_.push_back(*i);
 511 //             // remove from inactive
 512 //             i = inactive_.erase(i);
 513 //         }
 514 //         else {
 515 //             ++i;
 516 //         }
 517 //     }
 518 }
 519
 520 void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
 521 {
 522     DEBUG(std::cerr << "\t\tassigning stack slot at interval "
 523           << *cur << ":\n");
 524     assert(!active_.empty() &&
 525            "active set cannot be empty when choosing a register to spill");
 526     const TargetRegisterClass* rcCur =
 527         mf_->getSSARegMap()->getRegClass(cur->reg);
 528
 529     // find the interval for a virtual register that ends last in
 530     // active and belongs to the same register class as the current
 531     // interval
 532     IntervalPtrs::iterator lastEndActive = active_.begin();
 533     for (IntervalPtrs::iterator e = active_.end();
 534          lastEndActive != e; ++lastEndActive) {
 535         if ((*lastEndActive)->reg >= MRegisterInfo::FirstVirtualRegister) {
 536             const TargetRegisterClass* rc =
 537                 mri_->getRegClass(v2pMap_[(*lastEndActive)->reg]);
 538             if (rcCur == rc) {
 539                 break;
 540             }
 541         }
 542     }
 543     for (IntervalPtrs::iterator i = lastEndActive, e = active_.end();
 544          i != e; ++i) {
 545         if ((*i)->reg >= MRegisterInfo::FirstVirtualRegister) {
 546             const TargetRegisterClass* rc =
 547                 mri_->getRegClass(v2pMap_[(*i)->reg]);
 548             if (rcCur == rc &&
 549                 (*lastEndActive)->end() < (*i)->end()) {
 550                 lastEndActive = i;
 551             }
 552         }
 553     }
 554
 555     // find the interval for a virtual register that ends last in
 556     // inactive and belongs to the same register class as the current
 557     // interval
 558     IntervalPtrs::iterator lastEndInactive = inactive_.begin();
 559     for (IntervalPtrs::iterator e = inactive_.end();
 560          lastEndInactive != e; ++lastEndInactive) {
 561         if ((*lastEndInactive)->reg >= MRegisterInfo::FirstVirtualRegister) {
 562             const TargetRegisterClass* rc =
 563                 mri_->getRegClass(v2pMap_[(*lastEndInactive)->reg]);
 564             if (rcCur == rc) {
 565                 break;
 566             }
 567         }
 568     }
 569     for (IntervalPtrs::iterator i = lastEndInactive, e = inactive_.end();
 570          i != e; ++i) {
 571         if ((*i)->reg >= MRegisterInfo::FirstVirtualRegister) {
 572             const TargetRegisterClass* rc =
 573                 mri_->getRegClass(v2pMap_[(*i)->reg]);
 574             if (rcCur == rc &&
 575                 (*lastEndInactive)->end() < (*i)->end()) {
 576                 lastEndInactive = i;
 577             }
 578         }
 579     }
 580
 581     unsigned lastEndActiveInactive = 0;
 582     if (lastEndActive != active_.end() &&
 583         lastEndActiveInactive < (*lastEndActive)->end()) {
 584         lastEndActiveInactive = (*lastEndActive)->end();
 585     }
 586     if (lastEndInactive != inactive_.end() &&
 587         lastEndActiveInactive < (*lastEndInactive)->end()) {
 588         lastEndActiveInactive = (*lastEndInactive)->end();
 589     }
 590
 591     if (lastEndActiveInactive > cur->end()) {
 592         if (lastEndInactive == inactive_.end() ||
 593             (*lastEndActive)->end() > (*lastEndInactive)->end()) {
 594             assignVirt2StackSlot((*lastEndActive)->reg);
 595             active_.erase(lastEndActive);
 596         }
 597         else {
 598             assignVirt2StackSlot((*lastEndInactive)->reg);
 599             inactive_.erase(lastEndInactive);
 600         }
 601         unsigned physReg = getFreePhysReg(cur->reg);
 602         assert(physReg && "no free physical register after spill?");
 603         assignVirt2PhysReg(cur->reg, physReg);
 604         active_.push_back(&*cur);
 605     }
 606     else {
 607         assignVirt2StackSlot(cur->reg);
 608     }
 609 }
 610
 611 void RA::reservePhysReg(unsigned physReg)
 612 {
 613     DEBUG(std::cerr << "\t\t\treserving physical register: "
 614           << mri_->getName(physReg) << '\n');
 615     // if this register holds a value spill it
 616     unsigned virtReg = p2vMap_[physReg];
 617     if (virtReg != 0) {
 618         assert(virtReg != physReg && "reserving an already reserved phus reg?");
 619         // remove interval from active
 620         for (IntervalPtrs::iterator i = active_.begin(), e = active_.end();
 621              i != e; ++i) {
 622             if ((*i)->reg == virtReg) {
 623                 active_.erase(i);
 624                 break;
 625             }
 626         }
 627         assignVirt2StackSlot(virtReg);
 628     }
 629     p2vMap_[physReg] = physReg; // this denotes a reserved physical register
 630
 631     // if it also aliases any other registers with values spill them too
 632     for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
 633         unsigned virtReg = p2vMap_[*as];
 634         if (virtReg != 0 && virtReg != *as) {
 635             // remove interval from active
 636             for (IntervalPtrs::iterator i = active_.begin(), e = active_.end();
 637                  i != e; ++i) {
 638                 if ((*i)->reg == virtReg) {
 639                     active_.erase(i);
 640                     break;
 641                 }
 642             }
 643             assignVirt2StackSlot(virtReg);
 644         }
 645     }
 646 }
 647
 648 void RA::clearReservedPhysReg(unsigned physReg)
 649 {
 650     DEBUG(std::cerr << "\t\t\tclearing reserved physical register: "
 651           << mri_->getName(physReg) << '\n');
 652     assert(p2vMap_[physReg] == physReg &&
 653            "attempt to clear a non reserved physical register");
 654     p2vMap_[physReg] = 0;
 655 }
 656
 657 bool RA::physRegAvailable(unsigned physReg)
 658 {
 659     if (p2vMap_[physReg]) {
 660         return false;
 661     }
 662
 663     // if it aliases other registers it is still not free
 664     for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
 665         if (p2vMap_[*as]) {
 666             return false;
 667         }
 668     }
 669
 670     // if it is one of the reserved registers it is still not free
 671     if (find(reserved_.begin(), reserved_.end(), physReg) != reserved_.end()) {
 672         return false;
 673     }
 674
 675     return true;
 676 }
 677
 678 unsigned RA::getFreePhysReg(unsigned virtReg)
 679 {
 680     DEBUG(std::cerr << "\t\tgetting free physical register: ");
 681     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
 682     TargetRegisterClass::iterator reg = rc->allocation_order_begin(*mf_);
 683     TargetRegisterClass::iterator regEnd = rc->allocation_order_end(*mf_);
 684
 685     for (; reg != regEnd; ++reg) {
 686         if (physRegAvailable(*reg)) {
 687             assert(*reg != 0 && "Cannot use register!");
 688             DEBUG(std::cerr << mri_->getName(*reg) << '\n');
 689             return *reg; // Found an unused register!
 690         }
 691     }
 692
 693     DEBUG(std::cerr << "no free register\n");
 694     return 0;
 695 }
 696
 697 bool RA::tempPhysRegAvailable(unsigned physReg)
 698 {
 699     assert(find(reserved_.begin(), reserved_.end(), physReg) != reserved_.end()
 700            && "cannot call this method with a non reserved temp register");
 701
 702     if (p2vMap_[physReg]) {
 703         return false;
 704     }
 705
 706     // if it aliases other registers it is still not free
 707     for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as) {
 708         if (p2vMap_[*as]) {
 709             return false;
 710         }
 711     }
 712
 713     return true;
 714 }
 715
 716 unsigned RA::getFreeTempPhysReg(const TargetRegisterClass* rc)
 717 {
 718     DEBUG(std::cerr << "\t\tgetting free temporary physical register: ");
 719
 720     for (Regs::const_iterator
 721              reg = reserved_.begin(), regEnd = reserved_.end();
 722          reg != regEnd; ++reg) {
 723         if (rc == mri_->getRegClass(*reg) && tempPhysRegAvailable(*reg)) {
 724             assert(*reg != 0 && "Cannot use register!");
 725             DEBUG(std::cerr << mri_->getName(*reg) << '\n');
 726             return *reg; // Found an unused register!
 727         }
 728     }
 729     assert(0 && "no free temporary physical register?");
 730     return 0;
 731 }
 732
 733 void RA::assignVirt2PhysReg(unsigned virtReg, unsigned physReg)
 734 {
 735     assert((physRegAvailable(physReg) ||
 736             find(reserved_.begin(),
 737                  reserved_.end(),
 738                  physReg) != reserved_.end()) &&
 739            "attempt to allocate to a not available physical register");
 740     v2pMap_[virtReg] = physReg;
 741     p2vMap_[physReg] = virtReg;
 742 }
 743
 744 void RA::clearVirtReg(unsigned virtReg)
 745 {
 746     Virt2PhysMap::iterator it = v2pMap_.find(virtReg);
 747     assert(it != v2pMap_.end() &&
 748            "attempting to clear a not allocated virtual register");
 749     unsigned physReg = it->second;
 750     p2vMap_[physReg] = 0;
 751     v2pMap_[virtReg] = 0; // this marks that this virtual register
 752                           // lives on the stack
 753     DEBUG(std::cerr << "\t\t\tcleared register " << mri_->getName(physReg)
 754           << "\n");
 755 }
 756
 757 void RA::assignVirt2StackSlot(unsigned virtReg)
 758 {
 759     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
 760     int frameIndex = mf_->getFrameInfo()->CreateStackObject(rc);
 761
 762     bool inserted = v2ssMap_.insert(std::make_pair(virtReg, frameIndex)).second;
 763     assert(inserted &&
 764            "attempt to assign stack slot to already assigned register?");
 765     // if the virtual register was previously assigned clear the mapping
 766     // and free the virtual register
 767     if (v2pMap_.find(virtReg) != v2pMap_.end()) {
 768         clearVirtReg(virtReg);
 769     }
 770     else {
 771         v2pMap_[virtReg] = 0; // this marks that this virtual register
 772                               // lives on the stack
 773     }
 774 }
 775
 776 int RA::getStackSlot(unsigned virtReg)
 777 {
 778     // use lower_bound so that we can do a possibly O(1) insert later
 779     // if necessary
 780     Virt2StackSlotMap::iterator it = v2ssMap_.find(virtReg);
 781     assert(it != v2ssMap_.end() &&
 782            "attempt to get stack slot on register that does not live on the stack");
 783     return it->second;
 784 }
 785
 786 void RA::spillVirtReg(unsigned virtReg)
 787 {
 788     DEBUG(std::cerr << "\t\t\tspilling register: " << virtReg);
 789     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
 790     int frameIndex = getStackSlot(virtReg);
 791     DEBUG(std::cerr << " to stack slot #" << frameIndex << '\n');
 792     ++numSpilled;
 793     instrAdded_ += mri_->storeRegToStackSlot(*currentMbb_, currentInstr_,
 794                                              v2pMap_[virtReg], frameIndex, rc);
 795     clearVirtReg(virtReg);
 796 }
 797
 798 void RA::loadVirt2PhysReg(unsigned virtReg, unsigned physReg)
 799 {
 800     DEBUG(std::cerr << "\t\t\tloading register: " << virtReg);
 801     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
 802     int frameIndex = getStackSlot(virtReg);
 803     DEBUG(std::cerr << " from stack slot #" << frameIndex << '\n');
 804     instrAdded_ += mri_->loadRegFromStackSlot(*currentMbb_, currentInstr_,
 805                                               physReg, frameIndex, rc);
 806     assignVirt2PhysReg(virtReg, physReg);
 807 }
 808
 809 FunctionPass* llvm::createLinearScanRegisterAllocator() {
 810     return new RA();
 811 }