1 //===-- RegAllocLinearScan.cpp - Linear Scan register allocator -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a linear scan register allocator.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "regalloc"
15 #include "llvm/CodeGen/LiveVariables.h"
16 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
17 #include "PhysRegTracker.h"
18 #include "VirtRegMap.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/CodeGen/RegAllocRegistry.h"
24 #include "llvm/CodeGen/SSARegMap.h"
25 #include "llvm/Target/MRegisterInfo.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/ADT/EquivalenceClasses.h"
28 #include "llvm/ADT/Statistic.h"
29 #include "llvm/ADT/STLExtras.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/Compiler.h"
39 STATISTIC(NumIters , "Number of iterations performed");
40 STATISTIC(NumBacktracks, "Number of times we had to backtrack");
42 static RegisterRegAlloc
43 linearscanRegAlloc("linearscan", " linear scan register allocator",
44 createLinearScanRegisterAllocator);
47 static unsigned numIterations = 0;
48 static unsigned numIntervals = 0;
50 struct VISIBILITY_HIDDEN RA : public MachineFunctionPass {
51 typedef std::pair<LiveInterval*, LiveInterval::iterator> IntervalPtr;
52 typedef std::vector<IntervalPtr> IntervalPtrs;
54 /// RelatedRegClasses - This structure is built the first time a function is
55 /// compiled, and keeps track of which register classes have registers that
56 /// belong to multiple classes or have aliases that are in other classes.
57 EquivalenceClasses<const TargetRegisterClass*> RelatedRegClasses;
58 std::map<unsigned, const TargetRegisterClass*> OneClassForEachPhysReg;
61 const TargetMachine* tm_;
62 const MRegisterInfo* mri_;
65 /// handled_ - Intervals are added to the handled_ set in the order of their
66 /// start value. This is uses for backtracking.
67 std::vector<LiveInterval*> handled_;
69 /// fixed_ - Intervals that correspond to machine registers.
73 /// active_ - Intervals that are currently being processed, and which have a
74 /// live range active for the current point.
77 /// inactive_ - Intervals that are currently being processed, but which have
78 /// a hold at the current point.
79 IntervalPtrs inactive_;
81 typedef std::priority_queue<LiveInterval*,
82 std::vector<LiveInterval*>,
83 greater_ptr<LiveInterval> > IntervalHeap;
84 IntervalHeap unhandled_;
85 std::auto_ptr<PhysRegTracker> prt_;
86 std::auto_ptr<VirtRegMap> vrm_;
87 std::auto_ptr<Spiller> spiller_;
90 virtual const char* getPassName() const {
91 return "Linear Scan Register Allocator";
94 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
95 AU.addRequired<LiveIntervals>();
96 MachineFunctionPass::getAnalysisUsage(AU);
99 /// runOnMachineFunction - register allocate the whole function
100 bool runOnMachineFunction(MachineFunction&);
103 /// linearScan - the linear scan algorithm
106 /// initIntervalSets - initialize the interval sets.
108 void initIntervalSets();
110 /// processActiveIntervals - expire old intervals and move non-overlapping
111 /// ones to the inactive list.
112 void processActiveIntervals(unsigned CurPoint);
114 /// processInactiveIntervals - expire old intervals and move overlapping
115 /// ones to the active list.
116 void processInactiveIntervals(unsigned CurPoint);
118 /// assignRegOrStackSlotAtInterval - assign a register if one
119 /// is available, or spill.
120 void assignRegOrStackSlotAtInterval(LiveInterval* cur);
123 /// register handling helpers
126 /// getFreePhysReg - return a free physical register for this virtual
127 /// register interval if we have one, otherwise return 0.
128 unsigned getFreePhysReg(LiveInterval* cur);
130 /// assignVirt2StackSlot - assigns this virtual register to a
131 /// stack slot. returns the stack slot
132 int assignVirt2StackSlot(unsigned virtReg);
134 void ComputeRelatedRegClasses();
136 template <typename ItTy>
137 void printIntervals(const char* const str, ItTy i, ItTy e) const {
138 if (str) DOUT << str << " intervals:\n";
139 for (; i != e; ++i) {
140 DOUT << "\t" << *i->first << " -> ";
141 unsigned reg = i->first->reg;
142 if (MRegisterInfo::isVirtualRegister(reg)) {
143 reg = vrm_->getPhys(reg);
145 DOUT << mri_->getName(reg) << '\n';
151 void RA::ComputeRelatedRegClasses() {
152 const MRegisterInfo &MRI = *mri_;
154 // First pass, add all reg classes to the union, and determine at least one
155 // reg class that each register is in.
156 bool HasAliases = false;
157 for (MRegisterInfo::regclass_iterator RCI = MRI.regclass_begin(),
158 E = MRI.regclass_end(); RCI != E; ++RCI) {
159 RelatedRegClasses.insert(*RCI);
160 for (TargetRegisterClass::iterator I = (*RCI)->begin(), E = (*RCI)->end();
162 HasAliases = HasAliases || *MRI.getAliasSet(*I) != 0;
164 const TargetRegisterClass *&PRC = OneClassForEachPhysReg[*I];
166 // Already processed this register. Just make sure we know that
167 // multiple register classes share a register.
168 RelatedRegClasses.unionSets(PRC, *RCI);
175 // Second pass, now that we know conservatively what register classes each reg
176 // belongs to, add info about aliases. We don't need to do this for targets
177 // without register aliases.
179 for (std::map<unsigned, const TargetRegisterClass*>::iterator
180 I = OneClassForEachPhysReg.begin(), E = OneClassForEachPhysReg.end();
182 for (const unsigned *AS = MRI.getAliasSet(I->first); *AS; ++AS)
183 RelatedRegClasses.unionSets(I->second, OneClassForEachPhysReg[*AS]);
186 bool RA::runOnMachineFunction(MachineFunction &fn) {
188 tm_ = &fn.getTarget();
189 mri_ = tm_->getRegisterInfo();
190 li_ = &getAnalysis<LiveIntervals>();
192 // If this is the first function compiled, compute the related reg classes.
193 if (RelatedRegClasses.empty())
194 ComputeRelatedRegClasses();
196 if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
197 vrm_.reset(new VirtRegMap(*mf_));
198 if (!spiller_.get()) spiller_.reset(createSpiller());
204 // Rewrite spill code and update the PhysRegsUsed set.
205 spiller_->runOnMachineFunction(*mf_, *vrm_);
207 vrm_.reset(); // Free the VirtRegMap
210 while (!unhandled_.empty()) unhandled_.pop();
219 /// initIntervalSets - initialize the interval sets.
221 void RA::initIntervalSets()
223 assert(unhandled_.empty() && fixed_.empty() &&
224 active_.empty() && inactive_.empty() &&
225 "interval sets should be empty on initialization");
227 for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
228 if (MRegisterInfo::isPhysicalRegister(i->second.reg)) {
229 mf_->setPhysRegUsed(i->second.reg);
230 fixed_.push_back(std::make_pair(&i->second, i->second.begin()));
232 unhandled_.push(&i->second);
236 void RA::linearScan()
238 // linear scan algorithm
239 DOUT << "********** LINEAR SCAN **********\n";
240 DOUT << "********** Function: " << mf_->getFunction()->getName() << '\n';
242 // DEBUG(printIntervals("unhandled", unhandled_.begin(), unhandled_.end()));
243 DEBUG(printIntervals("fixed", fixed_.begin(), fixed_.end()));
244 DEBUG(printIntervals("active", active_.begin(), active_.end()));
245 DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
247 while (!unhandled_.empty()) {
248 // pick the interval with the earliest start point
249 LiveInterval* cur = unhandled_.top();
252 DOUT << "\n*** CURRENT ***: " << *cur << '\n';
254 processActiveIntervals(cur->beginNumber());
255 processInactiveIntervals(cur->beginNumber());
257 assert(MRegisterInfo::isVirtualRegister(cur->reg) &&
258 "Can only allocate virtual registers!");
260 // Allocating a virtual register. try to find a free
261 // physical register or spill an interval (possibly this one) in order to
263 assignRegOrStackSlotAtInterval(cur);
265 DEBUG(printIntervals("active", active_.begin(), active_.end()));
266 DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
268 numIntervals += li_->getNumIntervals();
269 NumIters += numIterations;
271 // expire any remaining active intervals
272 for (IntervalPtrs::reverse_iterator
273 i = active_.rbegin(); i != active_.rend(); ) {
274 unsigned reg = i->first->reg;
275 DOUT << "\tinterval " << *i->first << " expired\n";
276 assert(MRegisterInfo::isVirtualRegister(reg) &&
277 "Can only allocate virtual registers!");
278 reg = vrm_->getPhys(reg);
279 prt_->delRegUse(reg);
280 i = IntervalPtrs::reverse_iterator(active_.erase(i.base()-1));
283 // expire any remaining inactive intervals
284 for (IntervalPtrs::reverse_iterator
285 i = inactive_.rbegin(); i != inactive_.rend(); ) {
286 DOUT << "\tinterval " << *i->first << " expired\n";
287 i = IntervalPtrs::reverse_iterator(inactive_.erase(i.base()-1));
290 // A brute force way of adding live-ins to every BB.
291 MachineFunction::iterator MBB = mf_->begin();
292 ++MBB; // Skip entry MBB.
293 for (MachineFunction::iterator E = mf_->end(); MBB != E; ++MBB) {
294 unsigned StartIdx = li_->getMBBStartIdx(MBB->getNumber());
295 for (IntervalPtrs::iterator i = fixed_.begin(), e = fixed_.end();
297 if (i->first->liveAt(StartIdx))
298 MBB->addLiveIn(i->first->reg);
300 for (unsigned i = 0, e = handled_.size(); i != e; ++i) {
301 LiveInterval *HI = handled_[i];
302 unsigned Reg = HI->reg;
303 if (!vrm_->hasStackSlot(Reg) && HI->liveAt(StartIdx)) {
304 assert(MRegisterInfo::isVirtualRegister(Reg));
305 Reg = vrm_->getPhys(Reg);
314 /// processActiveIntervals - expire old intervals and move non-overlapping ones
315 /// to the inactive list.
316 void RA::processActiveIntervals(unsigned CurPoint)
318 DOUT << "\tprocessing active intervals:\n";
320 for (unsigned i = 0, e = active_.size(); i != e; ++i) {
321 LiveInterval *Interval = active_[i].first;
322 LiveInterval::iterator IntervalPos = active_[i].second;
323 unsigned reg = Interval->reg;
325 IntervalPos = Interval->advanceTo(IntervalPos, CurPoint);
327 if (IntervalPos == Interval->end()) { // Remove expired intervals.
328 DOUT << "\t\tinterval " << *Interval << " expired\n";
329 assert(MRegisterInfo::isVirtualRegister(reg) &&
330 "Can only allocate virtual registers!");
331 reg = vrm_->getPhys(reg);
332 prt_->delRegUse(reg);
334 // Pop off the end of the list.
335 active_[i] = active_.back();
339 } else if (IntervalPos->start > CurPoint) {
340 // Move inactive intervals to inactive list.
341 DOUT << "\t\tinterval " << *Interval << " inactive\n";
342 assert(MRegisterInfo::isVirtualRegister(reg) &&
343 "Can only allocate virtual registers!");
344 reg = vrm_->getPhys(reg);
345 prt_->delRegUse(reg);
347 inactive_.push_back(std::make_pair(Interval, IntervalPos));
349 // Pop off the end of the list.
350 active_[i] = active_.back();
354 // Otherwise, just update the iterator position.
355 active_[i].second = IntervalPos;
360 /// processInactiveIntervals - expire old intervals and move overlapping
361 /// ones to the active list.
362 void RA::processInactiveIntervals(unsigned CurPoint)
364 DOUT << "\tprocessing inactive intervals:\n";
366 for (unsigned i = 0, e = inactive_.size(); i != e; ++i) {
367 LiveInterval *Interval = inactive_[i].first;
368 LiveInterval::iterator IntervalPos = inactive_[i].second;
369 unsigned reg = Interval->reg;
371 IntervalPos = Interval->advanceTo(IntervalPos, CurPoint);
373 if (IntervalPos == Interval->end()) { // remove expired intervals.
374 DOUT << "\t\tinterval " << *Interval << " expired\n";
376 // Pop off the end of the list.
377 inactive_[i] = inactive_.back();
378 inactive_.pop_back();
380 } else if (IntervalPos->start <= CurPoint) {
381 // move re-activated intervals in active list
382 DOUT << "\t\tinterval " << *Interval << " active\n";
383 assert(MRegisterInfo::isVirtualRegister(reg) &&
384 "Can only allocate virtual registers!");
385 reg = vrm_->getPhys(reg);
386 prt_->addRegUse(reg);
388 active_.push_back(std::make_pair(Interval, IntervalPos));
390 // Pop off the end of the list.
391 inactive_[i] = inactive_.back();
392 inactive_.pop_back();
395 // Otherwise, just update the iterator position.
396 inactive_[i].second = IntervalPos;
401 /// updateSpillWeights - updates the spill weights of the specifed physical
402 /// register and its weight.
403 static void updateSpillWeights(std::vector<float> &Weights,
404 unsigned reg, float weight,
405 const MRegisterInfo *MRI) {
406 Weights[reg] += weight;
407 for (const unsigned* as = MRI->getAliasSet(reg); *as; ++as)
408 Weights[*as] += weight;
411 static RA::IntervalPtrs::iterator FindIntervalInVector(RA::IntervalPtrs &IP,
413 for (RA::IntervalPtrs::iterator I = IP.begin(), E = IP.end(); I != E; ++I)
414 if (I->first == LI) return I;
418 static void RevertVectorIteratorsTo(RA::IntervalPtrs &V, unsigned Point) {
419 for (unsigned i = 0, e = V.size(); i != e; ++i) {
420 RA::IntervalPtr &IP = V[i];
421 LiveInterval::iterator I = std::upper_bound(IP.first->begin(),
423 if (I != IP.first->begin()) --I;
428 /// assignRegOrStackSlotAtInterval - assign a register if one is available, or
430 void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
432 DOUT << "\tallocating current interval: ";
434 PhysRegTracker backupPrt = *prt_;
436 std::vector<std::pair<unsigned, float> > SpillWeightsToAdd;
437 unsigned StartPosition = cur->beginNumber();
438 const TargetRegisterClass *RC = mf_->getSSARegMap()->getRegClass(cur->reg);
439 const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
441 // for every interval in inactive we overlap with, mark the
442 // register as not free and update spill weights.
443 for (IntervalPtrs::const_iterator i = inactive_.begin(),
444 e = inactive_.end(); i != e; ++i) {
445 unsigned Reg = i->first->reg;
446 assert(MRegisterInfo::isVirtualRegister(Reg) &&
447 "Can only allocate virtual registers!");
448 const TargetRegisterClass *RegRC = mf_->getSSARegMap()->getRegClass(Reg);
449 // If this is not in a related reg class to the register we're allocating,
451 if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader &&
452 cur->overlapsFrom(*i->first, i->second-1)) {
453 Reg = vrm_->getPhys(Reg);
454 prt_->addRegUse(Reg);
455 SpillWeightsToAdd.push_back(std::make_pair(Reg, i->first->weight));
459 // Speculatively check to see if we can get a register right now. If not,
460 // we know we won't be able to by adding more constraints. If so, we can
461 // check to see if it is valid. Doing an exhaustive search of the fixed_ list
462 // is very bad (it contains all callee clobbered registers for any functions
463 // with a call), so we want to avoid doing that if possible.
464 unsigned physReg = getFreePhysReg(cur);
466 // We got a register. However, if it's in the fixed_ list, we might
467 // conflict with it. Check to see if we conflict with it or any of its
469 std::set<unsigned> RegAliases;
470 for (const unsigned *AS = mri_->getAliasSet(physReg); *AS; ++AS)
471 RegAliases.insert(*AS);
473 bool ConflictsWithFixed = false;
474 for (unsigned i = 0, e = fixed_.size(); i != e; ++i) {
475 IntervalPtr &IP = fixed_[i];
476 if (physReg == IP.first->reg || RegAliases.count(IP.first->reg)) {
477 // Okay, this reg is on the fixed list. Check to see if we actually
479 LiveInterval *I = IP.first;
480 if (I->endNumber() > StartPosition) {
481 LiveInterval::iterator II = I->advanceTo(IP.second, StartPosition);
483 if (II != I->begin() && II->start > StartPosition)
485 if (cur->overlapsFrom(*I, II)) {
486 ConflictsWithFixed = true;
493 // Okay, the register picked by our speculative getFreePhysReg call turned
494 // out to be in use. Actually add all of the conflicting fixed registers to
495 // prt so we can do an accurate query.
496 if (ConflictsWithFixed) {
497 // For every interval in fixed we overlap with, mark the register as not
498 // free and update spill weights.
499 for (unsigned i = 0, e = fixed_.size(); i != e; ++i) {
500 IntervalPtr &IP = fixed_[i];
501 LiveInterval *I = IP.first;
503 const TargetRegisterClass *RegRC = OneClassForEachPhysReg[I->reg];
504 if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader &&
505 I->endNumber() > StartPosition) {
506 LiveInterval::iterator II = I->advanceTo(IP.second, StartPosition);
508 if (II != I->begin() && II->start > StartPosition)
510 if (cur->overlapsFrom(*I, II)) {
511 unsigned reg = I->reg;
512 prt_->addRegUse(reg);
513 SpillWeightsToAdd.push_back(std::make_pair(reg, I->weight));
518 // Using the newly updated prt_ object, which includes conflicts in the
519 // future, see if there are any registers available.
520 physReg = getFreePhysReg(cur);
524 // Restore the physical register tracker, removing information about the
528 // if we find a free register, we are done: assign this virtual to
529 // the free physical register and add this interval to the active
532 DOUT << mri_->getName(physReg) << '\n';
533 vrm_->assignVirt2Phys(cur->reg, physReg);
534 prt_->addRegUse(physReg);
535 active_.push_back(std::make_pair(cur, cur->begin()));
536 handled_.push_back(cur);
539 DOUT << "no free registers\n";
541 // Compile the spill weights into an array that is better for scanning.
542 std::vector<float> SpillWeights(mri_->getNumRegs(), 0.0);
543 for (std::vector<std::pair<unsigned, float> >::iterator
544 I = SpillWeightsToAdd.begin(), E = SpillWeightsToAdd.end(); I != E; ++I)
545 updateSpillWeights(SpillWeights, I->first, I->second, mri_);
547 // for each interval in active, update spill weights.
548 for (IntervalPtrs::const_iterator i = active_.begin(), e = active_.end();
550 unsigned reg = i->first->reg;
551 assert(MRegisterInfo::isVirtualRegister(reg) &&
552 "Can only allocate virtual registers!");
553 reg = vrm_->getPhys(reg);
554 updateSpillWeights(SpillWeights, reg, i->first->weight, mri_);
557 DOUT << "\tassigning stack slot at interval "<< *cur << ":\n";
559 // Find a register to spill.
560 float minWeight = HUGE_VALF;
561 unsigned minReg = cur->preference; // Try the preferred register first.
563 if (!minReg || SpillWeights[minReg] == HUGE_VALF)
564 for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
565 e = RC->allocation_order_end(*mf_); i != e; ++i) {
567 if (minWeight > SpillWeights[reg]) {
568 minWeight = SpillWeights[reg];
573 // If we didn't find a register that is spillable, try aliases?
575 for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
576 e = RC->allocation_order_end(*mf_); i != e; ++i) {
578 // No need to worry about if the alias register size < regsize of RC.
579 // We are going to spill all registers that alias it anyway.
580 for (const unsigned* as = mri_->getAliasSet(reg); *as; ++as) {
581 if (minWeight > SpillWeights[*as]) {
582 minWeight = SpillWeights[*as];
588 // All registers must have inf weight. Just grab one!
590 minReg = *RC->allocation_order_begin(*mf_);
593 DOUT << "\t\tregister with min weight: "
594 << mri_->getName(minReg) << " (" << minWeight << ")\n";
596 // if the current has the minimum weight, we need to spill it and
597 // add any added intervals back to unhandled, and restart
599 if (cur->weight != HUGE_VALF && cur->weight <= minWeight) {
600 DOUT << "\t\t\tspilling(c): " << *cur << '\n';
601 // if the current interval is re-materializable, remember so and don't
602 // assign it a spill slot.
604 vrm_->setVirtIsReMaterialized(cur->reg, cur->remat);
605 int slot = cur->remat ? vrm_->assignVirtReMatId(cur->reg)
606 : vrm_->assignVirt2StackSlot(cur->reg);
607 std::vector<LiveInterval*> added =
608 li_->addIntervalsForSpills(*cur, *vrm_, slot);
610 return; // Early exit if all spills were folded.
612 // Merge added with unhandled. Note that we know that
613 // addIntervalsForSpills returns intervals sorted by their starting
615 for (unsigned i = 0, e = added.size(); i != e; ++i)
616 unhandled_.push(added[i]);
622 // push the current interval back to unhandled since we are going
623 // to re-run at least this iteration. Since we didn't modify it it
624 // should go back right in the front of the list
625 unhandled_.push(cur);
627 // otherwise we spill all intervals aliasing the register with
628 // minimum weight, rollback to the interval with the earliest
629 // start point and let the linear scan algorithm run again
630 std::vector<LiveInterval*> added;
631 assert(MRegisterInfo::isPhysicalRegister(minReg) &&
632 "did not choose a register to spill?");
633 BitVector toSpill(mri_->getNumRegs());
635 // We are going to spill minReg and all its aliases.
636 toSpill[minReg] = true;
637 for (const unsigned* as = mri_->getAliasSet(minReg); *as; ++as)
640 // the earliest start of a spilled interval indicates up to where
641 // in handled we need to roll back
642 unsigned earliestStart = cur->beginNumber();
644 // set of spilled vregs (used later to rollback properly)
645 std::set<unsigned> spilled;
647 // spill live intervals of virtual regs mapped to the physical register we
648 // want to clear (and its aliases). We only spill those that overlap with the
649 // current interval as the rest do not affect its allocation. we also keep
650 // track of the earliest start of all spilled live intervals since this will
651 // mark our rollback point.
652 for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
653 unsigned reg = i->first->reg;
654 if (//MRegisterInfo::isVirtualRegister(reg) &&
655 toSpill[vrm_->getPhys(reg)] &&
656 cur->overlapsFrom(*i->first, i->second)) {
657 DOUT << "\t\t\tspilling(a): " << *i->first << '\n';
658 earliestStart = std::min(earliestStart, i->first->beginNumber());
660 vrm_->setVirtIsReMaterialized(reg, i->first->remat);
661 int slot = i->first->remat ? vrm_->assignVirtReMatId(reg)
662 : vrm_->assignVirt2StackSlot(reg);
663 std::vector<LiveInterval*> newIs =
664 li_->addIntervalsForSpills(*i->first, *vrm_, slot);
665 std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
669 for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end(); ++i){
670 unsigned reg = i->first->reg;
671 if (//MRegisterInfo::isVirtualRegister(reg) &&
672 toSpill[vrm_->getPhys(reg)] &&
673 cur->overlapsFrom(*i->first, i->second-1)) {
674 DOUT << "\t\t\tspilling(i): " << *i->first << '\n';
675 earliestStart = std::min(earliestStart, i->first->beginNumber());
677 vrm_->setVirtIsReMaterialized(reg, i->first->remat);
678 int slot = i->first->remat ? vrm_->assignVirtReMatId(reg)
679 : vrm_->assignVirt2StackSlot(reg);
680 std::vector<LiveInterval*> newIs =
681 li_->addIntervalsForSpills(*i->first, *vrm_, slot);
682 std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
687 DOUT << "\t\trolling back to: " << earliestStart << '\n';
689 // Scan handled in reverse order up to the earliest start of a
690 // spilled live interval and undo each one, restoring the state of
692 while (!handled_.empty()) {
693 LiveInterval* i = handled_.back();
694 // If this interval starts before t we are done.
695 if (i->beginNumber() < earliestStart)
697 DOUT << "\t\t\tundo changes for: " << *i << '\n';
700 // When undoing a live interval allocation we must know if it is active or
701 // inactive to properly update the PhysRegTracker and the VirtRegMap.
702 IntervalPtrs::iterator it;
703 if ((it = FindIntervalInVector(active_, i)) != active_.end()) {
705 assert(!MRegisterInfo::isPhysicalRegister(i->reg));
706 if (!spilled.count(i->reg))
708 prt_->delRegUse(vrm_->getPhys(i->reg));
709 vrm_->clearVirt(i->reg);
710 } else if ((it = FindIntervalInVector(inactive_, i)) != inactive_.end()) {
712 assert(!MRegisterInfo::isPhysicalRegister(i->reg));
713 if (!spilled.count(i->reg))
715 vrm_->clearVirt(i->reg);
717 assert(MRegisterInfo::isVirtualRegister(i->reg) &&
718 "Can only allocate virtual registers!");
719 vrm_->clearVirt(i->reg);
724 // Rewind the iterators in the active, inactive, and fixed lists back to the
725 // point we reverted to.
726 RevertVectorIteratorsTo(active_, earliestStart);
727 RevertVectorIteratorsTo(inactive_, earliestStart);
728 RevertVectorIteratorsTo(fixed_, earliestStart);
730 // scan the rest and undo each interval that expired after t and
731 // insert it in active (the next iteration of the algorithm will
732 // put it in inactive if required)
733 for (unsigned i = 0, e = handled_.size(); i != e; ++i) {
734 LiveInterval *HI = handled_[i];
735 if (!HI->expiredAt(earliestStart) &&
736 HI->expiredAt(cur->beginNumber())) {
737 DOUT << "\t\t\tundo changes for: " << *HI << '\n';
738 active_.push_back(std::make_pair(HI, HI->begin()));
739 assert(!MRegisterInfo::isPhysicalRegister(HI->reg));
740 prt_->addRegUse(vrm_->getPhys(HI->reg));
744 // merge added with unhandled
745 for (unsigned i = 0, e = added.size(); i != e; ++i)
746 unhandled_.push(added[i]);
749 /// getFreePhysReg - return a free physical register for this virtual register
750 /// interval if we have one, otherwise return 0.
751 unsigned RA::getFreePhysReg(LiveInterval *cur) {
752 std::vector<unsigned> inactiveCounts(mri_->getNumRegs(), 0);
753 unsigned MaxInactiveCount = 0;
755 const TargetRegisterClass *RC = mf_->getSSARegMap()->getRegClass(cur->reg);
756 const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
758 for (IntervalPtrs::iterator i = inactive_.begin(), e = inactive_.end();
760 unsigned reg = i->first->reg;
761 assert(MRegisterInfo::isVirtualRegister(reg) &&
762 "Can only allocate virtual registers!");
764 // If this is not in a related reg class to the register we're allocating,
766 const TargetRegisterClass *RegRC = mf_->getSSARegMap()->getRegClass(reg);
767 if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader) {
768 reg = vrm_->getPhys(reg);
769 ++inactiveCounts[reg];
770 MaxInactiveCount = std::max(MaxInactiveCount, inactiveCounts[reg]);
774 unsigned FreeReg = 0;
775 unsigned FreeRegInactiveCount = 0;
777 // If copy coalescer has assigned a "preferred" register, check if it's
780 if (prt_->isRegAvail(cur->preference)) {
781 DOUT << "\t\tassigned the preferred register: "
782 << mri_->getName(cur->preference) << "\n";
783 return cur->preference;
785 DOUT << "\t\tunable to assign the preferred register: "
786 << mri_->getName(cur->preference) << "\n";
788 // Scan for the first available register.
789 TargetRegisterClass::iterator I = RC->allocation_order_begin(*mf_);
790 TargetRegisterClass::iterator E = RC->allocation_order_end(*mf_);
792 if (prt_->isRegAvail(*I)) {
794 FreeRegInactiveCount = inactiveCounts[FreeReg];
798 // If there are no free regs, or if this reg has the max inactive count,
799 // return this register.
800 if (FreeReg == 0 || FreeRegInactiveCount == MaxInactiveCount) return FreeReg;
802 // Continue scanning the registers, looking for the one with the highest
803 // inactive count. Alkis found that this reduced register pressure very
804 // slightly on X86 (in rev 1.94 of this file), though this should probably be
806 for (; I != E; ++I) {
808 if (prt_->isRegAvail(Reg) && FreeRegInactiveCount < inactiveCounts[Reg]) {
810 FreeRegInactiveCount = inactiveCounts[Reg];
811 if (FreeRegInactiveCount == MaxInactiveCount)
812 break; // We found the one with the max inactive count.
819 FunctionPass* llvm::createLinearScanRegisterAllocator() {