1 //===-- PreAllocSplitting.cpp - Pre-allocation Interval Spltting Pass. ----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the machine instruction level pre-register allocation
11 // live interval splitting pass. It finds live interval barriers, i.e.
12 // instructions which will kill all physical registers in certain register
13 // classes, and split all live intervals which cross the barrier.
15 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "pre-alloc-split"
18 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
19 #include "llvm/CodeGen/LiveStackAnalysis.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineLoopInfo.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/CodeGen/RegisterCoalescer.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include "llvm/Target/TargetOptions.h"
29 #include "llvm/Target/TargetRegisterInfo.h"
30 #include "llvm/Support/CommandLine.h"
31 #include "llvm/Support/Debug.h"
32 #include "llvm/ADT/DenseMap.h"
33 #include "llvm/ADT/SmallPtrSet.h"
34 #include "llvm/ADT/Statistic.h"
37 static cl::opt<int> PreSplitLimit("pre-split-limit", cl::init(-1), cl::Hidden);
39 STATISTIC(NumSplits, "Number of intervals split");
42 class VISIBILITY_HIDDEN PreAllocSplitting : public MachineFunctionPass {
43 MachineFunction *CurrMF;
44 const TargetMachine *TM;
45 const TargetInstrInfo *TII;
46 MachineFrameInfo *MFI;
47 MachineRegisterInfo *MRI;
51 // Barrier - Current barrier being processed.
52 MachineInstr *Barrier;
54 // BarrierMBB - Basic block where the barrier resides in.
55 MachineBasicBlock *BarrierMBB;
57 // Barrier - Current barrier index.
60 // CurrLI - Current live interval being split.
63 // CurrSLI - Current stack slot live interval.
64 LiveInterval *CurrSLI;
66 // CurrSValNo - Current val# for the stack slot live interval.
69 // IntervalSSMap - A map from live interval to spill slots.
70 DenseMap<unsigned, int> IntervalSSMap;
72 // RestoreMIs - All the restores inserted due to live interval splitting.
73 SmallPtrSet<MachineInstr*, 8> RestoreMIs;
77 PreAllocSplitting() : MachineFunctionPass(&ID) {}
79 virtual bool runOnMachineFunction(MachineFunction &MF);
81 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
82 AU.addRequired<LiveIntervals>();
83 AU.addPreserved<LiveIntervals>();
84 AU.addRequired<LiveStacks>();
85 AU.addPreserved<LiveStacks>();
86 AU.addPreserved<RegisterCoalescer>();
88 AU.addPreservedID(StrongPHIEliminationID);
90 AU.addPreservedID(PHIEliminationID);
91 MachineFunctionPass::getAnalysisUsage(AU);
94 virtual void releaseMemory() {
95 IntervalSSMap.clear();
99 virtual const char *getPassName() const {
100 return "Pre-Register Allocaton Live Interval Splitting";
103 /// print - Implement the dump method.
104 virtual void print(std::ostream &O, const Module* M = 0) const {
108 void print(std::ostream *O, const Module* M = 0) const {
113 MachineBasicBlock::iterator
114 findNextEmptySlot(MachineBasicBlock*, MachineInstr*,
117 MachineBasicBlock::iterator
118 findSpillPoint(MachineBasicBlock*, MachineInstr*, MachineInstr*,
119 SmallPtrSet<MachineInstr*, 4>&, unsigned&);
121 MachineBasicBlock::iterator
122 findRestorePoint(MachineBasicBlock*, MachineInstr*, unsigned,
123 SmallPtrSet<MachineInstr*, 4>&, unsigned&);
125 int CreateSpillStackSlot(unsigned, const TargetRegisterClass *);
127 bool IsAvailableInStack(unsigned, unsigned, int&) const;
129 void UpdateSpillSlotInterval(VNInfo*, unsigned, unsigned);
131 void UpdateRegisterInterval(VNInfo*, unsigned, unsigned);
133 bool ShrinkWrapToLastUse(MachineBasicBlock*, VNInfo*,
134 SmallVector<MachineOperand*, 4>&,
135 SmallPtrSet<MachineInstr*, 4>&);
137 void ShrinkWrapLiveInterval(VNInfo*, MachineBasicBlock*, MachineBasicBlock*,
138 MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*, 8>&,
139 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >&,
140 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >&,
141 SmallVector<MachineBasicBlock*, 4>&);
143 bool SplitRegLiveInterval(LiveInterval*);
145 bool SplitRegLiveIntervals(const TargetRegisterClass **);
147 } // end anonymous namespace
149 char PreAllocSplitting::ID = 0;
151 static RegisterPass<PreAllocSplitting>
152 X("pre-alloc-splitting", "Pre-Register Allocation Live Interval Splitting");
154 const PassInfo *const llvm::PreAllocSplittingID = &X;
157 /// findNextEmptySlot - Find a gap after the given machine instruction in the
158 /// instruction index map. If there isn't one, return end().
159 MachineBasicBlock::iterator
160 PreAllocSplitting::findNextEmptySlot(MachineBasicBlock *MBB, MachineInstr *MI,
161 unsigned &SpotIndex) {
162 MachineBasicBlock::iterator MII = MI;
163 if (++MII != MBB->end()) {
164 unsigned Index = LIs->findGapBeforeInstr(LIs->getInstructionIndex(MII));
173 /// findSpillPoint - Find a gap as far away from the given MI that's suitable
174 /// for spilling the current live interval. The index must be before any
175 /// defs and uses of the live interval register in the mbb. Return begin() if
177 MachineBasicBlock::iterator
178 PreAllocSplitting::findSpillPoint(MachineBasicBlock *MBB, MachineInstr *MI,
180 SmallPtrSet<MachineInstr*, 4> &RefsInMBB,
181 unsigned &SpillIndex) {
182 MachineBasicBlock::iterator Pt = MBB->begin();
184 // Go top down if RefsInMBB is empty.
185 if (RefsInMBB.empty() && !DefMI) {
186 MachineBasicBlock::iterator MII = MBB->begin();
187 MachineBasicBlock::iterator EndPt = MI;
190 unsigned Index = LIs->getInstructionIndex(MII);
191 unsigned Gap = LIs->findGapBeforeInstr(Index);
197 } while (MII != EndPt);
199 MachineBasicBlock::iterator MII = MI;
200 MachineBasicBlock::iterator EndPt = DefMI
201 ? MachineBasicBlock::iterator(DefMI) : MBB->begin();
202 while (MII != EndPt && !RefsInMBB.count(MII)) {
203 unsigned Index = LIs->getInstructionIndex(MII);
204 if (LIs->hasGapBeforeInstr(Index)) {
206 SpillIndex = LIs->findGapBeforeInstr(Index, true);
215 /// findRestorePoint - Find a gap in the instruction index map that's suitable
216 /// for restoring the current live interval value. The index must be before any
217 /// uses of the live interval register in the mbb. Return end() if none is
219 MachineBasicBlock::iterator
220 PreAllocSplitting::findRestorePoint(MachineBasicBlock *MBB, MachineInstr *MI,
222 SmallPtrSet<MachineInstr*, 4> &RefsInMBB,
223 unsigned &RestoreIndex) {
224 MachineBasicBlock::iterator Pt = MBB->end();
225 unsigned EndIdx = LIs->getMBBEndIdx(MBB);
227 // Go bottom up if RefsInMBB is empty and the end of the mbb isn't beyond
228 // the last index in the live range.
229 if (RefsInMBB.empty() && LastIdx >= EndIdx) {
230 MachineBasicBlock::iterator MII = MBB->end();
231 MachineBasicBlock::iterator EndPt = MI;
234 unsigned Index = LIs->getInstructionIndex(MII);
235 unsigned Gap = LIs->findGapBeforeInstr(Index);
241 } while (MII != EndPt);
243 MachineBasicBlock::iterator MII = MI;
245 // FIXME: Limit the number of instructions to examine to reduce
247 while (MII != MBB->end()) {
248 unsigned Index = LIs->getInstructionIndex(MII);
251 unsigned Gap = LIs->findGapBeforeInstr(Index);
256 if (RefsInMBB.count(MII))
265 /// CreateSpillStackSlot - Create a stack slot for the live interval being
266 /// split. If the live interval was previously split, just reuse the same
268 int PreAllocSplitting::CreateSpillStackSlot(unsigned Reg,
269 const TargetRegisterClass *RC) {
271 DenseMap<unsigned, int>::iterator I = IntervalSSMap.find(Reg);
272 if (I != IntervalSSMap.end()) {
275 SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
276 IntervalSSMap[Reg] = SS;
279 // Create live interval for stack slot.
280 CurrSLI = &LSs->getOrCreateInterval(SS);
281 if (CurrSLI->getNumValNums())
282 CurrSValNo = CurrSLI->getValNumInfo(0);
284 CurrSValNo = CurrSLI->getNextValue(~0U, 0, LSs->getVNInfoAllocator());
288 /// IsAvailableInStack - Return true if register is available in a split stack
289 /// slot at the specified index.
291 PreAllocSplitting::IsAvailableInStack(unsigned Reg, unsigned Index, int &SS) const {
292 DenseMap<unsigned, int>::iterator I = IntervalSSMap.find(Reg);
293 if (I == IntervalSSMap.end())
295 if (LSs->getInterval(I->second).liveAt(Index)) {
302 /// UpdateSpillSlotInterval - Given the specified val# of the register live
303 /// interval being split, and the spill and restore indicies, update the live
304 /// interval of the spill stack slot.
306 PreAllocSplitting::UpdateSpillSlotInterval(VNInfo *ValNo, unsigned SpillIndex,
307 unsigned RestoreIndex) {
308 const LiveRange *LR = CurrLI->getLiveRangeContaining(SpillIndex);
309 if (LR->contains(RestoreIndex)) {
310 LiveRange SLR(SpillIndex, RestoreIndex, CurrSValNo);
311 CurrSLI->addRange(SLR);
315 SmallPtrSet<const LiveRange*, 4> Processed;
316 LiveRange SLR(SpillIndex, LR->end, CurrSValNo);
317 CurrSLI->addRange(SLR);
318 Processed.insert(LR);
320 // Start from the spill mbb, figure out the extend of the spill slot's
322 SmallVector<MachineBasicBlock*, 4> WorkList;
323 MachineBasicBlock *MBB = LIs->getMBBFromIndex(SpillIndex);
324 if (LR->end > LIs->getMBBEndIdx(MBB))
325 // If live range extend beyond end of mbb, add successors to work list.
326 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
327 SE = MBB->succ_end(); SI != SE; ++SI)
328 WorkList.push_back(*SI);
329 // Live range may cross multiple basic blocks, add all reachable mbbs to
331 LIs->findReachableMBBs(LR->start, LR->end, WorkList);
333 while (!WorkList.empty()) {
334 MachineBasicBlock *MBB = WorkList.back();
336 unsigned Idx = LIs->getMBBStartIdx(MBB);
337 LR = CurrLI->getLiveRangeContaining(Idx);
338 if (LR && LR->valno == ValNo && !Processed.count(LR)) {
339 if (LR->contains(RestoreIndex)) {
340 // Spill slot live interval stops at the restore.
341 LiveRange SLR(LR->start, RestoreIndex, CurrSValNo);
342 CurrSLI->addRange(SLR);
343 LIs->findReachableMBBs(LR->start, RestoreIndex, WorkList);
345 LiveRange SLR(LR->start, LR->end, CurrSValNo);
346 CurrSLI->addRange(SLR);
347 LIs->findReachableMBBs(LR->start, LR->end, WorkList);
349 Processed.insert(LR);
354 /// UpdateRegisterInterval - Given the specified val# of the current live
355 /// interval is being split, and the spill and restore indices, update the live
356 /// interval accordingly.
358 PreAllocSplitting::UpdateRegisterInterval(VNInfo *ValNo, unsigned SpillIndex,
359 unsigned RestoreIndex) {
360 SmallVector<std::pair<unsigned,unsigned>, 4> Before;
361 SmallVector<std::pair<unsigned,unsigned>, 4> After;
362 SmallVector<unsigned, 4> BeforeKills;
363 SmallVector<unsigned, 4> AfterKills;
364 SmallPtrSet<const LiveRange*, 4> Processed;
366 // First, let's figure out which parts of the live interval is now defined
367 // by the restore, which are defined by the original definition.
368 const LiveRange *LR = CurrLI->getLiveRangeContaining(RestoreIndex);
369 After.push_back(std::make_pair(RestoreIndex, LR->end));
370 if (CurrLI->isKill(ValNo, LR->end))
371 AfterKills.push_back(LR->end);
373 assert(LR->contains(SpillIndex));
374 if (SpillIndex > LR->start) {
375 Before.push_back(std::make_pair(LR->start, SpillIndex));
376 BeforeKills.push_back(SpillIndex);
378 Processed.insert(LR);
380 // Start from the restore mbb, figure out what part of the live interval
381 // are defined by the restore.
382 SmallVector<MachineBasicBlock*, 4> WorkList;
383 MachineBasicBlock *MBB = LIs->getMBBFromIndex(RestoreIndex);
384 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
385 SE = MBB->succ_end(); SI != SE; ++SI)
386 WorkList.push_back(*SI);
388 while (!WorkList.empty()) {
389 MBB = WorkList.back();
391 unsigned Idx = LIs->getMBBStartIdx(MBB);
392 LR = CurrLI->getLiveRangeContaining(Idx);
393 if (LR && LR->valno == ValNo && !Processed.count(LR)) {
394 After.push_back(std::make_pair(LR->start, LR->end));
395 if (CurrLI->isKill(ValNo, LR->end))
396 AfterKills.push_back(LR->end);
397 Idx = LIs->getMBBEndIdx(MBB);
399 // Live range extend beyond at least one mbb. Let's see what other
401 LIs->findReachableMBBs(LR->start, LR->end, WorkList);
403 Processed.insert(LR);
407 for (LiveInterval::iterator I = CurrLI->begin(), E = CurrLI->end();
410 if (LR->valno == ValNo && !Processed.count(LR)) {
411 Before.push_back(std::make_pair(LR->start, LR->end));
412 if (CurrLI->isKill(ValNo, LR->end))
413 BeforeKills.push_back(LR->end);
417 // Now create new val#s to represent the live ranges defined by the old def
418 // those defined by the restore.
419 unsigned AfterDef = ValNo->def;
420 MachineInstr *AfterCopy = ValNo->copy;
421 bool HasPHIKill = ValNo->hasPHIKill;
422 CurrLI->removeValNo(ValNo);
423 VNInfo *BValNo = (Before.empty())
425 : CurrLI->getNextValue(AfterDef, AfterCopy, LIs->getVNInfoAllocator());
427 CurrLI->addKills(BValNo, BeforeKills);
429 VNInfo *AValNo = (After.empty())
431 : CurrLI->getNextValue(RestoreIndex, 0, LIs->getVNInfoAllocator());
433 AValNo->hasPHIKill = HasPHIKill;
434 CurrLI->addKills(AValNo, AfterKills);
437 for (unsigned i = 0, e = Before.size(); i != e; ++i) {
438 unsigned Start = Before[i].first;
439 unsigned End = Before[i].second;
440 CurrLI->addRange(LiveRange(Start, End, BValNo));
442 for (unsigned i = 0, e = After.size(); i != e; ++i) {
443 unsigned Start = After[i].first;
444 unsigned End = After[i].second;
445 CurrLI->addRange(LiveRange(Start, End, AValNo));
449 /// ShrinkWrapToLastUse - There are uses of the current live interval in the
450 /// given block, shrink wrap the live interval to the last use (i.e. remove
451 /// from last use to the end of the mbb). In case mbb is the where the barrier
452 /// is, remove from the last use to the barrier.
454 PreAllocSplitting::ShrinkWrapToLastUse(MachineBasicBlock *MBB, VNInfo *ValNo,
455 SmallVector<MachineOperand*, 4> &Uses,
456 SmallPtrSet<MachineInstr*, 4> &UseMIs) {
457 MachineOperand *LastMO = 0;
458 MachineInstr *LastMI = 0;
459 if (MBB != BarrierMBB && Uses.size() == 1) {
460 // Single use, no need to traverse the block. We can't assume this for the
461 // barrier bb though since the use is probably below the barrier.
463 LastMI = LastMO->getParent();
465 MachineBasicBlock::iterator MEE = MBB->begin();
466 MachineBasicBlock::iterator MII;
467 if (MBB == BarrierMBB)
473 MachineInstr *UseMI = &*MII;
474 if (!UseMIs.count(UseMI))
476 for (unsigned i = 0, e = UseMI->getNumOperands(); i != e; ++i) {
477 MachineOperand &MO = UseMI->getOperand(i);
478 if (MO.isReg() && MO.getReg() == CurrLI->reg) {
488 // Cut off live range from last use (or beginning of the mbb if there
489 // are no uses in it) to the end of the mbb.
490 unsigned RangeStart, RangeEnd = LIs->getMBBEndIdx(MBB)+1;
492 RangeStart = LIs->getUseIndex(LIs->getInstructionIndex(LastMI))+1;
493 assert(!LastMO->isKill() && "Last use already terminates the interval?");
496 assert(MBB == BarrierMBB);
497 RangeStart = LIs->getMBBStartIdx(MBB);
499 if (MBB == BarrierMBB)
500 RangeEnd = LIs->getUseIndex(BarrierIdx)+1;
501 CurrLI->removeRange(RangeStart, RangeEnd);
503 CurrLI->addKill(ValNo, RangeStart);
505 // Return true if the last use becomes a new kill.
509 /// ShrinkWrapLiveInterval - Recursively traverse the predecessor
510 /// chain to find the new 'kills' and shrink wrap the live interval to the
511 /// new kill indices.
513 PreAllocSplitting::ShrinkWrapLiveInterval(VNInfo *ValNo, MachineBasicBlock *MBB,
514 MachineBasicBlock *SuccMBB, MachineBasicBlock *DefMBB,
515 SmallPtrSet<MachineBasicBlock*, 8> &Visited,
516 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> > &Uses,
517 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> > &UseMIs,
518 SmallVector<MachineBasicBlock*, 4> &UseMBBs) {
519 if (Visited.count(MBB))
522 // If live interval is live in another successor path, then we can't process
523 // this block. But we may able to do so after all the successors have been
525 if (MBB != BarrierMBB) {
526 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
527 SE = MBB->succ_end(); SI != SE; ++SI) {
528 MachineBasicBlock *SMBB = *SI;
531 if (CurrLI->liveAt(LIs->getMBBStartIdx(SMBB)))
538 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >::iterator
539 UMII = Uses.find(MBB);
540 if (UMII != Uses.end()) {
541 // At least one use in this mbb, lets look for the kill.
542 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >::iterator
543 UMII2 = UseMIs.find(MBB);
544 if (ShrinkWrapToLastUse(MBB, ValNo, UMII->second, UMII2->second))
545 // Found a kill, shrink wrapping of this path ends here.
547 } else if (MBB == DefMBB) {
548 // There are no uses after the def.
549 MachineInstr *DefMI = LIs->getInstructionFromIndex(ValNo->def);
550 assert(RestoreMIs.count(DefMI) && "Not defined by a join?");
551 if (UseMBBs.empty()) {
552 // The only use must be below barrier in the barrier block. It's safe to
554 LIs->RemoveMachineInstrFromMaps(DefMI);
555 DefMI->eraseFromParent();
556 CurrLI->removeRange(ValNo->def, LIs->getMBBEndIdx(MBB)+1);
558 } else if (MBB == BarrierMBB) {
559 // Remove entire live range from start of mbb to barrier.
560 CurrLI->removeRange(LIs->getMBBStartIdx(MBB),
561 LIs->getUseIndex(BarrierIdx)+1);
563 // Remove entire live range of the mbb out of the live interval.
564 CurrLI->removeRange(LIs->getMBBStartIdx(MBB), LIs->getMBBEndIdx(MBB)+1);
568 // Reached the def mbb, stop traversing this path further.
571 // Traverse the pathes up the predecessor chains further.
572 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
573 PE = MBB->pred_end(); PI != PE; ++PI) {
574 MachineBasicBlock *Pred = *PI;
577 if (Pred == DefMBB && ValNo->hasPHIKill)
578 // Pred is the def bb and the def reaches other val#s, we must
579 // allow the value to be live out of the bb.
581 ShrinkWrapLiveInterval(ValNo, Pred, MBB, DefMBB, Visited,
582 Uses, UseMIs, UseMBBs);
588 /// SplitRegLiveInterval - Split (spill and restore) the given live interval
589 /// so it would not cross the barrier that's being processed. Shrink wrap
590 /// (minimize) the live interval to the last uses.
591 bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) {
594 // Find live range where current interval cross the barrier.
595 LiveInterval::iterator LR =
596 CurrLI->FindLiveRangeContaining(LIs->getUseIndex(BarrierIdx));
597 VNInfo *ValNo = LR->valno;
599 if (ValNo->def == ~1U) {
600 // Defined by a dead def? How can this be?
601 assert(0 && "Val# is defined by a dead def?");
605 // FIXME: For now, if definition is rematerializable, do not split.
606 MachineInstr *DefMI = (ValNo->def != ~0U)
607 ? LIs->getInstructionFromIndex(ValNo->def) : NULL;
608 if (DefMI && LIs->isReMaterializable(*LI, ValNo, DefMI))
611 // Find all references in the barrier mbb.
612 SmallPtrSet<MachineInstr*, 4> RefsInMBB;
613 for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(CurrLI->reg),
614 E = MRI->reg_end(); I != E; ++I) {
615 MachineInstr *RefMI = &*I;
616 if (RefMI->getParent() == BarrierMBB)
617 RefsInMBB.insert(RefMI);
620 // Find a point to restore the value after the barrier.
621 unsigned RestoreIndex;
622 MachineBasicBlock::iterator RestorePt =
623 findRestorePoint(BarrierMBB, Barrier, LR->end, RefsInMBB, RestoreIndex);
624 if (RestorePt == BarrierMBB->end())
627 // Add a spill either before the barrier or after the definition.
628 MachineBasicBlock *DefMBB = DefMI ? DefMI->getParent() : NULL;
629 const TargetRegisterClass *RC = MRI->getRegClass(CurrLI->reg);
630 unsigned SpillIndex = 0;
631 MachineInstr *SpillMI = NULL;
633 if (ValNo->def == ~0U) {
634 // If it's defined by a phi, we must split just before the barrier.
635 MachineBasicBlock::iterator SpillPt =
636 findSpillPoint(BarrierMBB, Barrier, NULL, RefsInMBB, SpillIndex);
637 if (SpillPt == BarrierMBB->begin())
638 return false; // No gap to insert spill.
640 SS = CreateSpillStackSlot(CurrLI->reg, RC);
641 TII->storeRegToStackSlot(*BarrierMBB, SpillPt, CurrLI->reg, true, SS, RC);
642 SpillMI = prior(SpillPt);
643 LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
644 } else if (!IsAvailableInStack(CurrLI->reg, RestoreIndex, SS)) {
645 // If it's already split, just restore the value. There is no need to spill
648 return false; // Def is dead. Do nothing.
649 // Check if it's possible to insert a spill after the def MI.
650 MachineBasicBlock::iterator SpillPt;
651 if (DefMBB == BarrierMBB) {
652 // Add spill after the def and the last use before the barrier.
653 SpillPt = findSpillPoint(BarrierMBB, Barrier, DefMI, RefsInMBB, SpillIndex);
654 if (SpillPt == DefMBB->begin())
655 return false; // No gap to insert spill.
657 SpillPt = findNextEmptySlot(DefMBB, DefMI, SpillIndex);
658 if (SpillPt == DefMBB->end())
659 return false; // No gap to insert spill.
661 // Add spill. The store instruction kills the register if def is before
662 // the barrier in the barrier block.
663 SS = CreateSpillStackSlot(CurrLI->reg, RC);
664 TII->storeRegToStackSlot(*DefMBB, SpillPt, CurrLI->reg,
665 DefMBB == BarrierMBB, SS, RC);
666 SpillMI = prior(SpillPt);
667 LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
671 TII->loadRegFromStackSlot(*BarrierMBB, RestorePt, CurrLI->reg, SS, RC);
672 MachineInstr *LoadMI = prior(RestorePt);
673 LIs->InsertMachineInstrInMaps(LoadMI, RestoreIndex);
674 RestoreMIs.insert(LoadMI);
676 // If live interval is spilled in the same block as the barrier, just
677 // create a hole in the interval.
679 (SpillMI && SpillMI->getParent() == BarrierMBB)) {
680 // Update spill stack slot live interval.
681 UpdateSpillSlotInterval(ValNo, LIs->getUseIndex(SpillIndex)+1,
682 LIs->getDefIndex(RestoreIndex));
684 UpdateRegisterInterval(ValNo, LIs->getUseIndex(SpillIndex)+1,
685 LIs->getDefIndex(RestoreIndex));
691 // Update spill stack slot live interval.
693 // If value is already in stack at the restore point, there is
694 // no need to update the live interval.
695 UpdateSpillSlotInterval(ValNo, LIs->getUseIndex(SpillIndex)+1,
696 LIs->getDefIndex(RestoreIndex));
698 // Shrink wrap the live interval by walking up the CFG and find the
700 // Now let's find all the uses of the val#.
701 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> > Uses;
702 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> > UseMIs;
703 SmallPtrSet<MachineBasicBlock*, 4> Seen;
704 SmallVector<MachineBasicBlock*, 4> UseMBBs;
705 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(CurrLI->reg),
706 UE = MRI->use_end(); UI != UE; ++UI) {
707 MachineOperand &UseMO = UI.getOperand();
708 MachineInstr *UseMI = UseMO.getParent();
709 unsigned UseIdx = LIs->getInstructionIndex(UseMI);
710 LiveInterval::iterator ULR = CurrLI->FindLiveRangeContaining(UseIdx);
711 if (ULR->valno != ValNo)
713 MachineBasicBlock *UseMBB = UseMI->getParent();
714 // Remember which other mbb's use this val#.
715 if (Seen.insert(UseMBB) && UseMBB != BarrierMBB)
716 UseMBBs.push_back(UseMBB);
717 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >::iterator
718 UMII = Uses.find(UseMBB);
719 if (UMII != Uses.end()) {
720 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >::iterator
721 UMII2 = UseMIs.find(UseMBB);
722 UMII->second.push_back(&UseMO);
723 UMII2->second.insert(UseMI);
725 SmallVector<MachineOperand*, 4> Ops;
726 Ops.push_back(&UseMO);
727 Uses.insert(std::make_pair(UseMBB, Ops));
728 SmallPtrSet<MachineInstr*, 4> MIs;
730 UseMIs.insert(std::make_pair(UseMBB, MIs));
734 // Walk up the predecessor chains.
735 SmallPtrSet<MachineBasicBlock*, 8> Visited;
736 ShrinkWrapLiveInterval(ValNo, BarrierMBB, NULL, DefMBB, Visited,
737 Uses, UseMIs, UseMBBs);
739 // Remove live range from barrier to the restore. FIXME: Find a better
740 // point to re-start the live interval.
741 UpdateRegisterInterval(ValNo, LIs->getUseIndex(BarrierIdx)+1,
742 LIs->getDefIndex(RestoreIndex));
748 /// SplitRegLiveIntervals - Split all register live intervals that cross the
749 /// barrier that's being processed.
751 PreAllocSplitting::SplitRegLiveIntervals(const TargetRegisterClass **RCs) {
752 // First find all the virtual registers whose live intervals are intercepted
753 // by the current barrier.
754 SmallVector<LiveInterval*, 8> Intervals;
755 for (const TargetRegisterClass **RC = RCs; *RC; ++RC) {
756 if (TII->IgnoreRegisterClassBarriers(*RC))
758 std::vector<unsigned> &VRs = MRI->getRegClassVirtRegs(*RC);
759 for (unsigned i = 0, e = VRs.size(); i != e; ++i) {
760 unsigned Reg = VRs[i];
761 if (!LIs->hasInterval(Reg))
763 LiveInterval *LI = &LIs->getInterval(Reg);
764 if (LI->liveAt(BarrierIdx) && !Barrier->readsRegister(Reg))
765 // Virtual register live interval is intercepted by the barrier. We
766 // should split and shrink wrap its interval if possible.
767 Intervals.push_back(LI);
771 // Process the affected live intervals.
773 while (!Intervals.empty()) {
774 if (PreSplitLimit != -1 && (int)NumSplits == PreSplitLimit)
776 LiveInterval *LI = Intervals.back();
777 Intervals.pop_back();
778 Change |= SplitRegLiveInterval(LI);
784 bool PreAllocSplitting::runOnMachineFunction(MachineFunction &MF) {
786 TM = &MF.getTarget();
787 TII = TM->getInstrInfo();
788 MFI = MF.getFrameInfo();
789 MRI = &MF.getRegInfo();
790 LIs = &getAnalysis<LiveIntervals>();
791 LSs = &getAnalysis<LiveStacks>();
793 bool MadeChange = false;
795 // Make sure blocks are numbered in order.
798 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
801 for (MachineBasicBlock::reverse_iterator II = BarrierMBB->rbegin(),
802 EE = BarrierMBB->rend(); II != EE; ++II) {
804 const TargetRegisterClass **BarrierRCs =
805 Barrier->getDesc().getRegClassBarriers();
808 BarrierIdx = LIs->getInstructionIndex(Barrier);
809 MadeChange |= SplitRegLiveIntervals(BarrierRCs);