1 //===- lib/CodeGen/MachineTraceMetrics.cpp ----------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #define DEBUG_TYPE "early-ifcvt"
11 #include "MachineTraceMetrics.h"
12 #include "llvm/CodeGen/MachineBasicBlock.h"
13 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
14 #include "llvm/CodeGen/MachineLoopInfo.h"
15 #include "llvm/CodeGen/MachineRegisterInfo.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/Target/TargetInstrInfo.h"
18 #include "llvm/Target/TargetRegisterInfo.h"
19 #include "llvm/Support/Debug.h"
20 #include "llvm/Support/raw_ostream.h"
21 #include "llvm/ADT/PostOrderIterator.h"
22 #include "llvm/ADT/SparseSet.h"
26 char MachineTraceMetrics::ID = 0;
27 char &llvm::MachineTraceMetricsID = MachineTraceMetrics::ID;
29 INITIALIZE_PASS_BEGIN(MachineTraceMetrics,
30 "machine-trace-metrics", "Machine Trace Metrics", false, true)
31 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
32 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
33 INITIALIZE_PASS_END(MachineTraceMetrics,
34 "machine-trace-metrics", "Machine Trace Metrics", false, true)
36 MachineTraceMetrics::MachineTraceMetrics()
37 : MachineFunctionPass(ID), MF(0), TII(0), TRI(0), MRI(0), Loops(0) {
38 std::fill(Ensembles, array_endof(Ensembles), (Ensemble*)0);
41 void MachineTraceMetrics::getAnalysisUsage(AnalysisUsage &AU) const {
43 AU.addRequired<MachineBranchProbabilityInfo>();
44 AU.addRequired<MachineLoopInfo>();
45 MachineFunctionPass::getAnalysisUsage(AU);
48 bool MachineTraceMetrics::runOnMachineFunction(MachineFunction &Func) {
50 TII = MF->getTarget().getInstrInfo();
51 TRI = MF->getTarget().getRegisterInfo();
52 ItinData = MF->getTarget().getInstrItineraryData();
53 MRI = &MF->getRegInfo();
54 Loops = &getAnalysis<MachineLoopInfo>();
55 BlockInfo.resize(MF->getNumBlockIDs());
59 void MachineTraceMetrics::releaseMemory() {
62 for (unsigned i = 0; i != TS_NumStrategies; ++i) {
68 //===----------------------------------------------------------------------===//
69 // Fixed block information
70 //===----------------------------------------------------------------------===//
72 // The number of instructions in a basic block and the CPU resources used by
73 // those instructions don't depend on any given trace strategy.
75 /// Compute the resource usage in basic block MBB.
76 const MachineTraceMetrics::FixedBlockInfo*
77 MachineTraceMetrics::getResources(const MachineBasicBlock *MBB) {
78 assert(MBB && "No basic block");
79 FixedBlockInfo *FBI = &BlockInfo[MBB->getNumber()];
80 if (FBI->hasResources())
83 // Compute resource usage in the block.
84 // FIXME: Compute per-functional unit counts.
85 FBI->HasCalls = false;
86 unsigned InstrCount = 0;
87 for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end();
89 const MachineInstr *MI = I;
90 if (MI->isTransient())
96 FBI->InstrCount = InstrCount;
100 //===----------------------------------------------------------------------===//
101 // Ensemble utility functions
102 //===----------------------------------------------------------------------===//
104 MachineTraceMetrics::Ensemble::Ensemble(MachineTraceMetrics *ct)
106 BlockInfo.resize(MTM.BlockInfo.size());
109 // Virtual destructor serves as an anchor.
110 MachineTraceMetrics::Ensemble::~Ensemble() {}
113 MachineTraceMetrics::Ensemble::getLoopFor(const MachineBasicBlock *MBB) const {
114 return MTM.Loops->getLoopFor(MBB);
117 // Update resource-related information in the TraceBlockInfo for MBB.
118 // Only update resources related to the trace above MBB.
119 void MachineTraceMetrics::Ensemble::
120 computeDepthResources(const MachineBasicBlock *MBB) {
121 TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
123 // Compute resources from trace above. The top block is simple.
126 TBI->Head = MBB->getNumber();
130 // Compute from the block above. A post-order traversal ensures the
131 // predecessor is always computed first.
132 TraceBlockInfo *PredTBI = &BlockInfo[TBI->Pred->getNumber()];
133 assert(PredTBI->hasValidDepth() && "Trace above has not been computed yet");
134 const FixedBlockInfo *PredFBI = MTM.getResources(TBI->Pred);
135 TBI->InstrDepth = PredTBI->InstrDepth + PredFBI->InstrCount;
136 TBI->Head = PredTBI->Head;
139 // Update resource-related information in the TraceBlockInfo for MBB.
140 // Only update resources related to the trace below MBB.
141 void MachineTraceMetrics::Ensemble::
142 computeHeightResources(const MachineBasicBlock *MBB) {
143 TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
145 // Compute resources for the current block.
146 TBI->InstrHeight = MTM.getResources(MBB)->InstrCount;
148 // The trace tail is done.
150 TBI->Tail = MBB->getNumber();
154 // Compute from the block below. A post-order traversal ensures the
155 // predecessor is always computed first.
156 TraceBlockInfo *SuccTBI = &BlockInfo[TBI->Succ->getNumber()];
157 assert(SuccTBI->hasValidHeight() && "Trace below has not been computed yet");
158 TBI->InstrHeight += SuccTBI->InstrHeight;
159 TBI->Tail = SuccTBI->Tail;
162 // Check if depth resources for MBB are valid and return the TBI.
163 // Return NULL if the resources have been invalidated.
164 const MachineTraceMetrics::TraceBlockInfo*
165 MachineTraceMetrics::Ensemble::
166 getDepthResources(const MachineBasicBlock *MBB) const {
167 const TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
168 return TBI->hasValidDepth() ? TBI : 0;
171 // Check if height resources for MBB are valid and return the TBI.
172 // Return NULL if the resources have been invalidated.
173 const MachineTraceMetrics::TraceBlockInfo*
174 MachineTraceMetrics::Ensemble::
175 getHeightResources(const MachineBasicBlock *MBB) const {
176 const TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
177 return TBI->hasValidHeight() ? TBI : 0;
180 //===----------------------------------------------------------------------===//
181 // Trace Selection Strategies
182 //===----------------------------------------------------------------------===//
184 // A trace selection strategy is implemented as a sub-class of Ensemble. The
185 // trace through a block B is computed by two DFS traversals of the CFG
186 // starting from B. One upwards, and one downwards. During the upwards DFS,
187 // pickTracePred() is called on the post-ordered blocks. During the downwards
188 // DFS, pickTraceSucc() is called in a post-order.
191 // We never allow traces that leave loops, but we do allow traces to enter
192 // nested loops. We also never allow traces to contain back-edges.
194 // This means that a loop header can never appear above the center block of a
195 // trace, except as the trace head. Below the center block, loop exiting edges
198 // Return true if an edge from the From loop to the To loop is leaving a loop.
199 // Either of To and From can be null.
200 static bool isExitingLoop(const MachineLoop *From, const MachineLoop *To) {
201 return From && !From->contains(To);
204 // MinInstrCountEnsemble - Pick the trace that executes the least number of
207 class MinInstrCountEnsemble : public MachineTraceMetrics::Ensemble {
208 const char *getName() const { return "MinInstr"; }
209 const MachineBasicBlock *pickTracePred(const MachineBasicBlock*);
210 const MachineBasicBlock *pickTraceSucc(const MachineBasicBlock*);
213 MinInstrCountEnsemble(MachineTraceMetrics *mtm)
214 : MachineTraceMetrics::Ensemble(mtm) {}
218 // Select the preferred predecessor for MBB.
219 const MachineBasicBlock*
220 MinInstrCountEnsemble::pickTracePred(const MachineBasicBlock *MBB) {
221 if (MBB->pred_empty())
223 const MachineLoop *CurLoop = getLoopFor(MBB);
224 // Don't leave loops, and never follow back-edges.
225 if (CurLoop && MBB == CurLoop->getHeader())
227 unsigned CurCount = MTM.getResources(MBB)->InstrCount;
228 const MachineBasicBlock *Best = 0;
229 unsigned BestDepth = 0;
230 for (MachineBasicBlock::const_pred_iterator
231 I = MBB->pred_begin(), E = MBB->pred_end(); I != E; ++I) {
232 const MachineBasicBlock *Pred = *I;
233 const MachineTraceMetrics::TraceBlockInfo *PredTBI =
234 getDepthResources(Pred);
235 assert(PredTBI && "Predecessor must be visited first");
236 // Pick the predecessor that would give this block the smallest InstrDepth.
237 unsigned Depth = PredTBI->InstrDepth + CurCount;
238 if (!Best || Depth < BestDepth)
239 Best = Pred, BestDepth = Depth;
244 // Select the preferred successor for MBB.
245 const MachineBasicBlock*
246 MinInstrCountEnsemble::pickTraceSucc(const MachineBasicBlock *MBB) {
247 if (MBB->pred_empty())
249 const MachineLoop *CurLoop = getLoopFor(MBB);
250 const MachineBasicBlock *Best = 0;
251 unsigned BestHeight = 0;
252 for (MachineBasicBlock::const_succ_iterator
253 I = MBB->succ_begin(), E = MBB->succ_end(); I != E; ++I) {
254 const MachineBasicBlock *Succ = *I;
255 // Don't consider back-edges.
256 if (CurLoop && Succ == CurLoop->getHeader())
258 // Don't consider successors exiting CurLoop.
259 if (isExitingLoop(CurLoop, getLoopFor(Succ)))
261 const MachineTraceMetrics::TraceBlockInfo *SuccTBI =
262 getHeightResources(Succ);
263 assert(SuccTBI && "Successor must be visited first");
264 // Pick the successor that would give this block the smallest InstrHeight.
265 unsigned Height = SuccTBI->InstrHeight;
266 if (!Best || Height < BestHeight)
267 Best = Succ, BestHeight = Height;
272 // Get an Ensemble sub-class for the requested trace strategy.
273 MachineTraceMetrics::Ensemble *
274 MachineTraceMetrics::getEnsemble(MachineTraceMetrics::Strategy strategy) {
275 assert(strategy < TS_NumStrategies && "Invalid trace strategy enum");
276 Ensemble *&E = Ensembles[strategy];
280 // Allocate new Ensemble on demand.
282 case TS_MinInstrCount: return (E = new MinInstrCountEnsemble(this));
283 default: llvm_unreachable("Invalid trace strategy enum");
287 void MachineTraceMetrics::invalidate(const MachineBasicBlock *MBB) {
288 DEBUG(dbgs() << "Invalidate traces through BB#" << MBB->getNumber() << '\n');
289 BlockInfo[MBB->getNumber()].invalidate();
290 for (unsigned i = 0; i != TS_NumStrategies; ++i)
292 Ensembles[i]->invalidate(MBB);
295 void MachineTraceMetrics::verifyAnalysis() const {
299 assert(BlockInfo.size() == MF->getNumBlockIDs() && "Outdated BlockInfo size");
300 for (unsigned i = 0; i != TS_NumStrategies; ++i)
302 Ensembles[i]->verify();
306 //===----------------------------------------------------------------------===//
308 //===----------------------------------------------------------------------===//
310 // Traces are built by two CFG traversals. To avoid recomputing too much, use a
311 // set abstraction that confines the search to the current loop, and doesn't
316 MutableArrayRef<MachineTraceMetrics::TraceBlockInfo> Blocks;
317 const MachineLoopInfo *Loops;
319 LoopBounds(MutableArrayRef<MachineTraceMetrics::TraceBlockInfo> blocks,
320 const MachineLoopInfo *loops)
321 : Blocks(blocks), Loops(loops), Downward(false) {}
325 // Specialize po_iterator_storage in order to prune the post-order traversal so
326 // it is limited to the current loop and doesn't traverse the loop back edges.
329 class po_iterator_storage<LoopBounds, true> {
332 po_iterator_storage(LoopBounds &lb) : LB(lb) {}
333 void finishPostorder(const MachineBasicBlock*) {}
335 bool insertEdge(const MachineBasicBlock *From, const MachineBasicBlock *To) {
336 // Skip already visited To blocks.
337 MachineTraceMetrics::TraceBlockInfo &TBI = LB.Blocks[To->getNumber()];
338 if (LB.Downward ? TBI.hasValidHeight() : TBI.hasValidDepth())
340 // From is null once when To is the trace center block.
343 const MachineLoop *FromLoop = LB.Loops->getLoopFor(From);
346 // Don't follow backedges, don't leave FromLoop when going upwards.
347 if ((LB.Downward ? To : From) == FromLoop->getHeader())
349 // Don't leave FromLoop.
350 if (isExitingLoop(FromLoop, LB.Loops->getLoopFor(To)))
352 // This is a new block. The PO traversal will compute height/depth
353 // resources, causing us to reject new edges to To. This only works because
354 // we reject back-edges, so the CFG is cycle-free.
360 /// Compute the trace through MBB.
361 void MachineTraceMetrics::Ensemble::computeTrace(const MachineBasicBlock *MBB) {
362 DEBUG(dbgs() << "Computing " << getName() << " trace through BB#"
363 << MBB->getNumber() << '\n');
364 // Set up loop bounds for the backwards post-order traversal.
365 LoopBounds Bounds(BlockInfo, MTM.Loops);
367 // Run an upwards post-order search for the trace start.
368 Bounds.Downward = false;
369 typedef ipo_ext_iterator<const MachineBasicBlock*, LoopBounds> UpwardPO;
370 for (UpwardPO I = ipo_ext_begin(MBB, Bounds), E = ipo_ext_end(MBB, Bounds);
372 DEBUG(dbgs() << " pred for BB#" << I->getNumber() << ": ");
373 TraceBlockInfo &TBI = BlockInfo[I->getNumber()];
374 // All the predecessors have been visited, pick the preferred one.
375 TBI.Pred = pickTracePred(*I);
378 dbgs() << "BB#" << TBI.Pred->getNumber() << '\n';
382 // The trace leading to I is now known, compute the depth resources.
383 computeDepthResources(*I);
386 // Run a downwards post-order search for the trace end.
387 Bounds.Downward = true;
388 typedef po_ext_iterator<const MachineBasicBlock*, LoopBounds> DownwardPO;
389 for (DownwardPO I = po_ext_begin(MBB, Bounds), E = po_ext_end(MBB, Bounds);
391 DEBUG(dbgs() << " succ for BB#" << I->getNumber() << ": ");
392 TraceBlockInfo &TBI = BlockInfo[I->getNumber()];
393 // All the successors have been visited, pick the preferred one.
394 TBI.Succ = pickTraceSucc(*I);
397 dbgs() << "BB#" << TBI.Succ->getNumber() << '\n';
401 // The trace leaving I is now known, compute the height resources.
402 computeHeightResources(*I);
406 /// Invalidate traces through BadMBB.
408 MachineTraceMetrics::Ensemble::invalidate(const MachineBasicBlock *BadMBB) {
409 SmallVector<const MachineBasicBlock*, 16> WorkList;
410 TraceBlockInfo &BadTBI = BlockInfo[BadMBB->getNumber()];
412 // Invalidate height resources of blocks above MBB.
413 if (BadTBI.hasValidHeight()) {
414 BadTBI.invalidateHeight();
415 WorkList.push_back(BadMBB);
417 const MachineBasicBlock *MBB = WorkList.pop_back_val();
418 DEBUG(dbgs() << "Invalidate BB#" << MBB->getNumber() << ' ' << getName()
420 // Find any MBB predecessors that have MBB as their preferred successor.
421 // They are the only ones that need to be invalidated.
422 for (MachineBasicBlock::const_pred_iterator
423 I = MBB->pred_begin(), E = MBB->pred_end(); I != E; ++I) {
424 TraceBlockInfo &TBI = BlockInfo[(*I)->getNumber()];
425 if (!TBI.hasValidHeight())
427 if (TBI.Succ == MBB) {
428 TBI.invalidateHeight();
429 WorkList.push_back(*I);
432 // Verify that TBI.Succ is actually a *I successor.
433 assert((!TBI.Succ || (*I)->isSuccessor(TBI.Succ)) && "CFG changed");
435 } while (!WorkList.empty());
438 // Invalidate depth resources of blocks below MBB.
439 if (BadTBI.hasValidDepth()) {
440 BadTBI.invalidateDepth();
441 WorkList.push_back(BadMBB);
443 const MachineBasicBlock *MBB = WorkList.pop_back_val();
444 DEBUG(dbgs() << "Invalidate BB#" << MBB->getNumber() << ' ' << getName()
446 // Find any MBB successors that have MBB as their preferred predecessor.
447 // They are the only ones that need to be invalidated.
448 for (MachineBasicBlock::const_succ_iterator
449 I = MBB->succ_begin(), E = MBB->succ_end(); I != E; ++I) {
450 TraceBlockInfo &TBI = BlockInfo[(*I)->getNumber()];
451 if (!TBI.hasValidDepth())
453 if (TBI.Pred == MBB) {
454 TBI.invalidateDepth();
455 WorkList.push_back(*I);
458 // Verify that TBI.Pred is actually a *I predecessor.
459 assert((!TBI.Pred || (*I)->isPredecessor(TBI.Pred)) && "CFG changed");
461 } while (!WorkList.empty());
464 // Clear any per-instruction data. We only have to do this for BadMBB itself
465 // because the instructions in that block may change. Other blocks may be
466 // invalidated, but their instructions will stay the same, so there is no
467 // need to erase the Cycle entries. They will be overwritten when we
469 for (MachineBasicBlock::const_iterator I = BadMBB->begin(), E = BadMBB->end();
474 void MachineTraceMetrics::Ensemble::verify() const {
476 assert(BlockInfo.size() == MTM.MF->getNumBlockIDs() &&
477 "Outdated BlockInfo size");
478 for (unsigned Num = 0, e = BlockInfo.size(); Num != e; ++Num) {
479 const TraceBlockInfo &TBI = BlockInfo[Num];
480 if (TBI.hasValidDepth() && TBI.Pred) {
481 const MachineBasicBlock *MBB = MTM.MF->getBlockNumbered(Num);
482 assert(MBB->isPredecessor(TBI.Pred) && "CFG doesn't match trace");
483 assert(BlockInfo[TBI.Pred->getNumber()].hasValidDepth() &&
484 "Trace is broken, depth should have been invalidated.");
485 const MachineLoop *Loop = getLoopFor(MBB);
486 assert(!(Loop && MBB == Loop->getHeader()) && "Trace contains backedge");
488 if (TBI.hasValidHeight() && TBI.Succ) {
489 const MachineBasicBlock *MBB = MTM.MF->getBlockNumbered(Num);
490 assert(MBB->isSuccessor(TBI.Succ) && "CFG doesn't match trace");
491 assert(BlockInfo[TBI.Succ->getNumber()].hasValidHeight() &&
492 "Trace is broken, height should have been invalidated.");
493 const MachineLoop *Loop = getLoopFor(MBB);
494 const MachineLoop *SuccLoop = getLoopFor(TBI.Succ);
495 assert(!(Loop && Loop == SuccLoop && TBI.Succ == Loop->getHeader()) &&
496 "Trace contains backedge");
502 //===----------------------------------------------------------------------===//
504 //===----------------------------------------------------------------------===//
506 // Compute the depth and height of each instruction based on data dependencies
507 // and instruction latencies. These cycle numbers assume that the CPU can issue
508 // an infinite number of instructions per cycle as long as their dependencies
511 // A data dependency is represented as a defining MI and operand numbers on the
512 // defining and using MI.
515 const MachineInstr *DefMI;
519 DataDep(const MachineInstr *DefMI, unsigned DefOp, unsigned UseOp)
520 : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {}
522 /// Create a DataDep from an SSA form virtual register.
523 DataDep(const MachineRegisterInfo *MRI, unsigned VirtReg, unsigned UseOp)
525 assert(TargetRegisterInfo::isVirtualRegister(VirtReg));
526 MachineRegisterInfo::def_iterator DefI = MRI->def_begin(VirtReg);
527 assert(!DefI.atEnd() && "Register has no defs");
529 DefOp = DefI.getOperandNo();
530 assert((++DefI).atEnd() && "Register has multiple defs");
535 // Get the input data dependencies that must be ready before UseMI can issue.
536 // Return true if UseMI has any physreg operands.
537 static bool getDataDeps(const MachineInstr *UseMI,
538 SmallVectorImpl<DataDep> &Deps,
539 const MachineRegisterInfo *MRI) {
540 bool HasPhysRegs = false;
541 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) {
544 unsigned Reg = MO->getReg();
547 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
551 // Collect virtual register reads.
553 Deps.push_back(DataDep(MRI, Reg, MO.getOperandNo()));
558 // Get the input data dependencies of a PHI instruction, using Pred as the
559 // preferred predecessor.
560 // This will add at most one dependency to Deps.
561 static void getPHIDeps(const MachineInstr *UseMI,
562 SmallVectorImpl<DataDep> &Deps,
563 const MachineBasicBlock *Pred,
564 const MachineRegisterInfo *MRI) {
565 // No predecessor at the beginning of a trace. Ignore dependencies.
568 assert(UseMI->isPHI() && UseMI->getNumOperands() % 2 && "Bad PHI");
569 for (unsigned i = 1; i != UseMI->getNumOperands(); i += 2) {
570 if (UseMI->getOperand(i + 1).getMBB() == Pred) {
571 unsigned Reg = UseMI->getOperand(i).getReg();
572 Deps.push_back(DataDep(MRI, Reg, i));
578 // Keep track of physreg data dependencies by recording each live register unit.
579 // Associate each regunit with an instruction operand. Depending on the
580 // direction instructions are scanned, it could be the operand that defined the
581 // regunit, or the highest operand to read the regunit.
586 const MachineInstr *MI;
589 unsigned getSparseSetIndex() const { return RegUnit; }
591 LiveRegUnit(unsigned RU) : RegUnit(RU), Cycle(0), MI(0), Op(0) {}
595 // Identify physreg dependencies for UseMI, and update the live regunit
596 // tracking set when scanning instructions downwards.
597 static void updatePhysDepsDownwards(const MachineInstr *UseMI,
598 SmallVectorImpl<DataDep> &Deps,
599 SparseSet<LiveRegUnit> &RegUnits,
600 const TargetRegisterInfo *TRI) {
601 SmallVector<unsigned, 8> Kills;
602 SmallVector<unsigned, 8> LiveDefOps;
604 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) {
607 unsigned Reg = MO->getReg();
608 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
610 // Track live defs and kills for updating RegUnits.
613 Kills.push_back(Reg);
615 LiveDefOps.push_back(MO.getOperandNo());
616 } else if (MO->isKill())
617 Kills.push_back(Reg);
618 // Identify dependencies.
621 for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) {
622 SparseSet<LiveRegUnit>::iterator I = RegUnits.find(*Units);
623 if (I == RegUnits.end())
625 Deps.push_back(DataDep(I->MI, I->Op, MO.getOperandNo()));
630 // Update RegUnits to reflect live registers after UseMI.
632 for (unsigned i = 0, e = Kills.size(); i != e; ++i)
633 for (MCRegUnitIterator Units(Kills[i], TRI); Units.isValid(); ++Units)
634 RegUnits.erase(*Units);
636 // Second, live defs.
637 for (unsigned i = 0, e = LiveDefOps.size(); i != e; ++i) {
638 unsigned DefOp = LiveDefOps[i];
639 for (MCRegUnitIterator Units(UseMI->getOperand(DefOp).getReg(), TRI);
640 Units.isValid(); ++Units) {
641 LiveRegUnit &LRU = RegUnits[*Units];
648 /// Compute instruction depths for all instructions above or in MBB in its
649 /// trace. This assumes that the trace through MBB has already been computed.
650 void MachineTraceMetrics::Ensemble::
651 computeInstrDepths(const MachineBasicBlock *MBB) {
652 // The top of the trace may already be computed, and HasValidInstrDepths
653 // implies Head->HasValidInstrDepths, so we only need to start from the first
654 // block in the trace that needs to be recomputed.
655 SmallVector<const MachineBasicBlock*, 8> Stack;
657 TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
658 assert(TBI.hasValidDepth() && "Incomplete trace");
659 if (TBI.HasValidInstrDepths)
661 Stack.push_back(MBB);
665 // FIXME: If MBB is non-null at this point, it is the last pre-computed block
666 // in the trace. We should track any live-out physregs that were defined in
667 // the trace. This is quite rare in SSA form, typically created by CSE
668 // hoisting a compare.
669 SparseSet<LiveRegUnit> RegUnits;
670 RegUnits.setUniverse(MTM.TRI->getNumRegUnits());
672 // Go through trace blocks in top-down order, stopping after the center block.
673 SmallVector<DataDep, 8> Deps;
674 while (!Stack.empty()) {
675 MBB = Stack.pop_back_val();
676 DEBUG(dbgs() << "Depths for BB#" << MBB->getNumber() << ":\n");
677 TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
678 TBI.HasValidInstrDepths = true;
679 for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end();
681 const MachineInstr *UseMI = I;
683 // Collect all data dependencies.
686 getPHIDeps(UseMI, Deps, TBI.Pred, MTM.MRI);
687 else if (getDataDeps(UseMI, Deps, MTM.MRI))
688 updatePhysDepsDownwards(UseMI, Deps, RegUnits, MTM.TRI);
690 // Filter and process dependencies, computing the earliest issue cycle.
692 for (unsigned i = 0, e = Deps.size(); i != e; ++i) {
693 const DataDep &Dep = Deps[i];
694 const TraceBlockInfo&DepTBI =
695 BlockInfo[Dep.DefMI->getParent()->getNumber()];
696 // Ignore dependencies from outside the current trace.
697 if (!DepTBI.hasValidDepth() || DepTBI.Head != TBI.Head)
699 assert(DepTBI.HasValidInstrDepths && "Inconsistent dependency");
700 unsigned DepCycle = Cycles.lookup(Dep.DefMI).Depth;
701 // Add latency if DefMI is a real instruction. Transients get latency 0.
702 if (!Dep.DefMI->isTransient())
703 DepCycle += MTM.TII->computeOperandLatency(MTM.ItinData,
704 Dep.DefMI, Dep.DefOp,
706 /* FindMin = */ false);
707 Cycle = std::max(Cycle, DepCycle);
709 // Remember the instruction depth.
710 Cycles[UseMI].Depth = Cycle;
711 DEBUG(dbgs() << Cycle << '\t' << *UseMI);
716 // Identify physreg dependencies for MI when scanning instructions upwards.
717 // Return the issue height of MI after considering any live regunits.
718 // Height is the issue height computed from virtual register dependencies alone.
719 static unsigned updatePhysDepsUpwards(const MachineInstr *MI, unsigned Height,
720 SparseSet<LiveRegUnit> &RegUnits,
721 const InstrItineraryData *ItinData,
722 const TargetInstrInfo *TII,
723 const TargetRegisterInfo *TRI) {
724 SmallVector<unsigned, 8> ReadOps;
725 for (ConstMIOperands MO(MI); MO.isValid(); ++MO) {
728 unsigned Reg = MO->getReg();
729 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
732 ReadOps.push_back(MO.getOperandNo());
735 // This is a def of Reg. Remove corresponding entries from RegUnits, and
736 // update MI Height to consider the physreg dependencies.
737 for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) {
738 SparseSet<LiveRegUnit>::iterator I = RegUnits.find(*Units);
739 if (I == RegUnits.end())
741 unsigned DepHeight = I->Cycle;
742 if (!MI->isTransient()) {
743 // We may not know the UseMI of this dependency, if it came from the
746 DepHeight += TII->computeOperandLatency(ItinData,
747 MI, MO.getOperandNo(),
750 // No UseMI. Just use the MI latency instead.
751 DepHeight += TII->getInstrLatency(ItinData, MI);
753 Height = std::max(Height, DepHeight);
754 // This regunit is dead above MI.
759 // Now we know the height of MI. Update any regunits read.
760 for (unsigned i = 0, e = ReadOps.size(); i != e; ++i) {
761 unsigned Reg = MI->getOperand(ReadOps[i]).getReg();
762 for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) {
763 LiveRegUnit &LRU = RegUnits[*Units];
764 // Set the height to the highest reader of the unit.
765 if (LRU.Cycle <= Height && LRU.MI != MI) {
777 typedef DenseMap<const MachineInstr *, unsigned> MIHeightMap;
779 // Push the height of DefMI upwards if required to match UseMI.
780 // Return true if this is the first time DefMI was seen.
781 static bool pushDepHeight(const DataDep &Dep,
782 const MachineInstr *UseMI, unsigned UseHeight,
783 MIHeightMap &Heights,
784 const InstrItineraryData *ItinData,
785 const TargetInstrInfo *TII) {
786 // Adjust height by Dep.DefMI latency.
787 if (!Dep.DefMI->isTransient())
788 UseHeight += TII->computeOperandLatency(ItinData, Dep.DefMI, Dep.DefOp,
791 // Update Heights[DefMI] to be the maximum height seen.
792 MIHeightMap::iterator I;
794 tie(I, New) = Heights.insert(std::make_pair(Dep.DefMI, UseHeight));
798 // DefMI has been pushed before. Give it the max height.
799 if (I->second < UseHeight)
800 I->second = UseHeight;
804 /// Assuming that DefMI was used by Trace.back(), add it to the live-in lists
805 /// of all the blocks in Trace. Stop when reaching the block that contains
807 void MachineTraceMetrics::Ensemble::
808 addLiveIns(const MachineInstr *DefMI,
809 ArrayRef<const MachineBasicBlock*> Trace) {
810 assert(!Trace.empty() && "Trace should contain at least one block");
811 unsigned Reg = DefMI->getOperand(0).getReg();
812 assert(TargetRegisterInfo::isVirtualRegister(Reg));
813 const MachineBasicBlock *DefMBB = DefMI->getParent();
815 // Reg is live-in to all blocks in Trace that follow DefMBB.
816 for (unsigned i = Trace.size(); i; --i) {
817 const MachineBasicBlock *MBB = Trace[i-1];
820 TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
821 // Just add the register. The height will be updated later.
822 TBI.LiveIns.push_back(Reg);
826 /// Compute instruction heights in the trace through MBB. This updates MBB and
827 /// the blocks below it in the trace. It is assumed that the trace has already
829 void MachineTraceMetrics::Ensemble::
830 computeInstrHeights(const MachineBasicBlock *MBB) {
831 // The bottom of the trace may already be computed.
832 // Find the blocks that need updating.
833 SmallVector<const MachineBasicBlock*, 8> Stack;
835 TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
836 assert(TBI.hasValidHeight() && "Incomplete trace");
837 if (TBI.HasValidInstrHeights)
839 Stack.push_back(MBB);
844 // As we move upwards in the trace, keep track of instructions that are
845 // required by deeper trace instructions. Map MI -> height required so far.
848 // For physregs, the def isn't known when we see the use.
849 // Instead, keep track of the highest use of each regunit.
850 SparseSet<LiveRegUnit> RegUnits;
851 RegUnits.setUniverse(MTM.TRI->getNumRegUnits());
853 // If the bottom of the trace was already precomputed, initialize heights
854 // from its live-in list.
855 // MBB is the highest precomputed block in the trace.
857 TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
858 for (unsigned i = 0, e = TBI.LiveIns.size(); i != e; ++i) {
859 LiveInReg LI = TBI.LiveIns[i];
860 if (TargetRegisterInfo::isVirtualRegister(LI.Reg)) {
861 // For virtual registers, the def latency is included.
862 unsigned &Height = Heights[MTM.MRI->getVRegDef(LI.Reg)];
863 if (Height < LI.Height)
866 // For register units, the def latency is not included because we don't
868 RegUnits[LI.Reg].Cycle = LI.Height;
873 // Go through the trace blocks in bottom-up order.
874 SmallVector<DataDep, 8> Deps;
875 for (;!Stack.empty(); Stack.pop_back()) {
877 DEBUG(dbgs() << "Heights for BB#" << MBB->getNumber() << ":\n");
878 TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
879 TBI.HasValidInstrHeights = true;
881 // Get dependencies from PHIs in the trace successor.
883 for (MachineBasicBlock::const_iterator
884 I = TBI.Succ->begin(), E = TBI.Succ->end();
885 I != E && !I->isPHI(); ++I) {
886 const MachineInstr *PHI = I;
888 getPHIDeps(PHI, Deps, MBB, MTM.MRI);
890 if (pushDepHeight(Deps.front(), PHI, Cycles.lookup(PHI).Height,
891 Heights, MTM.ItinData, MTM.TII))
892 addLiveIns(Deps.front().DefMI, Stack);
896 // Go through the block backwards.
897 for (MachineBasicBlock::const_iterator BI = MBB->end(), BB = MBB->begin();
899 const MachineInstr *MI = --BI;
901 // Find the MI height as determined by virtual register uses in the
904 MIHeightMap::iterator HeightI = Heights.find(MI);
905 if (HeightI != Heights.end()) {
906 Cycle = HeightI->second;
907 // We won't be seeing any more MI uses.
908 Heights.erase(HeightI);
911 // Don't process PHI deps. They depend on the specific predecessor, and
912 // we'll get them when visiting the predecessor.
914 bool HasPhysRegs = !MI->isPHI() && getDataDeps(MI, Deps, MTM.MRI);
916 // There may also be regunit dependencies to include in the height.
918 Cycle = updatePhysDepsUpwards(MI, Cycle, RegUnits,
919 MTM.ItinData, MTM.TII, MTM.TRI);
921 DEBUG(dbgs() << Cycle << '\t' << *MI);
922 Cycles[MI].Height = Cycle;
924 // Update the required height of any virtual registers read by MI.
925 for (unsigned i = 0, e = Deps.size(); i != e; ++i)
926 if (pushDepHeight(Deps[i], MI, Cycle, Heights, MTM.ItinData, MTM.TII))
927 addLiveIns(Deps[i].DefMI, Stack);
930 // Update virtual live-in heights. They were added by addLiveIns() with a 0
931 // height because the final height isn't known until now.
932 DEBUG(dbgs() << "BB#" << MBB->getNumber() << " Live-ins:");
933 for (unsigned i = 0, e = TBI.LiveIns.size(); i != e; ++i) {
934 LiveInReg &LIR = TBI.LiveIns[i];
935 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
936 LIR.Height = Heights.lookup(DefMI);
937 DEBUG(dbgs() << ' ' << PrintReg(LIR.Reg) << '@' << LIR.Height);
940 // Transfer the live regunits to the live-in list.
941 for (SparseSet<LiveRegUnit>::const_iterator
942 RI = RegUnits.begin(), RE = RegUnits.end(); RI != RE; ++RI) {
943 TBI.LiveIns.push_back(LiveInReg(RI->RegUnit, RI->Cycle));
944 DEBUG(dbgs() << ' ' << PrintRegUnit(RI->RegUnit, MTM.TRI)
945 << '@' << RI->Cycle);
947 DEBUG(dbgs() << '\n');
951 MachineTraceMetrics::Trace
952 MachineTraceMetrics::Ensemble::getTrace(const MachineBasicBlock *MBB) {
953 // FIXME: Check cache tags, recompute as needed.
955 computeInstrDepths(MBB);
956 computeInstrHeights(MBB);
957 return Trace(*this, BlockInfo[MBB->getNumber()]);
960 void MachineTraceMetrics::Ensemble::print(raw_ostream &OS) const {
961 OS << getName() << " ensemble:\n";
962 for (unsigned i = 0, e = BlockInfo.size(); i != e; ++i) {
963 OS << " BB#" << i << '\t';
964 BlockInfo[i].print(OS);
969 void MachineTraceMetrics::TraceBlockInfo::print(raw_ostream &OS) const {
970 if (hasValidDepth()) {
971 OS << "depth=" << InstrDepth;
973 OS << " pred=BB#" << Pred->getNumber();
976 OS << " head=BB#" << Head;
977 if (HasValidInstrDepths)
980 OS << "depth invalid";
982 if (hasValidHeight()) {
983 OS << "height=" << InstrHeight;
985 OS << " succ=BB#" << Succ->getNumber();
988 OS << " tail=BB#" << Tail;
989 if (HasValidInstrHeights)
992 OS << "height invalid";
995 void MachineTraceMetrics::Trace::print(raw_ostream &OS) const {
996 unsigned MBBNum = &TBI - &TE.BlockInfo[0];
998 OS << TE.getName() << " trace BB#" << TBI.Head << " --> BB#" << MBBNum
999 << " --> BB#" << TBI.Tail << ':';
1000 if (TBI.hasValidHeight() && TBI.hasValidDepth())
1001 OS << ' ' << getInstrCount() << " instrs.";
1003 const MachineTraceMetrics::TraceBlockInfo *Block = &TBI;
1004 OS << "\nBB#" << MBBNum;
1005 while (Block->hasValidDepth() && Block->Pred) {
1006 unsigned Num = Block->Pred->getNumber();
1007 OS << " <- BB#" << Num;
1008 Block = &TE.BlockInfo[Num];
1013 while (Block->hasValidHeight() && Block->Succ) {
1014 unsigned Num = Block->Succ->getNumber();
1015 OS << " -> BB#" << Num;
1016 Block = &TE.BlockInfo[Num];