1 //===-- MachineInstr.cpp --------------------------------------------------===//
3 //===----------------------------------------------------------------------===//
5 #include "llvm/CodeGen/MachineInstr.h"
6 #include "llvm/Value.h"
7 #include "llvm/Target/MachineInstrInfo.h" // FIXME: shouldn't need this!
11 // Constructor for instructions with fixed #operands (nearly all)
12 MachineInstr::MachineInstr(MachineOpCode _opCode,
13 OpCodeMask _opCodeMask)
14 : opCode(_opCode), opCodeMask(_opCodeMask),
15 operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()) {
16 assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
19 // Constructor for instructions with variable #operands
20 MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands,
21 OpCodeMask OpCodeMask)
22 : opCode(OpCode), opCodeMask(OpCodeMask),
23 operands(numOperands, MachineOperand()) {
26 // OperandComplete - Return true if it's illegal to add a new operand
27 bool MachineInstr::OperandsComplete() const {
28 int NumOperands = TargetInstrDescriptors[opCode].numOperands;
29 if (NumOperands >= 0 && operands.size() >= (unsigned)NumOperands)
30 return true; // Broken!
36 // Support for replacing opcode and operands of a MachineInstr in place.
37 // This only resets the size of the operand vector and initializes it.
38 // The new operands must be set explicitly later.
40 void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands,
45 operands.resize(numOperands, MachineOperand());
49 MachineInstr::SetMachineOperandVal(unsigned i,
50 MachineOperand::MachineOperandType opType,
55 assert(i < operands.size());
56 operands[i].opType = opType;
57 operands[i].value = V;
58 operands[i].regNum = -1;
59 operands[i].flags = 0;
61 if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
62 operands[i].markDef();
64 operands[i].markDefAndUse();
68 MachineInstr::SetMachineOperandConst(unsigned i,
69 MachineOperand::MachineOperandType operandType,
72 assert(i < operands.size());
73 assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
74 "immed. constant cannot be defined");
76 operands[i].opType = operandType;
77 operands[i].value = NULL;
78 operands[i].immedVal = intValue;
79 operands[i].regNum = -1;
80 operands[i].flags = 0;
84 MachineInstr::SetMachineOperandReg(unsigned i,
87 assert(i < operands.size());
89 operands[i].opType = MachineOperand::MO_MachineRegister;
90 operands[i].value = NULL;
91 operands[i].regNum = regNum;
92 operands[i].flags = 0;
94 if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
95 operands[i].markDef();
96 insertUsedReg(regNum);
100 MachineInstr::SetRegForOperand(unsigned i, int regNum)
102 operands[i].setRegForValue(regNum);
103 insertUsedReg(regNum);
107 // Subsitute all occurrences of Value* oldVal with newVal in all operands
108 // and all implicit refs. If defsOnly == true, substitute defs only.
110 MachineInstr::substituteValue(const Value* oldVal, Value* newVal, bool defsOnly)
112 unsigned numSubst = 0;
114 // Subsitute operands
115 for (MachineInstr::val_op_iterator O = begin(), E = end(); O != E; ++O)
117 if (!defsOnly || O.isDef())
119 O.getMachineOperand().value = newVal;
123 // Subsitute implicit refs
124 for (unsigned i=0, N=implicitRefs.size(); i < N; ++i)
125 if (getImplicitRef(i) == oldVal)
126 if (!defsOnly || implicitRefIsDefined(i))
128 implicitRefs[i].Val = newVal;
137 MachineInstr::dump() const
139 cerr << " " << *this;
142 static inline std::ostream&
143 OutputValue(std::ostream &os, const Value* val)
146 if (val && val->hasName())
147 return os << val->getName() << ")";
149 return os << (void*) val << ")"; // print address only
152 static inline std::ostream&
153 OutputReg(std::ostream &os, unsigned int regNum)
155 return os << "%mreg(" << regNum << ")";
158 std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
160 os << TargetInstrDescriptors[minstr.opCode].opCodeString;
162 for (unsigned i=0, N=minstr.getNumOperands(); i < N; i++) {
163 os << "\t" << minstr.getOperand(i);
164 if( minstr.operandIsDefined(i) )
166 if( minstr.operandIsDefinedAndUsed(i) )
170 // code for printing implict references
171 unsigned NumOfImpRefs = minstr.getNumImplicitRefs();
172 if( NumOfImpRefs > 0 ) {
173 os << "\tImplicit: ";
174 for(unsigned z=0; z < NumOfImpRefs; z++) {
175 OutputValue(os, minstr.getImplicitRef(z));
176 if( minstr.implicitRefIsDefined(z)) os << "*";
177 if( minstr.implicitRefIsDefinedAndUsed(z)) os << "*";
185 std::ostream &operator<<(std::ostream &os, const MachineOperand &mop)
187 if (mop.opHiBits32())
189 else if (mop.opLoBits32())
191 else if (mop.opHiBits64())
193 else if (mop.opLoBits64())
198 case MachineOperand::MO_VirtualRegister:
200 OutputValue(os, mop.getVRegValue());
201 if (mop.hasAllocatedReg())
202 os << "==" << OutputReg(os, mop.getAllocatedRegNum());
204 case MachineOperand::MO_CCRegister:
206 OutputValue(os, mop.getVRegValue());
207 if (mop.hasAllocatedReg())
208 os << "==" << OutputReg(os, mop.getAllocatedRegNum());
210 case MachineOperand::MO_MachineRegister:
211 OutputReg(os, mop.getMachineRegNum());
213 case MachineOperand::MO_SignExtendedImmed:
214 os << (long)mop.immedVal;
216 case MachineOperand::MO_UnextendedImmed:
217 os << (long)mop.immedVal;
219 case MachineOperand::MO_PCRelativeDisp:
221 const Value* opVal = mop.getVRegValue();
222 bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
223 os << "%disp(" << (isLabel? "label " : "addr-of-val ");
224 if (opVal->hasName())
225 os << opVal->getName();
227 os << (const void*) opVal;
232 assert(0 && "Unrecognized operand type");
237 (MachineOperand::HIFLAG32 | MachineOperand::LOFLAG32 |
238 MachineOperand::HIFLAG64 | MachineOperand::LOFLAG64))