1 //===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Collect the sequence of machine instructions for a basic block.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/MachineBasicBlock.h"
15 #include "llvm/ADT/SmallPtrSet.h"
16 #include "llvm/ADT/SmallString.h"
17 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
18 #include "llvm/CodeGen/LiveVariables.h"
19 #include "llvm/CodeGen/MachineDominators.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineLoopInfo.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/CodeGen/SlotIndexes.h"
25 #include "llvm/IR/BasicBlock.h"
26 #include "llvm/IR/DataLayout.h"
27 #include "llvm/IR/ModuleSlotTracker.h"
28 #include "llvm/MC/MCAsmInfo.h"
29 #include "llvm/MC/MCContext.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/raw_ostream.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetMachine.h"
34 #include "llvm/Target/TargetRegisterInfo.h"
35 #include "llvm/Target/TargetSubtargetInfo.h"
39 #define DEBUG_TYPE "codegen"
41 MachineBasicBlock::MachineBasicBlock(MachineFunction &MF, const BasicBlock *B)
42 : BB(B), Number(-1), xParent(&MF) {
46 MachineBasicBlock::~MachineBasicBlock() {
49 /// Return the MCSymbol for this basic block.
50 MCSymbol *MachineBasicBlock::getSymbol() const {
51 if (!CachedMCSymbol) {
52 const MachineFunction *MF = getParent();
53 MCContext &Ctx = MF->getContext();
54 const char *Prefix = Ctx.getAsmInfo()->getPrivateLabelPrefix();
55 assert(getNumber() >= 0 && "cannot get label for unreachable MBB");
56 CachedMCSymbol = Ctx.getOrCreateSymbol(Twine(Prefix) + "BB" +
57 Twine(MF->getFunctionNumber()) +
58 "_" + Twine(getNumber()));
61 return CachedMCSymbol;
65 raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) {
70 /// When an MBB is added to an MF, we need to update the parent pointer of the
71 /// MBB, the MBB numbering, and any instructions in the MBB to be on the right
72 /// operand list for registers.
74 /// MBBs start out as #-1. When a MBB is added to a MachineFunction, it
75 /// gets the next available unique MBB number. If it is removed from a
76 /// MachineFunction, it goes back to being #-1.
77 void ilist_traits<MachineBasicBlock>::addNodeToList(MachineBasicBlock *N) {
78 MachineFunction &MF = *N->getParent();
79 N->Number = MF.addToMBBNumbering(N);
81 // Make sure the instructions have their operands in the reginfo lists.
82 MachineRegisterInfo &RegInfo = MF.getRegInfo();
83 for (MachineBasicBlock::instr_iterator
84 I = N->instr_begin(), E = N->instr_end(); I != E; ++I)
85 I->AddRegOperandsToUseLists(RegInfo);
88 void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock *N) {
89 N->getParent()->removeFromMBBNumbering(N->Number);
93 /// When we add an instruction to a basic block list, we update its parent
94 /// pointer and add its operands from reg use/def lists if appropriate.
95 void ilist_traits<MachineInstr>::addNodeToList(MachineInstr *N) {
96 assert(!N->getParent() && "machine instruction already in a basic block");
99 // Add the instruction's register operands to their corresponding
101 MachineFunction *MF = Parent->getParent();
102 N->AddRegOperandsToUseLists(MF->getRegInfo());
105 /// When we remove an instruction from a basic block list, we update its parent
106 /// pointer and remove its operands from reg use/def lists if appropriate.
107 void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr *N) {
108 assert(N->getParent() && "machine instruction not in a basic block");
110 // Remove from the use/def lists.
111 if (MachineFunction *MF = N->getParent()->getParent())
112 N->RemoveRegOperandsFromUseLists(MF->getRegInfo());
114 N->setParent(nullptr);
117 /// When moving a range of instructions from one MBB list to another, we need to
118 /// update the parent pointers and the use/def lists.
119 void ilist_traits<MachineInstr>::
120 transferNodesFromList(ilist_traits<MachineInstr> &FromList,
121 ilist_iterator<MachineInstr> First,
122 ilist_iterator<MachineInstr> Last) {
123 assert(Parent->getParent() == FromList.Parent->getParent() &&
124 "MachineInstr parent mismatch!");
126 // Splice within the same MBB -> no change.
127 if (Parent == FromList.Parent) return;
129 // If splicing between two blocks within the same function, just update the
131 for (; First != Last; ++First)
132 First->setParent(Parent);
135 void ilist_traits<MachineInstr>::deleteNode(MachineInstr* MI) {
136 assert(!MI->getParent() && "MI is still in a block!");
137 Parent->getParent()->DeleteMachineInstr(MI);
140 MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() {
141 instr_iterator I = instr_begin(), E = instr_end();
142 while (I != E && I->isPHI())
144 assert((I == E || !I->isInsideBundle()) &&
145 "First non-phi MI cannot be inside a bundle!");
149 MachineBasicBlock::iterator
150 MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) {
152 while (I != E && (I->isPHI() || I->isPosition() || I->isDebugValue()))
154 // FIXME: This needs to change if we wish to bundle labels / dbg_values
155 // inside the bundle.
156 assert((I == E || !I->isInsideBundle()) &&
157 "First non-phi / non-label instruction is inside a bundle!");
161 MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() {
162 iterator B = begin(), E = end(), I = E;
163 while (I != B && ((--I)->isTerminator() || I->isDebugValue()))
165 while (I != E && !I->isTerminator())
170 MachineBasicBlock::instr_iterator MachineBasicBlock::getFirstInstrTerminator() {
171 instr_iterator B = instr_begin(), E = instr_end(), I = E;
172 while (I != B && ((--I)->isTerminator() || I->isDebugValue()))
174 while (I != E && !I->isTerminator())
179 MachineBasicBlock::iterator MachineBasicBlock::getFirstNonDebugInstr() {
180 // Skip over begin-of-block dbg_value instructions.
181 iterator I = begin(), E = end();
182 while (I != E && I->isDebugValue())
187 MachineBasicBlock::iterator MachineBasicBlock::getLastNonDebugInstr() {
188 // Skip over end-of-block dbg_value instructions.
189 instr_iterator B = instr_begin(), I = instr_end();
192 // Return instruction that starts a bundle.
193 if (I->isDebugValue() || I->isInsideBundle())
197 // The block is all debug values.
201 const MachineBasicBlock *MachineBasicBlock::getLandingPadSuccessor() const {
202 // A block with a landing pad successor only has one other successor.
205 for (const_succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I)
211 bool MachineBasicBlock::hasEHPadSuccessor() const {
212 for (const_succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I)
218 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
219 void MachineBasicBlock::dump() const {
224 StringRef MachineBasicBlock::getName() const {
225 if (const BasicBlock *LBB = getBasicBlock())
226 return LBB->getName();
231 /// Return a hopefully unique identifier for this block.
232 std::string MachineBasicBlock::getFullName() const {
235 Name = (getParent()->getName() + ":").str();
237 Name += getBasicBlock()->getName();
239 Name += ("BB" + Twine(getNumber())).str();
243 void MachineBasicBlock::print(raw_ostream &OS, SlotIndexes *Indexes) const {
244 const MachineFunction *MF = getParent();
246 OS << "Can't print out MachineBasicBlock because parent MachineFunction"
250 const Function *F = MF->getFunction();
251 const Module *M = F ? F->getParent() : nullptr;
252 ModuleSlotTracker MST(M);
253 print(OS, MST, Indexes);
256 void MachineBasicBlock::print(raw_ostream &OS, ModuleSlotTracker &MST,
257 SlotIndexes *Indexes) const {
258 const MachineFunction *MF = getParent();
260 OS << "Can't print out MachineBasicBlock because parent MachineFunction"
266 OS << Indexes->getMBBStartIdx(this) << '\t';
268 OS << "BB#" << getNumber() << ": ";
270 const char *Comma = "";
271 if (const BasicBlock *LBB = getBasicBlock()) {
272 OS << Comma << "derived from LLVM BB ";
273 LBB->printAsOperand(OS, /*PrintType=*/false, MST);
276 if (isEHPad()) { OS << Comma << "EH LANDING PAD"; Comma = ", "; }
277 if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma = ", "; }
279 OS << Comma << "Align " << Alignment << " (" << (1u << Alignment)
284 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
285 if (!livein_empty()) {
286 if (Indexes) OS << '\t';
288 for (const auto &LI : make_range(livein_begin(), livein_end())) {
289 OS << ' ' << PrintReg(LI.PhysReg, TRI);
290 if (LI.LaneMask != ~0u)
291 OS << ':' << PrintLaneMask(LI.LaneMask);
295 // Print the preds of this block according to the CFG.
297 if (Indexes) OS << '\t';
298 OS << " Predecessors according to CFG:";
299 for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI)
300 OS << " BB#" << (*PI)->getNumber();
304 for (const_instr_iterator I = instr_begin(); I != instr_end(); ++I) {
306 if (Indexes->hasIndex(&*I))
307 OS << Indexes->getInstructionIndex(&*I);
311 if (I->isInsideBundle())
316 // Print the successors of this block according to the CFG.
318 if (Indexes) OS << '\t';
319 OS << " Successors according to CFG:";
320 for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI) {
321 OS << " BB#" << (*SI)->getNumber();
322 if (!Weights.empty())
323 OS << '(' << *getWeightIterator(SI) << ')';
329 void MachineBasicBlock::printAsOperand(raw_ostream &OS,
330 bool /*PrintType*/) const {
331 OS << "BB#" << getNumber();
334 void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) {
335 LiveInVector::iterator I = std::find_if(
336 LiveIns.begin(), LiveIns.end(),
337 [Reg] (const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
338 if (I == LiveIns.end())
341 I->LaneMask &= ~LaneMask;
342 if (I->LaneMask == 0)
346 bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const {
347 livein_iterator I = std::find_if(
348 LiveIns.begin(), LiveIns.end(),
349 [Reg] (const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
350 return I != livein_end() && (I->LaneMask & LaneMask) != 0;
353 void MachineBasicBlock::sortUniqueLiveIns() {
354 std::sort(LiveIns.begin(), LiveIns.end(),
355 [](const RegisterMaskPair &LI0, const RegisterMaskPair &LI1) {
356 return LI0.PhysReg < LI1.PhysReg;
358 // Liveins are sorted by physreg now we can merge their lanemasks.
359 LiveInVector::const_iterator I = LiveIns.begin();
360 LiveInVector::const_iterator J;
361 LiveInVector::iterator Out = LiveIns.begin();
362 for (; I != LiveIns.end(); ++Out, I = J) {
363 unsigned PhysReg = I->PhysReg;
364 LaneBitmask LaneMask = I->LaneMask;
365 for (J = std::next(I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J)
366 LaneMask |= J->LaneMask;
367 Out->PhysReg = PhysReg;
368 Out->LaneMask = LaneMask;
370 LiveIns.erase(Out, LiveIns.end());
374 MachineBasicBlock::addLiveIn(MCPhysReg PhysReg, const TargetRegisterClass *RC) {
375 assert(getParent() && "MBB must be inserted in function");
376 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg) && "Expected physreg");
377 assert(RC && "Register class is required");
378 assert((isEHPad() || this == &getParent()->front()) &&
379 "Only the entry block and landing pads can have physreg live ins");
381 bool LiveIn = isLiveIn(PhysReg);
382 iterator I = SkipPHIsAndLabels(begin()), E = end();
383 MachineRegisterInfo &MRI = getParent()->getRegInfo();
384 const TargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo();
386 // Look for an existing copy.
388 for (;I != E && I->isCopy(); ++I)
389 if (I->getOperand(1).getReg() == PhysReg) {
390 unsigned VirtReg = I->getOperand(0).getReg();
391 if (!MRI.constrainRegClass(VirtReg, RC))
392 llvm_unreachable("Incompatible live-in register class.");
396 // No luck, create a virtual register.
397 unsigned VirtReg = MRI.createVirtualRegister(RC);
398 BuildMI(*this, I, DebugLoc(), TII.get(TargetOpcode::COPY), VirtReg)
399 .addReg(PhysReg, RegState::Kill);
405 void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) {
406 getParent()->splice(NewAfter->getIterator(), getIterator());
409 void MachineBasicBlock::moveAfter(MachineBasicBlock *NewBefore) {
410 getParent()->splice(++NewBefore->getIterator(), getIterator());
413 void MachineBasicBlock::updateTerminator() {
414 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
415 // A block with no successors has no concerns with fall-through edges.
416 if (this->succ_empty()) return;
418 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
419 SmallVector<MachineOperand, 4> Cond;
420 DebugLoc DL; // FIXME: this is nowhere
421 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
423 assert(!B && "UpdateTerminators requires analyzable predecessors!");
426 // The block has an unconditional branch. If its successor is now
427 // its layout successor, delete the branch.
428 if (isLayoutSuccessor(TBB))
429 TII->RemoveBranch(*this);
431 // The block has an unconditional fallthrough. If its successor is not
432 // its layout successor, insert a branch. First we have to locate the
433 // only non-landing-pad successor, as that is the fallthrough block.
434 for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) {
435 if ((*SI)->isEHPad())
437 assert(!TBB && "Found more than one non-landing-pad successor!");
441 // If there is no non-landing-pad successor, the block has no
442 // fall-through edges to be concerned with.
446 // Finally update the unconditional successor to be reached via a branch
447 // if it would not be reached by fallthrough.
448 if (!isLayoutSuccessor(TBB))
449 TII->InsertBranch(*this, TBB, nullptr, Cond, DL);
453 // The block has a non-fallthrough conditional branch. If one of its
454 // successors is its layout successor, rewrite it to a fallthrough
455 // conditional branch.
456 if (isLayoutSuccessor(TBB)) {
457 if (TII->ReverseBranchCondition(Cond))
459 TII->RemoveBranch(*this);
460 TII->InsertBranch(*this, FBB, nullptr, Cond, DL);
461 } else if (isLayoutSuccessor(FBB)) {
462 TII->RemoveBranch(*this);
463 TII->InsertBranch(*this, TBB, nullptr, Cond, DL);
466 // Walk through the successors and find the successor which is not
467 // a landing pad and is not the conditional branch destination (in TBB)
468 // as the fallthrough successor.
469 MachineBasicBlock *FallthroughBB = nullptr;
470 for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) {
471 if ((*SI)->isEHPad() || *SI == TBB)
473 assert(!FallthroughBB && "Found more than one fallthrough successor.");
476 if (!FallthroughBB && canFallThrough()) {
477 // We fallthrough to the same basic block as the conditional jump
478 // targets. Remove the conditional jump, leaving unconditional
480 // FIXME: This does not seem like a reasonable pattern to support, but
481 // it has been seen in the wild coming out of degenerate ARM test cases.
482 TII->RemoveBranch(*this);
484 // Finally update the unconditional successor to be reached via a branch
485 // if it would not be reached by fallthrough.
486 if (!isLayoutSuccessor(TBB))
487 TII->InsertBranch(*this, TBB, nullptr, Cond, DL);
491 // The block has a fallthrough conditional branch.
492 if (isLayoutSuccessor(TBB)) {
493 if (TII->ReverseBranchCondition(Cond)) {
494 // We can't reverse the condition, add an unconditional branch.
496 TII->InsertBranch(*this, FallthroughBB, nullptr, Cond, DL);
499 TII->RemoveBranch(*this);
500 TII->InsertBranch(*this, FallthroughBB, nullptr, Cond, DL);
501 } else if (!isLayoutSuccessor(FallthroughBB)) {
502 TII->RemoveBranch(*this);
503 TII->InsertBranch(*this, TBB, FallthroughBB, Cond, DL);
509 void MachineBasicBlock::addSuccessor(MachineBasicBlock *Succ, uint32_t Weight) {
510 // Weight list is either empty (if successor list isn't empty, this means
511 // disabled optimization) or has the same size as successor list.
512 if (!(Weights.empty() && !Successors.empty()))
513 Weights.push_back(Weight);
514 Successors.push_back(Succ);
515 Succ->addPredecessor(this);
518 void MachineBasicBlock::addSuccessorWithoutWeight(MachineBasicBlock *Succ) {
519 // We need to make sure weight list is either empty or has the same size of
520 // successor list. When this function is called, we can safely delete all
521 // weight in the list.
523 Successors.push_back(Succ);
524 Succ->addPredecessor(this);
527 void MachineBasicBlock::addSuccessor(MachineBasicBlock *Succ,
528 BranchProbability Prob) {
529 // Probability list is either empty (if successor list isn't empty, this means
530 // disabled optimization) or has the same size as successor list.
531 if (!(Probs.empty() && !Successors.empty()))
532 Probs.push_back(Prob);
533 Successors.push_back(Succ);
534 Succ->addPredecessor(this);
537 void MachineBasicBlock::addSuccessorWithoutProb(MachineBasicBlock *Succ) {
538 // We need to make sure probability list is either empty or has the same size
539 // of successor list. When this function is called, we can safely delete all
540 // probability in the list.
542 Successors.push_back(Succ);
543 Succ->addPredecessor(this);
546 void MachineBasicBlock::removeSuccessor(MachineBasicBlock *Succ) {
547 succ_iterator I = std::find(Successors.begin(), Successors.end(), Succ);
551 MachineBasicBlock::succ_iterator
552 MachineBasicBlock::removeSuccessor(succ_iterator I) {
553 assert(I != Successors.end() && "Not a current successor!");
555 // If Weight list is empty it means we don't use it (disabled optimization).
556 if (!Weights.empty()) {
557 weight_iterator WI = getWeightIterator(I);
561 // If probability list is empty it means we don't use it (disabled
563 if (!Probs.empty()) {
564 probability_iterator WI = getProbabilityIterator(I);
568 (*I)->removePredecessor(this);
569 return Successors.erase(I);
572 void MachineBasicBlock::replaceSuccessor(MachineBasicBlock *Old,
573 MachineBasicBlock *New) {
577 succ_iterator E = succ_end();
578 succ_iterator NewI = E;
579 succ_iterator OldI = E;
580 for (succ_iterator I = succ_begin(); I != E; ++I) {
592 assert(OldI != E && "Old is not a successor of this block");
594 // If New isn't already a successor, let it take Old's place.
596 Old->removePredecessor(this);
597 New->addPredecessor(this);
602 // New is already a successor.
603 // Update its weight instead of adding a duplicate edge.
604 if (!Weights.empty())
605 *getWeightIterator(NewI) += *getWeightIterator(OldI);
606 // Update its probability instead of adding a duplicate edge.
608 *getProbabilityIterator(NewI) += *getProbabilityIterator(OldI);
610 removeSuccessor(OldI);
613 void MachineBasicBlock::addPredecessor(MachineBasicBlock *Pred) {
614 Predecessors.push_back(Pred);
617 void MachineBasicBlock::removePredecessor(MachineBasicBlock *Pred) {
618 pred_iterator I = std::find(Predecessors.begin(), Predecessors.end(), Pred);
619 assert(I != Predecessors.end() && "Pred is not a predecessor of this block!");
620 Predecessors.erase(I);
623 void MachineBasicBlock::transferSuccessors(MachineBasicBlock *FromMBB) {
627 while (!FromMBB->succ_empty()) {
628 MachineBasicBlock *Succ = *FromMBB->succ_begin();
631 // If Weight list is empty it means we don't use it (disabled optimization).
632 if (!FromMBB->Weights.empty())
633 Weight = *FromMBB->Weights.begin();
635 addSuccessor(Succ, Weight);
636 FromMBB->removeSuccessor(Succ);
641 MachineBasicBlock::transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB) {
645 while (!FromMBB->succ_empty()) {
646 MachineBasicBlock *Succ = *FromMBB->succ_begin();
648 if (!FromMBB->Weights.empty())
649 Weight = *FromMBB->Weights.begin();
650 addSuccessor(Succ, Weight);
651 FromMBB->removeSuccessor(Succ);
653 // Fix up any PHI nodes in the successor.
654 for (MachineBasicBlock::instr_iterator MI = Succ->instr_begin(),
655 ME = Succ->instr_end(); MI != ME && MI->isPHI(); ++MI)
656 for (unsigned i = 2, e = MI->getNumOperands()+1; i != e; i += 2) {
657 MachineOperand &MO = MI->getOperand(i);
658 if (MO.getMBB() == FromMBB)
664 bool MachineBasicBlock::isPredecessor(const MachineBasicBlock *MBB) const {
665 return std::find(pred_begin(), pred_end(), MBB) != pred_end();
668 bool MachineBasicBlock::isSuccessor(const MachineBasicBlock *MBB) const {
669 return std::find(succ_begin(), succ_end(), MBB) != succ_end();
672 bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const {
673 MachineFunction::const_iterator I(this);
674 return std::next(I) == MachineFunction::const_iterator(MBB);
677 bool MachineBasicBlock::canFallThrough() {
678 MachineFunction::iterator Fallthrough = getIterator();
680 // If FallthroughBlock is off the end of the function, it can't fall through.
681 if (Fallthrough == getParent()->end())
684 // If FallthroughBlock isn't a successor, no fallthrough is possible.
685 if (!isSuccessor(&*Fallthrough))
688 // Analyze the branches, if any, at the end of the block.
689 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
690 SmallVector<MachineOperand, 4> Cond;
691 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
692 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) {
693 // If we couldn't analyze the branch, examine the last instruction.
694 // If the block doesn't end in a known control barrier, assume fallthrough
695 // is possible. The isPredicated check is needed because this code can be
696 // called during IfConversion, where an instruction which is normally a
697 // Barrier is predicated and thus no longer an actual control barrier.
698 return empty() || !back().isBarrier() || TII->isPredicated(&back());
701 // If there is no branch, control always falls through.
702 if (!TBB) return true;
704 // If there is some explicit branch to the fallthrough block, it can obviously
705 // reach, even though the branch should get folded to fall through implicitly.
706 if (MachineFunction::iterator(TBB) == Fallthrough ||
707 MachineFunction::iterator(FBB) == Fallthrough)
710 // If it's an unconditional branch to some block not the fall through, it
711 // doesn't fall through.
712 if (Cond.empty()) return false;
714 // Otherwise, if it is conditional and has no explicit false block, it falls
716 return FBB == nullptr;
720 MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ, Pass *P) {
721 // Splitting the critical edge to a landing pad block is non-trivial. Don't do
722 // it in this generic function.
726 MachineFunction *MF = getParent();
727 DebugLoc DL; // FIXME: this is nowhere
729 // Performance might be harmed on HW that implements branching using exec mask
730 // where both sides of the branches are always executed.
731 if (MF->getTarget().requiresStructuredCFG())
734 // We may need to update this's terminator, but we can't do that if
735 // AnalyzeBranch fails. If this uses a jump table, we won't touch it.
736 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
737 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
738 SmallVector<MachineOperand, 4> Cond;
739 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond))
742 // Avoid bugpoint weirdness: A block may end with a conditional branch but
743 // jumps to the same MBB is either case. We have duplicate CFG edges in that
744 // case that we can't handle. Since this never happens in properly optimized
745 // code, just skip those edges.
746 if (TBB && TBB == FBB) {
747 DEBUG(dbgs() << "Won't split critical edge after degenerate BB#"
748 << getNumber() << '\n');
752 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();
753 MF->insert(std::next(MachineFunction::iterator(this)), NMBB);
754 DEBUG(dbgs() << "Splitting critical edge:"
755 " BB#" << getNumber()
756 << " -- BB#" << NMBB->getNumber()
757 << " -- BB#" << Succ->getNumber() << '\n');
759 LiveIntervals *LIS = P->getAnalysisIfAvailable<LiveIntervals>();
760 SlotIndexes *Indexes = P->getAnalysisIfAvailable<SlotIndexes>();
762 LIS->insertMBBInMaps(NMBB);
764 Indexes->insertMBBInMaps(NMBB);
766 // On some targets like Mips, branches may kill virtual registers. Make sure
767 // that LiveVariables is properly updated after updateTerminator replaces the
769 LiveVariables *LV = P->getAnalysisIfAvailable<LiveVariables>();
771 // Collect a list of virtual registers killed by the terminators.
772 SmallVector<unsigned, 4> KilledRegs;
774 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
776 MachineInstr *MI = &*I;
777 for (MachineInstr::mop_iterator OI = MI->operands_begin(),
778 OE = MI->operands_end(); OI != OE; ++OI) {
779 if (!OI->isReg() || OI->getReg() == 0 ||
780 !OI->isUse() || !OI->isKill() || OI->isUndef())
782 unsigned Reg = OI->getReg();
783 if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
784 LV->getVarInfo(Reg).removeKill(MI)) {
785 KilledRegs.push_back(Reg);
786 DEBUG(dbgs() << "Removing terminator kill: " << *MI);
787 OI->setIsKill(false);
792 SmallVector<unsigned, 4> UsedRegs;
794 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
796 MachineInstr *MI = &*I;
798 for (MachineInstr::mop_iterator OI = MI->operands_begin(),
799 OE = MI->operands_end(); OI != OE; ++OI) {
800 if (!OI->isReg() || OI->getReg() == 0)
803 unsigned Reg = OI->getReg();
804 if (std::find(UsedRegs.begin(), UsedRegs.end(), Reg) == UsedRegs.end())
805 UsedRegs.push_back(Reg);
810 ReplaceUsesOfBlockWith(Succ, NMBB);
812 // If updateTerminator() removes instructions, we need to remove them from
814 SmallVector<MachineInstr*, 4> Terminators;
816 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
818 Terminators.push_back(&*I);
824 SmallVector<MachineInstr*, 4> NewTerminators;
825 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
827 NewTerminators.push_back(&*I);
829 for (SmallVectorImpl<MachineInstr*>::iterator I = Terminators.begin(),
830 E = Terminators.end(); I != E; ++I) {
831 if (std::find(NewTerminators.begin(), NewTerminators.end(), *I) ==
832 NewTerminators.end())
833 Indexes->removeMachineInstrFromMaps(*I);
837 // Insert unconditional "jump Succ" instruction in NMBB if necessary.
838 NMBB->addSuccessor(Succ);
839 if (!NMBB->isLayoutSuccessor(Succ)) {
841 TII->InsertBranch(*NMBB, Succ, nullptr, Cond, DL);
844 for (instr_iterator I = NMBB->instr_begin(), E = NMBB->instr_end();
846 // Some instructions may have been moved to NMBB by updateTerminator(),
847 // so we first remove any instruction that already has an index.
848 if (Indexes->hasIndex(&*I))
849 Indexes->removeMachineInstrFromMaps(&*I);
850 Indexes->insertMachineInstrInMaps(&*I);
855 // Fix PHI nodes in Succ so they refer to NMBB instead of this
856 for (MachineBasicBlock::instr_iterator
857 i = Succ->instr_begin(),e = Succ->instr_end();
858 i != e && i->isPHI(); ++i)
859 for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
860 if (i->getOperand(ni+1).getMBB() == this)
861 i->getOperand(ni+1).setMBB(NMBB);
863 // Inherit live-ins from the successor
864 for (const auto &LI : Succ->liveins())
867 // Update LiveVariables.
868 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
870 // Restore kills of virtual registers that were killed by the terminators.
871 while (!KilledRegs.empty()) {
872 unsigned Reg = KilledRegs.pop_back_val();
873 for (instr_iterator I = instr_end(), E = instr_begin(); I != E;) {
874 if (!(--I)->addRegisterKilled(Reg, TRI, /* addIfNotFound= */ false))
876 if (TargetRegisterInfo::isVirtualRegister(Reg))
877 LV->getVarInfo(Reg).Kills.push_back(&*I);
878 DEBUG(dbgs() << "Restored terminator kill: " << *I);
882 // Update relevant live-through information.
883 LV->addNewBlock(NMBB, this, Succ);
887 // After splitting the edge and updating SlotIndexes, live intervals may be
888 // in one of two situations, depending on whether this block was the last in
889 // the function. If the original block was the last in the function, all
890 // live intervals will end prior to the beginning of the new split block. If
891 // the original block was not at the end of the function, all live intervals
892 // will extend to the end of the new split block.
895 std::next(MachineFunction::iterator(NMBB)) == getParent()->end();
897 SlotIndex StartIndex = Indexes->getMBBEndIdx(this);
898 SlotIndex PrevIndex = StartIndex.getPrevSlot();
899 SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);
901 // Find the registers used from NMBB in PHIs in Succ.
902 SmallSet<unsigned, 8> PHISrcRegs;
903 for (MachineBasicBlock::instr_iterator
904 I = Succ->instr_begin(), E = Succ->instr_end();
905 I != E && I->isPHI(); ++I) {
906 for (unsigned ni = 1, ne = I->getNumOperands(); ni != ne; ni += 2) {
907 if (I->getOperand(ni+1).getMBB() == NMBB) {
908 MachineOperand &MO = I->getOperand(ni);
909 unsigned Reg = MO.getReg();
910 PHISrcRegs.insert(Reg);
914 LiveInterval &LI = LIS->getInterval(Reg);
915 VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
917 "PHI sources should be live out of their predecessors.");
918 LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
923 MachineRegisterInfo *MRI = &getParent()->getRegInfo();
924 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
925 unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
926 if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg))
929 LiveInterval &LI = LIS->getInterval(Reg);
930 if (!LI.liveAt(PrevIndex))
933 bool isLiveOut = LI.liveAt(LIS->getMBBStartIdx(Succ));
934 if (isLiveOut && isLastMBB) {
935 VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
936 assert(VNI && "LiveInterval should have VNInfo where it is live.");
937 LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
938 } else if (!isLiveOut && !isLastMBB) {
939 LI.removeSegment(StartIndex, EndIndex);
943 // Update all intervals for registers whose uses may have been modified by
944 // updateTerminator().
945 LIS->repairIntervalsInRange(this, getFirstTerminator(), end(), UsedRegs);
948 if (MachineDominatorTree *MDT =
949 P->getAnalysisIfAvailable<MachineDominatorTree>())
950 MDT->recordSplitCriticalEdge(this, Succ, NMBB);
952 if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>())
953 if (MachineLoop *TIL = MLI->getLoopFor(this)) {
954 // If one or the other blocks were not in a loop, the new block is not
955 // either, and thus LI doesn't need to be updated.
956 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
957 if (TIL == DestLoop) {
958 // Both in the same loop, the NMBB joins loop.
959 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
960 } else if (TIL->contains(DestLoop)) {
961 // Edge from an outer loop to an inner loop. Add to the outer loop.
962 TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
963 } else if (DestLoop->contains(TIL)) {
964 // Edge from an inner loop to an outer loop. Add to the outer loop.
965 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
967 // Edge from two loops with no containment relation. Because these
968 // are natural loops, we know that the destination block must be the
969 // header of its loop (adding a branch into a loop elsewhere would
970 // create an irreducible loop).
971 assert(DestLoop->getHeader() == Succ &&
972 "Should not create irreducible loops!");
973 if (MachineLoop *P = DestLoop->getParentLoop())
974 P->addBasicBlockToLoop(NMBB, MLI->getBase());
982 /// Prepare MI to be removed from its bundle. This fixes bundle flags on MI's
983 /// neighboring instructions so the bundle won't be broken by removing MI.
984 static void unbundleSingleMI(MachineInstr *MI) {
985 // Removing the first instruction in a bundle.
986 if (MI->isBundledWithSucc() && !MI->isBundledWithPred())
987 MI->unbundleFromSucc();
988 // Removing the last instruction in a bundle.
989 if (MI->isBundledWithPred() && !MI->isBundledWithSucc())
990 MI->unbundleFromPred();
991 // If MI is not bundled, or if it is internal to a bundle, the neighbor flags
995 MachineBasicBlock::instr_iterator
996 MachineBasicBlock::erase(MachineBasicBlock::instr_iterator I) {
997 unbundleSingleMI(&*I);
998 return Insts.erase(I);
1001 MachineInstr *MachineBasicBlock::remove_instr(MachineInstr *MI) {
1002 unbundleSingleMI(MI);
1003 MI->clearFlag(MachineInstr::BundledPred);
1004 MI->clearFlag(MachineInstr::BundledSucc);
1005 return Insts.remove(MI);
1008 MachineBasicBlock::instr_iterator
1009 MachineBasicBlock::insert(instr_iterator I, MachineInstr *MI) {
1010 assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() &&
1011 "Cannot insert instruction with bundle flags");
1012 // Set the bundle flags when inserting inside a bundle.
1013 if (I != instr_end() && I->isBundledWithPred()) {
1014 MI->setFlag(MachineInstr::BundledPred);
1015 MI->setFlag(MachineInstr::BundledSucc);
1017 return Insts.insert(I, MI);
1020 /// This method unlinks 'this' from the containing function, and returns it, but
1021 /// does not delete it.
1022 MachineBasicBlock *MachineBasicBlock::removeFromParent() {
1023 assert(getParent() && "Not embedded in a function!");
1024 getParent()->remove(this);
1028 /// This method unlinks 'this' from the containing function, and deletes it.
1029 void MachineBasicBlock::eraseFromParent() {
1030 assert(getParent() && "Not embedded in a function!");
1031 getParent()->erase(this);
1034 /// Given a machine basic block that branched to 'Old', change the code and CFG
1035 /// so that it branches to 'New' instead.
1036 void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old,
1037 MachineBasicBlock *New) {
1038 assert(Old != New && "Cannot replace self with self!");
1040 MachineBasicBlock::instr_iterator I = instr_end();
1041 while (I != instr_begin()) {
1043 if (!I->isTerminator()) break;
1045 // Scan the operands of this machine instruction, replacing any uses of Old
1047 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
1048 if (I->getOperand(i).isMBB() &&
1049 I->getOperand(i).getMBB() == Old)
1050 I->getOperand(i).setMBB(New);
1053 // Update the successor information.
1054 replaceSuccessor(Old, New);
1057 /// Various pieces of code can cause excess edges in the CFG to be inserted. If
1058 /// we have proven that MBB can only branch to DestA and DestB, remove any other
1059 /// MBB successors from the CFG. DestA and DestB can be null.
1061 /// Besides DestA and DestB, retain other edges leading to LandingPads
1062 /// (currently there can be only one; we don't check or require that here).
1063 /// Note it is possible that DestA and/or DestB are LandingPads.
1064 bool MachineBasicBlock::CorrectExtraCFGEdges(MachineBasicBlock *DestA,
1065 MachineBasicBlock *DestB,
1067 // The values of DestA and DestB frequently come from a call to the
1068 // 'TargetInstrInfo::AnalyzeBranch' method. We take our meaning of the initial
1069 // values from there.
1071 // 1. If both DestA and DestB are null, then the block ends with no branches
1072 // (it falls through to its successor).
1073 // 2. If DestA is set, DestB is null, and IsCond is false, then the block ends
1074 // with only an unconditional branch.
1075 // 3. If DestA is set, DestB is null, and IsCond is true, then the block ends
1076 // with a conditional branch that falls through to a successor (DestB).
1077 // 4. If DestA and DestB is set and IsCond is true, then the block ends with a
1078 // conditional branch followed by an unconditional branch. DestA is the
1079 // 'true' destination and DestB is the 'false' destination.
1081 bool Changed = false;
1083 MachineFunction::iterator FallThru = std::next(getIterator());
1085 if (!DestA && !DestB) {
1086 // Block falls through to successor.
1089 } else if (DestA && !DestB) {
1091 // Block ends in conditional jump that falls through to successor.
1094 assert(DestA && DestB && IsCond &&
1095 "CFG in a bad state. Cannot correct CFG edges");
1098 // Remove superfluous edges. I.e., those which aren't destinations of this
1099 // basic block, duplicate edges, or landing pads.
1100 SmallPtrSet<const MachineBasicBlock*, 8> SeenMBBs;
1101 MachineBasicBlock::succ_iterator SI = succ_begin();
1102 while (SI != succ_end()) {
1103 const MachineBasicBlock *MBB = *SI;
1104 if (!SeenMBBs.insert(MBB).second ||
1105 (MBB != DestA && MBB != DestB && !MBB->isEHPad())) {
1106 // This is a superfluous edge, remove it.
1107 SI = removeSuccessor(SI);
1117 /// Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE
1118 /// instructions. Return UnknownLoc if there is none.
1120 MachineBasicBlock::findDebugLoc(instr_iterator MBBI) {
1122 instr_iterator E = instr_end();
1126 // Skip debug declarations, we don't want a DebugLoc from them.
1127 while (MBBI != E && MBBI->isDebugValue())
1130 DL = MBBI->getDebugLoc();
1134 /// Return weight of the edge from this block to MBB.
1135 uint32_t MachineBasicBlock::getSuccWeight(const_succ_iterator Succ) const {
1136 if (Weights.empty())
1139 return *getWeightIterator(Succ);
1142 /// Return probability of the edge from this block to MBB. If probability list
1143 /// is empty, return a default probability which is 1/N, where N is the number
1144 /// of successors. If the probability of the given successor is unknown, then
1145 /// sum up all known probabilities and return the complement of the sum divided
1146 /// by the number of unknown probabilities.
1148 MachineBasicBlock::getSuccProbability(const_succ_iterator Succ) const {
1150 return BranchProbability(1, succ_size());
1152 auto Prob = *getProbabilityIterator(Succ);
1153 assert(!Prob.isUnknown());
1157 /// Set successor weight of a given iterator.
1158 void MachineBasicBlock::setSuccWeight(succ_iterator I, uint32_t Weight) {
1159 if (Weights.empty())
1161 *getWeightIterator(I) = Weight;
1164 /// Set successor probability of a given iterator.
1165 void MachineBasicBlock::setSuccProbability(succ_iterator I,
1166 BranchProbability Prob) {
1167 assert(!Prob.isUnknown());
1170 *getProbabilityIterator(I) = Prob;
1173 /// Return wight iterator corresonding to the I successor iterator.
1174 MachineBasicBlock::weight_iterator MachineBasicBlock::
1175 getWeightIterator(MachineBasicBlock::succ_iterator I) {
1176 assert(Weights.size() == Successors.size() && "Async weight list!");
1177 size_t index = std::distance(Successors.begin(), I);
1178 assert(index < Weights.size() && "Not a current successor!");
1179 return Weights.begin() + index;
1182 /// Return wight iterator corresonding to the I successor iterator.
1183 MachineBasicBlock::const_weight_iterator MachineBasicBlock::
1184 getWeightIterator(MachineBasicBlock::const_succ_iterator I) const {
1185 assert(Weights.size() == Successors.size() && "Async weight list!");
1186 const size_t index = std::distance(Successors.begin(), I);
1187 assert(index < Weights.size() && "Not a current successor!");
1188 return Weights.begin() + index;
1191 /// Return probability iterator corresonding to the I successor iterator.
1192 MachineBasicBlock::probability_iterator
1193 MachineBasicBlock::getProbabilityIterator(MachineBasicBlock::succ_iterator I) {
1194 assert(Probs.size() == Successors.size() && "Async probability list!");
1195 const size_t index = std::distance(Successors.begin(), I);
1196 assert(index < Probs.size() && "Not a current successor!");
1197 return Probs.begin() + index;
1200 /// Return probability iterator corresonding to the I successor iterator
1201 MachineBasicBlock::const_probability_iterator
1202 MachineBasicBlock::getProbabilityIterator(
1203 MachineBasicBlock::const_succ_iterator I) const {
1204 assert(Probs.size() == Successors.size() && "Async probability list!");
1205 const size_t index = std::distance(Successors.begin(), I);
1206 assert(index < Probs.size() && "Not a current successor!");
1207 return Probs.begin() + index;
1210 /// Return whether (physical) register "Reg" has been <def>ined and not <kill>ed
1211 /// as of just before "MI".
1213 /// Search is localised to a neighborhood of
1214 /// Neighborhood instructions before (searching for defs or kills) and N
1215 /// instructions after (searching just for defs) MI.
1216 MachineBasicBlock::LivenessQueryResult
1217 MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
1218 unsigned Reg, const_iterator Before,
1219 unsigned Neighborhood) const {
1220 unsigned N = Neighborhood;
1222 // Start by searching backwards from Before, looking for kills, reads or defs.
1223 const_iterator I(Before);
1224 // If this is the first insn in the block, don't search backwards.
1229 MachineOperandIteratorBase::PhysRegInfo Analysis =
1230 ConstMIOperands(I).analyzePhysReg(Reg, TRI);
1232 if (Analysis.Defines)
1233 // Outputs happen after inputs so they take precedence if both are
1235 return Analysis.DefinesDead ? LQR_Dead : LQR_Live;
1237 if (Analysis.Kills || Analysis.Clobbers)
1238 // Register killed, so isn't live.
1241 else if (Analysis.ReadsOverlap)
1242 // Defined or read without a previous kill - live.
1243 return Analysis.Reads ? LQR_Live : LQR_OverlappingLive;
1245 } while (I != begin() && --N > 0);
1248 // Did we get to the start of the block?
1250 // If so, the register's state is definitely defined by the live-in state.
1251 for (MCRegAliasIterator RAI(Reg, TRI, /*IncludeSelf=*/true);
1252 RAI.isValid(); ++RAI) {
1254 return (*RAI == Reg) ? LQR_Live : LQR_OverlappingLive;
1262 // Try searching forwards from Before, looking for reads or defs.
1263 I = const_iterator(Before);
1264 // If this is the last insn in the block, don't search forwards.
1266 for (++I; I != end() && N > 0; ++I, --N) {
1267 MachineOperandIteratorBase::PhysRegInfo Analysis =
1268 ConstMIOperands(I).analyzePhysReg(Reg, TRI);
1270 if (Analysis.ReadsOverlap)
1271 // Used, therefore must have been live.
1272 return (Analysis.Reads) ?
1273 LQR_Live : LQR_OverlappingLive;
1275 else if (Analysis.Clobbers || Analysis.Defines)
1276 // Defined (but not read) therefore cannot have been live.
1281 // At this point we have no idea of the liveness of the register.
1286 MachineBasicBlock::getBeginClobberMask(const TargetRegisterInfo *TRI) const {
1287 // EH funclet entry does not preserve any registers.
1288 return isEHFuncletEntry() ? TRI->getNoPreservedMask() : nullptr;
1292 MachineBasicBlock::getEndClobberMask(const TargetRegisterInfo *TRI) const {
1293 // If we see a return block with successors, this must be a funclet return,
1294 // which does not preserve any registers. If there are no successors, we don't
1295 // care what kind of return it is, putting a mask after it is a no-op.
1296 return isReturnBlock() && !succ_empty() ? TRI->getNoPreservedMask() : nullptr;