lib/CodeGen/MIRParser/MIParser.h

   1 //===- MIParser.h - Machine Instructions Parser ---------------------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file declares the function that parses the machine instructions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H
  15 #define LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H
  16
  17 #include "llvm/ADT/DenseMap.h"
  18 #include "llvm/ADT/StringRef.h"
  19
  20 namespace llvm {
  21
  22 class MachineBasicBlock;
  23 class MachineInstr;
  24 class MachineFunction;
  25 struct SlotMapping;
  26 class SMDiagnostic;
  27 class SourceMgr;
  28
  29 struct PerFunctionMIParsingState {
  30   DenseMap<unsigned, MachineBasicBlock *> MBBSlots;
  31   DenseMap<unsigned, unsigned> VirtualRegisterSlots;
  32   DenseMap<unsigned, int> FixedStackObjectSlots;
  33   DenseMap<unsigned, int> StackObjectSlots;
  34   DenseMap<unsigned, unsigned> JumpTableSlots;
  35 };
  36
  37 bool parseMachineInstr(MachineInstr *&MI, SourceMgr &SM, MachineFunction &MF,
  38                        StringRef Src, const PerFunctionMIParsingState &PFS,
  39                        const SlotMapping &IRSlots, SMDiagnostic &Error);
  40
  41 bool parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM,
  42                        MachineFunction &MF, StringRef Src,
  43                        const PerFunctionMIParsingState &PFS,
  44                        const SlotMapping &IRSlots, SMDiagnostic &Error);
  45
  46 bool parseNamedRegisterReference(unsigned &Reg, SourceMgr &SM,
  47                                  MachineFunction &MF, StringRef Src,
  48                                  const PerFunctionMIParsingState &PFS,
  49                                  const SlotMapping &IRSlots,
  50                                  SMDiagnostic &Error);
  51
  52 } // end namespace llvm
  53
  54 #endif