1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the parsing of machine instructions.
12 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/StringMap.h"
17 #include "llvm/AsmParser/SlotMapping.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/IR/Instructions.h"
25 #include "llvm/IR/Constants.h"
26 #include "llvm/IR/Module.h"
27 #include "llvm/IR/ModuleSlotTracker.h"
28 #include "llvm/IR/ValueSymbolTable.h"
29 #include "llvm/Support/raw_ostream.h"
30 #include "llvm/Support/SourceMgr.h"
31 #include "llvm/Target/TargetSubtargetInfo.h"
32 #include "llvm/Target/TargetInstrInfo.h"
38 struct StringValueUtility {
40 std::string UnescapedString;
42 StringValueUtility(const MIToken &Token) {
43 if (Token.isStringValueQuoted()) {
44 Token.unescapeQuotedStringValue(UnescapedString);
45 String = UnescapedString;
48 String = Token.stringValue();
51 operator StringRef() const { return String; }
54 /// A wrapper struct around the 'MachineOperand' struct that includes a source
56 struct MachineOperandWithLocation {
57 MachineOperand Operand;
58 StringRef::iterator Begin;
59 StringRef::iterator End;
61 MachineOperandWithLocation(const MachineOperand &Operand,
62 StringRef::iterator Begin, StringRef::iterator End)
63 : Operand(Operand), Begin(Begin), End(End) {}
70 StringRef Source, CurrentSource;
72 const PerFunctionMIParsingState &PFS;
73 /// Maps from indices to unnamed global values and metadata nodes.
74 const SlotMapping &IRSlots;
75 /// Maps from instruction names to op codes.
76 StringMap<unsigned> Names2InstrOpCodes;
77 /// Maps from register names to registers.
78 StringMap<unsigned> Names2Regs;
79 /// Maps from register mask names to register masks.
80 StringMap<const uint32_t *> Names2RegMasks;
81 /// Maps from subregister names to subregister indices.
82 StringMap<unsigned> Names2SubRegIndices;
83 /// Maps from slot numbers to function's unnamed basic blocks.
84 DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
85 /// Maps from target index names to target indices.
86 StringMap<int> Names2TargetIndices;
89 MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
90 StringRef Source, const PerFunctionMIParsingState &PFS,
91 const SlotMapping &IRSlots);
95 /// Report an error at the current location with the given message.
97 /// This function always return true.
98 bool error(const Twine &Msg);
100 /// Report an error at the given location with the given message.
102 /// This function always return true.
103 bool error(StringRef::iterator Loc, const Twine &Msg);
105 bool parse(MachineInstr *&MI);
106 bool parseStandaloneMBB(MachineBasicBlock *&MBB);
107 bool parseStandaloneNamedRegister(unsigned &Reg);
108 bool parseStandaloneVirtualRegister(unsigned &Reg);
109 bool parseStandaloneIRBlockReference(const BasicBlock *&BB);
111 bool parseRegister(unsigned &Reg);
112 bool parseRegisterFlag(unsigned &Flags);
113 bool parseSubRegisterIndex(unsigned &SubReg);
114 bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
115 bool parseImmediateOperand(MachineOperand &Dest);
116 bool parseMBBReference(MachineBasicBlock *&MBB);
117 bool parseMBBOperand(MachineOperand &Dest);
118 bool parseStackObjectOperand(MachineOperand &Dest);
119 bool parseFixedStackObjectOperand(MachineOperand &Dest);
120 bool parseGlobalValue(GlobalValue *&GV);
121 bool parseGlobalAddressOperand(MachineOperand &Dest);
122 bool parseConstantPoolIndexOperand(MachineOperand &Dest);
123 bool parseJumpTableIndexOperand(MachineOperand &Dest);
124 bool parseExternalSymbolOperand(MachineOperand &Dest);
125 bool parseMDNode(MDNode *&Node);
126 bool parseMetadataOperand(MachineOperand &Dest);
127 bool parseCFIOffset(int &Offset);
128 bool parseCFIRegister(unsigned &Reg);
129 bool parseCFIOperand(MachineOperand &Dest);
130 bool parseIRBlock(BasicBlock *&BB, const Function &F);
131 bool parseBlockAddressOperand(MachineOperand &Dest);
132 bool parseTargetIndexOperand(MachineOperand &Dest);
133 bool parseMachineOperand(MachineOperand &Dest);
136 /// Convert the integer literal in the current token into an unsigned integer.
138 /// Return true if an error occurred.
139 bool getUnsigned(unsigned &Result);
141 /// If the current token is of the given kind, consume it and return false.
142 /// Otherwise report an error and return true.
143 bool expectAndConsume(MIToken::TokenKind TokenKind);
145 void initNames2InstrOpCodes();
147 /// Try to convert an instruction name to an opcode. Return true if the
148 /// instruction name is invalid.
149 bool parseInstrName(StringRef InstrName, unsigned &OpCode);
151 bool parseInstruction(unsigned &OpCode, unsigned &Flags);
153 bool verifyImplicitOperands(ArrayRef<MachineOperandWithLocation> Operands,
154 const MCInstrDesc &MCID);
156 void initNames2Regs();
158 /// Try to convert a register name to a register number. Return true if the
159 /// register name is invalid.
160 bool getRegisterByName(StringRef RegName, unsigned &Reg);
162 void initNames2RegMasks();
164 /// Check if the given identifier is a name of a register mask.
166 /// Return null if the identifier isn't a register mask.
167 const uint32_t *getRegMask(StringRef Identifier);
169 void initNames2SubRegIndices();
171 /// Check if the given identifier is a name of a subregister index.
173 /// Return 0 if the name isn't a subregister index class.
174 unsigned getSubRegIndex(StringRef Name);
176 void initSlots2BasicBlocks();
178 const BasicBlock *getIRBlock(unsigned Slot);
180 void initNames2TargetIndices();
182 /// Try to convert a name of target index to the corresponding target index.
184 /// Return true if the name isn't a name of a target index.
185 bool getTargetIndex(StringRef Name, int &Index);
188 } // end anonymous namespace
190 MIParser::MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
191 StringRef Source, const PerFunctionMIParsingState &PFS,
192 const SlotMapping &IRSlots)
193 : SM(SM), MF(MF), Error(Error), Source(Source), CurrentSource(Source),
194 Token(MIToken::Error, StringRef()), PFS(PFS), IRSlots(IRSlots) {}
196 void MIParser::lex() {
197 CurrentSource = lexMIToken(
198 CurrentSource, Token,
199 [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
202 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
204 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
205 assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
206 Error = SMDiagnostic(
208 SM.getMemoryBuffer(SM.getMainFileID())->getBufferIdentifier(), 1,
209 Loc - Source.data(), SourceMgr::DK_Error, Msg.str(), Source, None, None);
213 static const char *toString(MIToken::TokenKind TokenKind) {
217 case MIToken::lparen:
219 case MIToken::rparen:
222 return "<unknown token>";
226 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
227 if (Token.isNot(TokenKind))
228 return error(Twine("expected ") + toString(TokenKind));
233 bool MIParser::parse(MachineInstr *&MI) {
236 // Parse any register operands before '='
237 // TODO: Allow parsing of multiple operands before '='
238 MachineOperand MO = MachineOperand::CreateImm(0);
239 SmallVector<MachineOperandWithLocation, 8> Operands;
240 if (Token.isRegister() || Token.isRegisterFlag()) {
241 auto Loc = Token.location();
242 if (parseRegisterOperand(MO, /*IsDef=*/true))
244 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
245 if (Token.isNot(MIToken::equal))
246 return error("expected '='");
250 unsigned OpCode, Flags = 0;
251 if (Token.isError() || parseInstruction(OpCode, Flags))
254 // TODO: Parse the bundle instruction flags and memory operands.
256 // Parse the remaining machine operands.
257 while (Token.isNot(MIToken::Eof) && Token.isNot(MIToken::kw_debug_location)) {
258 auto Loc = Token.location();
259 if (parseMachineOperand(MO))
261 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
262 if (Token.is(MIToken::Eof))
264 if (Token.isNot(MIToken::comma))
265 return error("expected ',' before the next machine operand");
269 DebugLoc DebugLocation;
270 if (Token.is(MIToken::kw_debug_location)) {
272 if (Token.isNot(MIToken::exclaim))
273 return error("expected a metadata node after 'debug-location'");
274 MDNode *Node = nullptr;
275 if (parseMDNode(Node))
277 DebugLocation = DebugLoc(Node);
280 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
281 if (!MCID.isVariadic()) {
282 // FIXME: Move the implicit operand verification to the machine verifier.
283 if (verifyImplicitOperands(Operands, MCID))
287 // TODO: Check for extraneous machine operands.
288 MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
290 for (const auto &Operand : Operands)
291 MI->addOperand(MF, Operand.Operand);
295 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
297 if (Token.isNot(MIToken::MachineBasicBlock))
298 return error("expected a machine basic block reference");
299 if (parseMBBReference(MBB))
302 if (Token.isNot(MIToken::Eof))
304 "expected end of string after the machine basic block reference");
308 bool MIParser::parseStandaloneNamedRegister(unsigned &Reg) {
310 if (Token.isNot(MIToken::NamedRegister))
311 return error("expected a named register");
312 if (parseRegister(Reg))
315 if (Token.isNot(MIToken::Eof))
316 return error("expected end of string after the register reference");
320 bool MIParser::parseStandaloneVirtualRegister(unsigned &Reg) {
322 if (Token.isNot(MIToken::VirtualRegister))
323 return error("expected a virtual register");
324 if (parseRegister(Reg))
327 if (Token.isNot(MIToken::Eof))
328 return error("expected end of string after the register reference");
332 bool MIParser::parseStandaloneIRBlockReference(const BasicBlock *&BB) {
334 if (Token.isNot(MIToken::IRBlock))
335 return error("expected an IR block reference");
336 unsigned SlotNumber = 0;
337 if (getUnsigned(SlotNumber))
339 BB = getIRBlock(SlotNumber);
341 return error(Twine("use of undefined IR block '%ir-block.") +
342 Twine(SlotNumber) + "'");
344 if (Token.isNot(MIToken::Eof))
345 return error("expected end of string after the IR block reference");
349 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
350 assert(MO.isImplicit());
351 return MO.isDef() ? "implicit-def" : "implicit";
354 static std::string getRegisterName(const TargetRegisterInfo *TRI,
356 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "expected phys reg");
357 return StringRef(TRI->getName(Reg)).lower();
360 bool MIParser::verifyImplicitOperands(
361 ArrayRef<MachineOperandWithLocation> Operands, const MCInstrDesc &MCID) {
363 // We can't verify call instructions as they can contain arbitrary implicit
364 // register and register mask operands.
367 // Gather all the expected implicit operands.
368 SmallVector<MachineOperand, 4> ImplicitOperands;
369 if (MCID.ImplicitDefs)
370 for (const uint16_t *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
371 ImplicitOperands.push_back(
372 MachineOperand::CreateReg(*ImpDefs, true, true));
373 if (MCID.ImplicitUses)
374 for (const uint16_t *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
375 ImplicitOperands.push_back(
376 MachineOperand::CreateReg(*ImpUses, false, true));
378 const auto *TRI = MF.getSubtarget().getRegisterInfo();
379 assert(TRI && "Expected target register info");
380 size_t I = ImplicitOperands.size(), J = Operands.size();
385 const auto &ImplicitOperand = ImplicitOperands[I];
386 const auto &Operand = Operands[J].Operand;
387 if (ImplicitOperand.isIdenticalTo(Operand))
389 if (Operand.isReg() && Operand.isImplicit()) {
390 return error(Operands[J].Begin,
391 Twine("expected an implicit register operand '") +
392 printImplicitRegisterFlag(ImplicitOperand) + " %" +
393 getRegisterName(TRI, ImplicitOperand.getReg()) + "'");
396 // TODO: Fix source location when Operands[J].end is right before '=', i.e:
397 // insead of reporting an error at this location:
400 // report the error at the following location:
403 return error(J < Operands.size() ? Operands[J].End : Token.location(),
404 Twine("missing implicit register operand '") +
405 printImplicitRegisterFlag(ImplicitOperands[I]) + " %" +
406 getRegisterName(TRI, ImplicitOperands[I].getReg()) + "'");
411 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
412 if (Token.is(MIToken::kw_frame_setup)) {
413 Flags |= MachineInstr::FrameSetup;
416 if (Token.isNot(MIToken::Identifier))
417 return error("expected a machine instruction");
418 StringRef InstrName = Token.stringValue();
419 if (parseInstrName(InstrName, OpCode))
420 return error(Twine("unknown machine instruction name '") + InstrName + "'");
425 bool MIParser::parseRegister(unsigned &Reg) {
426 switch (Token.kind()) {
427 case MIToken::underscore:
430 case MIToken::NamedRegister: {
431 StringRef Name = Token.stringValue();
432 if (getRegisterByName(Name, Reg))
433 return error(Twine("unknown register name '") + Name + "'");
436 case MIToken::VirtualRegister: {
440 const auto RegInfo = PFS.VirtualRegisterSlots.find(ID);
441 if (RegInfo == PFS.VirtualRegisterSlots.end())
442 return error(Twine("use of undefined virtual register '%") + Twine(ID) +
444 Reg = RegInfo->second;
447 // TODO: Parse other register kinds.
449 llvm_unreachable("The current token should be a register");
454 bool MIParser::parseRegisterFlag(unsigned &Flags) {
455 switch (Token.kind()) {
456 case MIToken::kw_implicit:
457 Flags |= RegState::Implicit;
459 case MIToken::kw_implicit_define:
460 Flags |= RegState::ImplicitDefine;
462 case MIToken::kw_dead:
463 Flags |= RegState::Dead;
465 case MIToken::kw_killed:
466 Flags |= RegState::Kill;
468 case MIToken::kw_undef:
469 Flags |= RegState::Undef;
471 // TODO: report an error when we specify the same flag more than once.
472 // TODO: parse the other register flags.
474 llvm_unreachable("The current token should be a register flag");
480 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
481 assert(Token.is(MIToken::colon));
483 if (Token.isNot(MIToken::Identifier))
484 return error("expected a subregister index after ':'");
485 auto Name = Token.stringValue();
486 SubReg = getSubRegIndex(Name);
488 return error(Twine("use of unknown subregister index '") + Name + "'");
493 bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
495 unsigned Flags = IsDef ? RegState::Define : 0;
496 while (Token.isRegisterFlag()) {
497 if (parseRegisterFlag(Flags))
500 if (!Token.isRegister())
501 return error("expected a register after register flags");
502 if (parseRegister(Reg))
506 if (Token.is(MIToken::colon)) {
507 if (parseSubRegisterIndex(SubReg))
510 Dest = MachineOperand::CreateReg(
511 Reg, Flags & RegState::Define, Flags & RegState::Implicit,
512 Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
513 /*isEarlyClobber=*/false, SubReg);
517 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
518 assert(Token.is(MIToken::IntegerLiteral));
519 const APSInt &Int = Token.integerValue();
520 if (Int.getMinSignedBits() > 64)
521 // TODO: Replace this with an error when we can parse CIMM Machine Operands.
522 llvm_unreachable("Can't parse large integer literals yet!");
523 Dest = MachineOperand::CreateImm(Int.getExtValue());
528 bool MIParser::getUnsigned(unsigned &Result) {
529 assert(Token.hasIntegerValue() && "Expected a token with an integer value");
530 const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
531 uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
533 return error("expected 32-bit integer (too large)");
538 bool MIParser::parseMBBReference(MachineBasicBlock *&MBB) {
539 assert(Token.is(MIToken::MachineBasicBlock));
541 if (getUnsigned(Number))
543 auto MBBInfo = PFS.MBBSlots.find(Number);
544 if (MBBInfo == PFS.MBBSlots.end())
545 return error(Twine("use of undefined machine basic block #") +
547 MBB = MBBInfo->second;
548 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
549 return error(Twine("the name of machine basic block #") + Twine(Number) +
550 " isn't '" + Token.stringValue() + "'");
554 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
555 MachineBasicBlock *MBB;
556 if (parseMBBReference(MBB))
558 Dest = MachineOperand::CreateMBB(MBB);
563 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
564 assert(Token.is(MIToken::StackObject));
568 auto ObjectInfo = PFS.StackObjectSlots.find(ID);
569 if (ObjectInfo == PFS.StackObjectSlots.end())
570 return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
573 if (const auto *Alloca =
574 MF.getFrameInfo()->getObjectAllocation(ObjectInfo->second))
575 Name = Alloca->getName();
576 if (!Token.stringValue().empty() && Token.stringValue() != Name)
577 return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
578 "' isn't '" + Token.stringValue() + "'");
580 Dest = MachineOperand::CreateFI(ObjectInfo->second);
584 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
585 assert(Token.is(MIToken::FixedStackObject));
589 auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
590 if (ObjectInfo == PFS.FixedStackObjectSlots.end())
591 return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
594 Dest = MachineOperand::CreateFI(ObjectInfo->second);
598 bool MIParser::parseGlobalValue(GlobalValue *&GV) {
599 switch (Token.kind()) {
600 case MIToken::NamedGlobalValue:
601 case MIToken::QuotedNamedGlobalValue: {
602 StringValueUtility Name(Token);
603 const Module *M = MF.getFunction()->getParent();
604 GV = M->getNamedValue(Name);
606 return error(Twine("use of undefined global value '@") +
607 Token.rawStringValue() + "'");
610 case MIToken::GlobalValue: {
612 if (getUnsigned(GVIdx))
614 if (GVIdx >= IRSlots.GlobalValues.size())
615 return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
617 GV = IRSlots.GlobalValues[GVIdx];
621 llvm_unreachable("The current token should be a global value");
626 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
627 GlobalValue *GV = nullptr;
628 if (parseGlobalValue(GV))
630 Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
631 // TODO: Parse offset and target flags.
636 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
637 assert(Token.is(MIToken::ConstantPoolItem));
641 auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
642 if (ConstantInfo == PFS.ConstantPoolSlots.end())
643 return error("use of undefined constant '%const." + Twine(ID) + "'");
645 // TODO: Parse offset and target flags.
646 Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
650 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
651 assert(Token.is(MIToken::JumpTableIndex));
655 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
656 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
657 return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
659 // TODO: Parse target flags.
660 Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
664 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
665 assert(Token.is(MIToken::ExternalSymbol) ||
666 Token.is(MIToken::QuotedExternalSymbol));
667 StringValueUtility Name(Token);
668 const char *Symbol = MF.createExternalSymbolName(Name);
670 // TODO: Parse the target flags.
671 Dest = MachineOperand::CreateES(Symbol);
675 bool MIParser::parseMDNode(MDNode *&Node) {
676 assert(Token.is(MIToken::exclaim));
677 auto Loc = Token.location();
679 if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
680 return error("expected metadata id after '!'");
684 auto NodeInfo = IRSlots.MetadataNodes.find(ID);
685 if (NodeInfo == IRSlots.MetadataNodes.end())
686 return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
688 Node = NodeInfo->second.get();
692 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
693 MDNode *Node = nullptr;
694 if (parseMDNode(Node))
696 Dest = MachineOperand::CreateMetadata(Node);
700 bool MIParser::parseCFIOffset(int &Offset) {
701 if (Token.isNot(MIToken::IntegerLiteral))
702 return error("expected a cfi offset");
703 if (Token.integerValue().getMinSignedBits() > 32)
704 return error("expected a 32 bit integer (the cfi offset is too large)");
705 Offset = (int)Token.integerValue().getExtValue();
710 bool MIParser::parseCFIRegister(unsigned &Reg) {
711 if (Token.isNot(MIToken::NamedRegister))
712 return error("expected a cfi register");
714 if (parseRegister(LLVMReg))
716 const auto *TRI = MF.getSubtarget().getRegisterInfo();
717 assert(TRI && "Expected target register info");
718 int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
720 return error("invalid DWARF register");
721 Reg = (unsigned)DwarfReg;
726 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
727 auto Kind = Token.kind();
729 auto &MMI = MF.getMMI();
734 case MIToken::kw_cfi_offset:
735 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
736 parseCFIOffset(Offset))
739 MMI.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
741 case MIToken::kw_cfi_def_cfa_register:
742 if (parseCFIRegister(Reg))
745 MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
747 case MIToken::kw_cfi_def_cfa_offset:
748 if (parseCFIOffset(Offset))
750 // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
751 CFIIndex = MMI.addFrameInst(
752 MCCFIInstruction::createDefCfaOffset(nullptr, -Offset));
755 // TODO: Parse the other CFI operands.
756 llvm_unreachable("The current token should be a cfi operand");
758 Dest = MachineOperand::CreateCFIIndex(CFIIndex);
762 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
763 switch (Token.kind()) {
764 case MIToken::NamedIRBlock:
765 case MIToken::QuotedNamedIRBlock: {
766 StringValueUtility Name(Token);
767 BB = dyn_cast_or_null<BasicBlock>(F.getValueSymbolTable().lookup(Name));
769 return error(Twine("use of undefined IR block '%ir-block.") +
770 Token.rawStringValue() + "'");
773 case MIToken::IRBlock: {
774 unsigned SlotNumber = 0;
775 if (getUnsigned(SlotNumber))
777 BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber));
779 return error(Twine("use of undefined IR block '%ir-block.") +
780 Twine(SlotNumber) + "'");
784 llvm_unreachable("The current token should be an IR block reference");
789 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
790 assert(Token.is(MIToken::kw_blockaddress));
792 if (expectAndConsume(MIToken::lparen))
794 if (Token.isNot(MIToken::GlobalValue) &&
795 Token.isNot(MIToken::NamedGlobalValue) &&
796 Token.isNot(MIToken::QuotedNamedGlobalValue))
797 return error("expected a global value");
798 GlobalValue *GV = nullptr;
799 if (parseGlobalValue(GV))
801 auto *F = dyn_cast<Function>(GV);
803 return error("expected an IR function reference");
805 if (expectAndConsume(MIToken::comma))
807 BasicBlock *BB = nullptr;
808 if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock) &&
809 Token.isNot(MIToken::QuotedNamedIRBlock))
810 return error("expected an IR block reference");
811 if (parseIRBlock(BB, *F))
814 if (expectAndConsume(MIToken::rparen))
816 // TODO: parse offset and target flags.
817 Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
821 bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
822 assert(Token.is(MIToken::kw_target_index));
824 if (expectAndConsume(MIToken::lparen))
826 if (Token.isNot(MIToken::Identifier))
827 return error("expected the name of the target index");
829 if (getTargetIndex(Token.stringValue(), Index))
830 return error("use of undefined target index '" + Token.stringValue() + "'");
832 if (expectAndConsume(MIToken::rparen))
834 // TODO: Parse the offset and target flags.
835 Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0);
839 bool MIParser::parseMachineOperand(MachineOperand &Dest) {
840 switch (Token.kind()) {
841 case MIToken::kw_implicit:
842 case MIToken::kw_implicit_define:
843 case MIToken::kw_dead:
844 case MIToken::kw_killed:
845 case MIToken::kw_undef:
846 case MIToken::underscore:
847 case MIToken::NamedRegister:
848 case MIToken::VirtualRegister:
849 return parseRegisterOperand(Dest);
850 case MIToken::IntegerLiteral:
851 return parseImmediateOperand(Dest);
852 case MIToken::MachineBasicBlock:
853 return parseMBBOperand(Dest);
854 case MIToken::StackObject:
855 return parseStackObjectOperand(Dest);
856 case MIToken::FixedStackObject:
857 return parseFixedStackObjectOperand(Dest);
858 case MIToken::GlobalValue:
859 case MIToken::NamedGlobalValue:
860 case MIToken::QuotedNamedGlobalValue:
861 return parseGlobalAddressOperand(Dest);
862 case MIToken::ConstantPoolItem:
863 return parseConstantPoolIndexOperand(Dest);
864 case MIToken::JumpTableIndex:
865 return parseJumpTableIndexOperand(Dest);
866 case MIToken::ExternalSymbol:
867 case MIToken::QuotedExternalSymbol:
868 return parseExternalSymbolOperand(Dest);
869 case MIToken::exclaim:
870 return parseMetadataOperand(Dest);
871 case MIToken::kw_cfi_offset:
872 case MIToken::kw_cfi_def_cfa_register:
873 case MIToken::kw_cfi_def_cfa_offset:
874 return parseCFIOperand(Dest);
875 case MIToken::kw_blockaddress:
876 return parseBlockAddressOperand(Dest);
877 case MIToken::kw_target_index:
878 return parseTargetIndexOperand(Dest);
881 case MIToken::Identifier:
882 if (const auto *RegMask = getRegMask(Token.stringValue())) {
883 Dest = MachineOperand::CreateRegMask(RegMask);
889 // TODO: parse the other machine operands.
890 return error("expected a machine operand");
895 void MIParser::initNames2InstrOpCodes() {
896 if (!Names2InstrOpCodes.empty())
898 const auto *TII = MF.getSubtarget().getInstrInfo();
899 assert(TII && "Expected target instruction info");
900 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
901 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
904 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
905 initNames2InstrOpCodes();
906 auto InstrInfo = Names2InstrOpCodes.find(InstrName);
907 if (InstrInfo == Names2InstrOpCodes.end())
909 OpCode = InstrInfo->getValue();
913 void MIParser::initNames2Regs() {
914 if (!Names2Regs.empty())
916 // The '%noreg' register is the register 0.
917 Names2Regs.insert(std::make_pair("noreg", 0));
918 const auto *TRI = MF.getSubtarget().getRegisterInfo();
919 assert(TRI && "Expected target register info");
920 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
922 Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
925 assert(WasInserted && "Expected registers to be unique case-insensitively");
929 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) {
931 auto RegInfo = Names2Regs.find(RegName);
932 if (RegInfo == Names2Regs.end())
934 Reg = RegInfo->getValue();
938 void MIParser::initNames2RegMasks() {
939 if (!Names2RegMasks.empty())
941 const auto *TRI = MF.getSubtarget().getRegisterInfo();
942 assert(TRI && "Expected target register info");
943 ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
944 ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
945 assert(RegMasks.size() == RegMaskNames.size());
946 for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
947 Names2RegMasks.insert(
948 std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
951 const uint32_t *MIParser::getRegMask(StringRef Identifier) {
952 initNames2RegMasks();
953 auto RegMaskInfo = Names2RegMasks.find(Identifier);
954 if (RegMaskInfo == Names2RegMasks.end())
956 return RegMaskInfo->getValue();
959 void MIParser::initNames2SubRegIndices() {
960 if (!Names2SubRegIndices.empty())
962 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
963 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
964 Names2SubRegIndices.insert(
965 std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I));
968 unsigned MIParser::getSubRegIndex(StringRef Name) {
969 initNames2SubRegIndices();
970 auto SubRegInfo = Names2SubRegIndices.find(Name);
971 if (SubRegInfo == Names2SubRegIndices.end())
973 return SubRegInfo->getValue();
976 void MIParser::initSlots2BasicBlocks() {
977 if (!Slots2BasicBlocks.empty())
979 const auto &F = *MF.getFunction();
980 ModuleSlotTracker MST(F.getParent());
981 MST.incorporateFunction(F);
985 int Slot = MST.getLocalSlot(&BB);
988 Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
992 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
993 initSlots2BasicBlocks();
994 auto BlockInfo = Slots2BasicBlocks.find(Slot);
995 if (BlockInfo == Slots2BasicBlocks.end())
997 return BlockInfo->second;
1000 void MIParser::initNames2TargetIndices() {
1001 if (!Names2TargetIndices.empty())
1003 const auto *TII = MF.getSubtarget().getInstrInfo();
1004 assert(TII && "Expected target instruction info");
1005 auto Indices = TII->getSerializableTargetIndices();
1006 for (const auto &I : Indices)
1007 Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));
1010 bool MIParser::getTargetIndex(StringRef Name, int &Index) {
1011 initNames2TargetIndices();
1012 auto IndexInfo = Names2TargetIndices.find(Name);
1013 if (IndexInfo == Names2TargetIndices.end())
1015 Index = IndexInfo->second;
1019 bool llvm::parseMachineInstr(MachineInstr *&MI, SourceMgr &SM,
1020 MachineFunction &MF, StringRef Src,
1021 const PerFunctionMIParsingState &PFS,
1022 const SlotMapping &IRSlots, SMDiagnostic &Error) {
1023 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parse(MI);
1026 bool llvm::parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM,
1027 MachineFunction &MF, StringRef Src,
1028 const PerFunctionMIParsingState &PFS,
1029 const SlotMapping &IRSlots, SMDiagnostic &Error) {
1030 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseStandaloneMBB(MBB);
1033 bool llvm::parseNamedRegisterReference(unsigned &Reg, SourceMgr &SM,
1034 MachineFunction &MF, StringRef Src,
1035 const PerFunctionMIParsingState &PFS,
1036 const SlotMapping &IRSlots,
1037 SMDiagnostic &Error) {
1038 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
1039 .parseStandaloneNamedRegister(Reg);
1042 bool llvm::parseVirtualRegisterReference(unsigned &Reg, SourceMgr &SM,
1043 MachineFunction &MF, StringRef Src,
1044 const PerFunctionMIParsingState &PFS,
1045 const SlotMapping &IRSlots,
1046 SMDiagnostic &Error) {
1047 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
1048 .parseStandaloneVirtualRegister(Reg);
1051 bool llvm::parseIRBlockReference(const BasicBlock *&BB, SourceMgr &SM,
1052 MachineFunction &MF, StringRef Src,
1053 const PerFunctionMIParsingState &PFS,
1054 const SlotMapping &IRSlots,
1055 SMDiagnostic &Error) {
1056 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
1057 .parseStandaloneIRBlockReference(BB);