1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the parsing of machine instructions.
12 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/StringMap.h"
17 #include "llvm/AsmParser/SlotMapping.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineInstr.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/IR/Module.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include "llvm/Support/SourceMgr.h"
25 #include "llvm/Target/TargetSubtargetInfo.h"
26 #include "llvm/Target/TargetInstrInfo.h"
36 StringRef Source, CurrentSource;
38 /// Maps from basic block numbers to MBBs.
39 const DenseMap<unsigned, MachineBasicBlock *> &MBBSlots;
40 /// Maps from indices to unnamed global values and metadata nodes.
41 const SlotMapping &IRSlots;
42 /// Maps from instruction names to op codes.
43 StringMap<unsigned> Names2InstrOpCodes;
44 /// Maps from register names to registers.
45 StringMap<unsigned> Names2Regs;
46 /// Maps from register mask names to register masks.
47 StringMap<const uint32_t *> Names2RegMasks;
50 MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
52 const DenseMap<unsigned, MachineBasicBlock *> &MBBSlots,
53 const SlotMapping &IRSlots);
57 /// Report an error at the current location with the given message.
59 /// This function always return true.
60 bool error(const Twine &Msg);
62 /// Report an error at the given location with the given message.
64 /// This function always return true.
65 bool error(StringRef::iterator Loc, const Twine &Msg);
67 bool parse(MachineInstr *&MI);
68 bool parseMBB(MachineBasicBlock *&MBB);
70 bool parseRegister(unsigned &Reg);
71 bool parseRegisterFlag(unsigned &Flags);
72 bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
73 bool parseImmediateOperand(MachineOperand &Dest);
74 bool parseMBBReference(MachineBasicBlock *&MBB);
75 bool parseMBBOperand(MachineOperand &Dest);
76 bool parseGlobalAddressOperand(MachineOperand &Dest);
77 bool parseMachineOperand(MachineOperand &Dest);
80 /// Convert the integer literal in the current token into an unsigned integer.
82 /// Return true if an error occurred.
83 bool getUnsigned(unsigned &Result);
85 void initNames2InstrOpCodes();
87 /// Try to convert an instruction name to an opcode. Return true if the
88 /// instruction name is invalid.
89 bool parseInstrName(StringRef InstrName, unsigned &OpCode);
91 bool parseInstruction(unsigned &OpCode);
93 void initNames2Regs();
95 /// Try to convert a register name to a register number. Return true if the
96 /// register name is invalid.
97 bool getRegisterByName(StringRef RegName, unsigned &Reg);
99 void initNames2RegMasks();
101 /// Check if the given identifier is a name of a register mask.
103 /// Return null if the identifier isn't a register mask.
104 const uint32_t *getRegMask(StringRef Identifier);
107 } // end anonymous namespace
109 MIParser::MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
111 const DenseMap<unsigned, MachineBasicBlock *> &MBBSlots,
112 const SlotMapping &IRSlots)
113 : SM(SM), MF(MF), Error(Error), Source(Source), CurrentSource(Source),
114 Token(MIToken::Error, StringRef()), MBBSlots(MBBSlots), IRSlots(IRSlots) {
117 void MIParser::lex() {
118 CurrentSource = lexMIToken(
119 CurrentSource, Token,
120 [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
123 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
125 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
126 // TODO: Get the proper location in the MIR file, not just a location inside
128 assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
129 Error = SMDiagnostic(
131 SM.getMemoryBuffer(SM.getMainFileID())->getBufferIdentifier(), 1,
132 Loc - Source.data(), SourceMgr::DK_Error, Msg.str(), Source, None, None);
136 bool MIParser::parse(MachineInstr *&MI) {
139 // Parse any register operands before '='
140 // TODO: Allow parsing of multiple operands before '='
141 MachineOperand MO = MachineOperand::CreateImm(0);
142 SmallVector<MachineOperand, 8> Operands;
143 if (Token.isRegister() || Token.isRegisterFlag()) {
144 if (parseRegisterOperand(MO, /*IsDef=*/true))
146 Operands.push_back(MO);
147 if (Token.isNot(MIToken::equal))
148 return error("expected '='");
153 if (Token.isError() || parseInstruction(OpCode))
156 // TODO: Parse the instruction flags and memory operands.
158 // Parse the remaining machine operands.
159 while (Token.isNot(MIToken::Eof)) {
160 if (parseMachineOperand(MO))
162 Operands.push_back(MO);
163 if (Token.is(MIToken::Eof))
165 if (Token.isNot(MIToken::comma))
166 return error("expected ',' before the next machine operand");
170 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
172 // TODO: Check for extraneous machine operands.
173 // TODO: Check that this instruction has the implicit register operands.
174 MI = MF.CreateMachineInstr(MCID, DebugLoc(), /*NoImplicit=*/true);
175 for (const auto &Operand : Operands)
176 MI->addOperand(MF, Operand);
180 bool MIParser::parseMBB(MachineBasicBlock *&MBB) {
182 if (Token.isNot(MIToken::MachineBasicBlock))
183 return error("expected a machine basic block reference");
184 if (parseMBBReference(MBB))
187 if (Token.isNot(MIToken::Eof))
189 "expected end of string after the machine basic block reference");
193 bool MIParser::parseInstruction(unsigned &OpCode) {
194 if (Token.isNot(MIToken::Identifier))
195 return error("expected a machine instruction");
196 StringRef InstrName = Token.stringValue();
197 if (parseInstrName(InstrName, OpCode))
198 return error(Twine("unknown machine instruction name '") + InstrName + "'");
203 bool MIParser::parseRegister(unsigned &Reg) {
204 switch (Token.kind()) {
205 case MIToken::underscore:
208 case MIToken::NamedRegister: {
209 StringRef Name = Token.stringValue();
210 if (getRegisterByName(Name, Reg))
211 return error(Twine("unknown register name '") + Name + "'");
214 // TODO: Parse other register kinds.
216 llvm_unreachable("The current token should be a register");
221 bool MIParser::parseRegisterFlag(unsigned &Flags) {
222 switch (Token.kind()) {
223 case MIToken::kw_implicit:
224 Flags |= RegState::Implicit;
226 case MIToken::kw_implicit_define:
227 Flags |= RegState::ImplicitDefine;
229 // TODO: report an error when we specify the same flag more than once.
230 // TODO: parse the other register flags.
232 llvm_unreachable("The current token should be a register flag");
238 bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
240 unsigned Flags = IsDef ? RegState::Define : 0;
241 while (Token.isRegisterFlag()) {
242 if (parseRegisterFlag(Flags))
245 if (!Token.isRegister())
246 return error("expected a register after register flags");
247 if (parseRegister(Reg))
250 // TODO: Parse subregister.
251 Dest = MachineOperand::CreateReg(Reg, Flags & RegState::Define,
252 Flags & RegState::Implicit);
256 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
257 assert(Token.is(MIToken::IntegerLiteral));
258 const APSInt &Int = Token.integerValue();
259 if (Int.getMinSignedBits() > 64)
260 // TODO: Replace this with an error when we can parse CIMM Machine Operands.
261 llvm_unreachable("Can't parse large integer literals yet!");
262 Dest = MachineOperand::CreateImm(Int.getExtValue());
267 bool MIParser::getUnsigned(unsigned &Result) {
268 assert(Token.hasIntegerValue() && "Expected a token with an integer value");
269 const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
270 uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
272 return error("expected 32-bit integer (too large)");
277 bool MIParser::parseMBBReference(MachineBasicBlock *&MBB) {
278 assert(Token.is(MIToken::MachineBasicBlock));
280 if (getUnsigned(Number))
282 auto MBBInfo = MBBSlots.find(Number);
283 if (MBBInfo == MBBSlots.end())
284 return error(Twine("use of undefined machine basic block #") +
286 MBB = MBBInfo->second;
287 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
288 return error(Twine("the name of machine basic block #") + Twine(Number) +
289 " isn't '" + Token.stringValue() + "'");
293 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
294 MachineBasicBlock *MBB;
295 if (parseMBBReference(MBB))
297 Dest = MachineOperand::CreateMBB(MBB);
302 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
303 switch (Token.kind()) {
304 case MIToken::NamedGlobalValue: {
305 auto Name = Token.stringValue();
306 const Module *M = MF.getFunction()->getParent();
307 if (const auto *GV = M->getNamedValue(Name)) {
308 Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
311 return error(Twine("use of undefined global value '@") + Name + "'");
313 case MIToken::GlobalValue: {
315 if (getUnsigned(GVIdx))
317 if (GVIdx >= IRSlots.GlobalValues.size())
318 return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
320 Dest = MachineOperand::CreateGA(IRSlots.GlobalValues[GVIdx],
325 llvm_unreachable("The current token should be a global value");
327 // TODO: Parse offset and target flags.
332 bool MIParser::parseMachineOperand(MachineOperand &Dest) {
333 switch (Token.kind()) {
334 case MIToken::kw_implicit:
335 case MIToken::kw_implicit_define:
336 case MIToken::underscore:
337 case MIToken::NamedRegister:
338 return parseRegisterOperand(Dest);
339 case MIToken::IntegerLiteral:
340 return parseImmediateOperand(Dest);
341 case MIToken::MachineBasicBlock:
342 return parseMBBOperand(Dest);
343 case MIToken::GlobalValue:
344 case MIToken::NamedGlobalValue:
345 return parseGlobalAddressOperand(Dest);
348 case MIToken::Identifier:
349 if (const auto *RegMask = getRegMask(Token.stringValue())) {
350 Dest = MachineOperand::CreateRegMask(RegMask);
356 // TODO: parse the other machine operands.
357 return error("expected a machine operand");
362 void MIParser::initNames2InstrOpCodes() {
363 if (!Names2InstrOpCodes.empty())
365 const auto *TII = MF.getSubtarget().getInstrInfo();
366 assert(TII && "Expected target instruction info");
367 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
368 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
371 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
372 initNames2InstrOpCodes();
373 auto InstrInfo = Names2InstrOpCodes.find(InstrName);
374 if (InstrInfo == Names2InstrOpCodes.end())
376 OpCode = InstrInfo->getValue();
380 void MIParser::initNames2Regs() {
381 if (!Names2Regs.empty())
383 // The '%noreg' register is the register 0.
384 Names2Regs.insert(std::make_pair("noreg", 0));
385 const auto *TRI = MF.getSubtarget().getRegisterInfo();
386 assert(TRI && "Expected target register info");
387 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
389 Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
392 assert(WasInserted && "Expected registers to be unique case-insensitively");
396 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) {
398 auto RegInfo = Names2Regs.find(RegName);
399 if (RegInfo == Names2Regs.end())
401 Reg = RegInfo->getValue();
405 void MIParser::initNames2RegMasks() {
406 if (!Names2RegMasks.empty())
408 const auto *TRI = MF.getSubtarget().getRegisterInfo();
409 assert(TRI && "Expected target register info");
410 ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
411 ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
412 assert(RegMasks.size() == RegMaskNames.size());
413 for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
414 Names2RegMasks.insert(
415 std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
418 const uint32_t *MIParser::getRegMask(StringRef Identifier) {
419 initNames2RegMasks();
420 auto RegMaskInfo = Names2RegMasks.find(Identifier);
421 if (RegMaskInfo == Names2RegMasks.end())
423 return RegMaskInfo->getValue();
426 bool llvm::parseMachineInstr(
427 MachineInstr *&MI, SourceMgr &SM, MachineFunction &MF, StringRef Src,
428 const DenseMap<unsigned, MachineBasicBlock *> &MBBSlots,
429 const SlotMapping &IRSlots, SMDiagnostic &Error) {
430 return MIParser(SM, MF, Error, Src, MBBSlots, IRSlots).parse(MI);
433 bool llvm::parseMBBReference(
434 MachineBasicBlock *&MBB, SourceMgr &SM, MachineFunction &MF, StringRef Src,
435 const DenseMap<unsigned, MachineBasicBlock *> &MBBSlots,
436 const SlotMapping &IRSlots, SMDiagnostic &Error) {
437 return MIParser(SM, MF, Error, Src, MBBSlots, IRSlots).parseMBB(MBB);