1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the parsing of machine instructions.
12 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/StringMap.h"
17 #include "llvm/AsmParser/SlotMapping.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/IR/Instructions.h"
25 #include "llvm/IR/Module.h"
26 #include "llvm/Support/raw_ostream.h"
27 #include "llvm/Support/SourceMgr.h"
28 #include "llvm/Target/TargetSubtargetInfo.h"
29 #include "llvm/Target/TargetInstrInfo.h"
35 struct StringValueUtility {
37 std::string UnescapedString;
39 StringValueUtility(const MIToken &Token) {
40 if (Token.isStringValueQuoted()) {
41 Token.unescapeQuotedStringValue(UnescapedString);
42 String = UnescapedString;
45 String = Token.stringValue();
48 operator StringRef() const { return String; }
51 /// A wrapper struct around the 'MachineOperand' struct that includes a source
53 struct MachineOperandWithLocation {
54 MachineOperand Operand;
55 StringRef::iterator Begin;
56 StringRef::iterator End;
58 MachineOperandWithLocation(const MachineOperand &Operand,
59 StringRef::iterator Begin, StringRef::iterator End)
60 : Operand(Operand), Begin(Begin), End(End) {}
67 StringRef Source, CurrentSource;
69 const PerFunctionMIParsingState &PFS;
70 /// Maps from indices to unnamed global values and metadata nodes.
71 const SlotMapping &IRSlots;
72 /// Maps from instruction names to op codes.
73 StringMap<unsigned> Names2InstrOpCodes;
74 /// Maps from register names to registers.
75 StringMap<unsigned> Names2Regs;
76 /// Maps from register mask names to register masks.
77 StringMap<const uint32_t *> Names2RegMasks;
78 /// Maps from subregister names to subregister indices.
79 StringMap<unsigned> Names2SubRegIndices;
82 MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
83 StringRef Source, const PerFunctionMIParsingState &PFS,
84 const SlotMapping &IRSlots);
88 /// Report an error at the current location with the given message.
90 /// This function always return true.
91 bool error(const Twine &Msg);
93 /// Report an error at the given location with the given message.
95 /// This function always return true.
96 bool error(StringRef::iterator Loc, const Twine &Msg);
98 bool parse(MachineInstr *&MI);
99 bool parseMBB(MachineBasicBlock *&MBB);
100 bool parseNamedRegister(unsigned &Reg);
102 bool parseRegister(unsigned &Reg);
103 bool parseRegisterFlag(unsigned &Flags);
104 bool parseSubRegisterIndex(unsigned &SubReg);
105 bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
106 bool parseImmediateOperand(MachineOperand &Dest);
107 bool parseMBBReference(MachineBasicBlock *&MBB);
108 bool parseMBBOperand(MachineOperand &Dest);
109 bool parseStackObjectOperand(MachineOperand &Dest);
110 bool parseFixedStackObjectOperand(MachineOperand &Dest);
111 bool parseGlobalAddressOperand(MachineOperand &Dest);
112 bool parseConstantPoolIndexOperand(MachineOperand &Dest);
113 bool parseJumpTableIndexOperand(MachineOperand &Dest);
114 bool parseExternalSymbolOperand(MachineOperand &Dest);
115 bool parseCFIOffset(int &Offset);
116 bool parseCFIOperand(MachineOperand &Dest);
117 bool parseMachineOperand(MachineOperand &Dest);
120 /// Convert the integer literal in the current token into an unsigned integer.
122 /// Return true if an error occurred.
123 bool getUnsigned(unsigned &Result);
125 void initNames2InstrOpCodes();
127 /// Try to convert an instruction name to an opcode. Return true if the
128 /// instruction name is invalid.
129 bool parseInstrName(StringRef InstrName, unsigned &OpCode);
131 bool parseInstruction(unsigned &OpCode, unsigned &Flags);
133 bool verifyImplicitOperands(ArrayRef<MachineOperandWithLocation> Operands,
134 const MCInstrDesc &MCID);
136 void initNames2Regs();
138 /// Try to convert a register name to a register number. Return true if the
139 /// register name is invalid.
140 bool getRegisterByName(StringRef RegName, unsigned &Reg);
142 void initNames2RegMasks();
144 /// Check if the given identifier is a name of a register mask.
146 /// Return null if the identifier isn't a register mask.
147 const uint32_t *getRegMask(StringRef Identifier);
149 void initNames2SubRegIndices();
151 /// Check if the given identifier is a name of a subregister index.
153 /// Return 0 if the name isn't a subregister index class.
154 unsigned getSubRegIndex(StringRef Name);
157 } // end anonymous namespace
159 MIParser::MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
160 StringRef Source, const PerFunctionMIParsingState &PFS,
161 const SlotMapping &IRSlots)
162 : SM(SM), MF(MF), Error(Error), Source(Source), CurrentSource(Source),
163 Token(MIToken::Error, StringRef()), PFS(PFS), IRSlots(IRSlots) {}
165 void MIParser::lex() {
166 CurrentSource = lexMIToken(
167 CurrentSource, Token,
168 [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
171 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
173 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
174 assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
175 Error = SMDiagnostic(
177 SM.getMemoryBuffer(SM.getMainFileID())->getBufferIdentifier(), 1,
178 Loc - Source.data(), SourceMgr::DK_Error, Msg.str(), Source, None, None);
182 bool MIParser::parse(MachineInstr *&MI) {
185 // Parse any register operands before '='
186 // TODO: Allow parsing of multiple operands before '='
187 MachineOperand MO = MachineOperand::CreateImm(0);
188 SmallVector<MachineOperandWithLocation, 8> Operands;
189 if (Token.isRegister() || Token.isRegisterFlag()) {
190 auto Loc = Token.location();
191 if (parseRegisterOperand(MO, /*IsDef=*/true))
193 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
194 if (Token.isNot(MIToken::equal))
195 return error("expected '='");
199 unsigned OpCode, Flags = 0;
200 if (Token.isError() || parseInstruction(OpCode, Flags))
203 // TODO: Parse the bundle instruction flags and memory operands.
205 // Parse the remaining machine operands.
206 while (Token.isNot(MIToken::Eof)) {
207 auto Loc = Token.location();
208 if (parseMachineOperand(MO))
210 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
211 if (Token.is(MIToken::Eof))
213 if (Token.isNot(MIToken::comma))
214 return error("expected ',' before the next machine operand");
218 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
219 if (!MCID.isVariadic()) {
220 // FIXME: Move the implicit operand verification to the machine verifier.
221 if (verifyImplicitOperands(Operands, MCID))
225 // TODO: Check for extraneous machine operands.
226 MI = MF.CreateMachineInstr(MCID, DebugLoc(), /*NoImplicit=*/true);
228 for (const auto &Operand : Operands)
229 MI->addOperand(MF, Operand.Operand);
233 bool MIParser::parseMBB(MachineBasicBlock *&MBB) {
235 if (Token.isNot(MIToken::MachineBasicBlock))
236 return error("expected a machine basic block reference");
237 if (parseMBBReference(MBB))
240 if (Token.isNot(MIToken::Eof))
242 "expected end of string after the machine basic block reference");
246 bool MIParser::parseNamedRegister(unsigned &Reg) {
248 if (Token.isNot(MIToken::NamedRegister))
249 return error("expected a named register");
250 if (parseRegister(Reg))
253 if (Token.isNot(MIToken::Eof))
254 return error("expected end of string after the register reference");
258 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
259 assert(MO.isImplicit());
260 return MO.isDef() ? "implicit-def" : "implicit";
263 static std::string getRegisterName(const TargetRegisterInfo *TRI,
265 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "expected phys reg");
266 return StringRef(TRI->getName(Reg)).lower();
269 bool MIParser::verifyImplicitOperands(
270 ArrayRef<MachineOperandWithLocation> Operands, const MCInstrDesc &MCID) {
272 // We can't verify call instructions as they can contain arbitrary implicit
273 // register and register mask operands.
276 // Gather all the expected implicit operands.
277 SmallVector<MachineOperand, 4> ImplicitOperands;
278 if (MCID.ImplicitDefs)
279 for (const uint16_t *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
280 ImplicitOperands.push_back(
281 MachineOperand::CreateReg(*ImpDefs, true, true));
282 if (MCID.ImplicitUses)
283 for (const uint16_t *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
284 ImplicitOperands.push_back(
285 MachineOperand::CreateReg(*ImpUses, false, true));
287 const auto *TRI = MF.getSubtarget().getRegisterInfo();
288 assert(TRI && "Expected target register info");
289 size_t I = ImplicitOperands.size(), J = Operands.size();
294 const auto &ImplicitOperand = ImplicitOperands[I];
295 const auto &Operand = Operands[J].Operand;
296 if (ImplicitOperand.isIdenticalTo(Operand))
298 if (Operand.isReg() && Operand.isImplicit()) {
299 return error(Operands[J].Begin,
300 Twine("expected an implicit register operand '") +
301 printImplicitRegisterFlag(ImplicitOperand) + " %" +
302 getRegisterName(TRI, ImplicitOperand.getReg()) + "'");
305 // TODO: Fix source location when Operands[J].end is right before '=', i.e:
306 // insead of reporting an error at this location:
309 // report the error at the following location:
312 return error(J < Operands.size() ? Operands[J].End : Token.location(),
313 Twine("missing implicit register operand '") +
314 printImplicitRegisterFlag(ImplicitOperands[I]) + " %" +
315 getRegisterName(TRI, ImplicitOperands[I].getReg()) + "'");
320 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
321 if (Token.is(MIToken::kw_frame_setup)) {
322 Flags |= MachineInstr::FrameSetup;
325 if (Token.isNot(MIToken::Identifier))
326 return error("expected a machine instruction");
327 StringRef InstrName = Token.stringValue();
328 if (parseInstrName(InstrName, OpCode))
329 return error(Twine("unknown machine instruction name '") + InstrName + "'");
334 bool MIParser::parseRegister(unsigned &Reg) {
335 switch (Token.kind()) {
336 case MIToken::underscore:
339 case MIToken::NamedRegister: {
340 StringRef Name = Token.stringValue();
341 if (getRegisterByName(Name, Reg))
342 return error(Twine("unknown register name '") + Name + "'");
345 case MIToken::VirtualRegister: {
349 const auto RegInfo = PFS.VirtualRegisterSlots.find(ID);
350 if (RegInfo == PFS.VirtualRegisterSlots.end())
351 return error(Twine("use of undefined virtual register '%") + Twine(ID) +
353 Reg = RegInfo->second;
356 // TODO: Parse other register kinds.
358 llvm_unreachable("The current token should be a register");
363 bool MIParser::parseRegisterFlag(unsigned &Flags) {
364 switch (Token.kind()) {
365 case MIToken::kw_implicit:
366 Flags |= RegState::Implicit;
368 case MIToken::kw_implicit_define:
369 Flags |= RegState::ImplicitDefine;
371 case MIToken::kw_dead:
372 Flags |= RegState::Dead;
374 case MIToken::kw_killed:
375 Flags |= RegState::Kill;
377 case MIToken::kw_undef:
378 Flags |= RegState::Undef;
380 // TODO: report an error when we specify the same flag more than once.
381 // TODO: parse the other register flags.
383 llvm_unreachable("The current token should be a register flag");
389 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
390 assert(Token.is(MIToken::colon));
392 if (Token.isNot(MIToken::Identifier))
393 return error("expected a subregister index after ':'");
394 auto Name = Token.stringValue();
395 SubReg = getSubRegIndex(Name);
397 return error(Twine("use of unknown subregister index '") + Name + "'");
402 bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
404 unsigned Flags = IsDef ? RegState::Define : 0;
405 while (Token.isRegisterFlag()) {
406 if (parseRegisterFlag(Flags))
409 if (!Token.isRegister())
410 return error("expected a register after register flags");
411 if (parseRegister(Reg))
415 if (Token.is(MIToken::colon)) {
416 if (parseSubRegisterIndex(SubReg))
419 Dest = MachineOperand::CreateReg(
420 Reg, Flags & RegState::Define, Flags & RegState::Implicit,
421 Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
422 /*isEarlyClobber=*/false, SubReg);
426 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
427 assert(Token.is(MIToken::IntegerLiteral));
428 const APSInt &Int = Token.integerValue();
429 if (Int.getMinSignedBits() > 64)
430 // TODO: Replace this with an error when we can parse CIMM Machine Operands.
431 llvm_unreachable("Can't parse large integer literals yet!");
432 Dest = MachineOperand::CreateImm(Int.getExtValue());
437 bool MIParser::getUnsigned(unsigned &Result) {
438 assert(Token.hasIntegerValue() && "Expected a token with an integer value");
439 const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
440 uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
442 return error("expected 32-bit integer (too large)");
447 bool MIParser::parseMBBReference(MachineBasicBlock *&MBB) {
448 assert(Token.is(MIToken::MachineBasicBlock));
450 if (getUnsigned(Number))
452 auto MBBInfo = PFS.MBBSlots.find(Number);
453 if (MBBInfo == PFS.MBBSlots.end())
454 return error(Twine("use of undefined machine basic block #") +
456 MBB = MBBInfo->second;
457 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
458 return error(Twine("the name of machine basic block #") + Twine(Number) +
459 " isn't '" + Token.stringValue() + "'");
463 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
464 MachineBasicBlock *MBB;
465 if (parseMBBReference(MBB))
467 Dest = MachineOperand::CreateMBB(MBB);
472 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
473 assert(Token.is(MIToken::StackObject));
477 auto ObjectInfo = PFS.StackObjectSlots.find(ID);
478 if (ObjectInfo == PFS.StackObjectSlots.end())
479 return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
482 if (const auto *Alloca =
483 MF.getFrameInfo()->getObjectAllocation(ObjectInfo->second))
484 Name = Alloca->getName();
485 if (!Token.stringValue().empty() && Token.stringValue() != Name)
486 return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
487 "' isn't '" + Token.stringValue() + "'");
489 Dest = MachineOperand::CreateFI(ObjectInfo->second);
493 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
494 assert(Token.is(MIToken::FixedStackObject));
498 auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
499 if (ObjectInfo == PFS.FixedStackObjectSlots.end())
500 return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
503 Dest = MachineOperand::CreateFI(ObjectInfo->second);
507 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
508 switch (Token.kind()) {
509 case MIToken::NamedGlobalValue:
510 case MIToken::QuotedNamedGlobalValue: {
511 StringValueUtility Name(Token);
512 const Module *M = MF.getFunction()->getParent();
513 if (const auto *GV = M->getNamedValue(Name)) {
514 Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
517 return error(Twine("use of undefined global value '@") +
518 Token.rawStringValue() + "'");
520 case MIToken::GlobalValue: {
522 if (getUnsigned(GVIdx))
524 if (GVIdx >= IRSlots.GlobalValues.size())
525 return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
527 Dest = MachineOperand::CreateGA(IRSlots.GlobalValues[GVIdx],
532 llvm_unreachable("The current token should be a global value");
534 // TODO: Parse offset and target flags.
539 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
540 assert(Token.is(MIToken::ConstantPoolItem));
544 auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
545 if (ConstantInfo == PFS.ConstantPoolSlots.end())
546 return error("use of undefined constant '%const." + Twine(ID) + "'");
548 // TODO: Parse offset and target flags.
549 Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
553 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
554 assert(Token.is(MIToken::JumpTableIndex));
558 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
559 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
560 return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
562 // TODO: Parse target flags.
563 Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
567 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
568 assert(Token.is(MIToken::ExternalSymbol) ||
569 Token.is(MIToken::QuotedExternalSymbol));
570 StringValueUtility Name(Token);
571 const char *Symbol = MF.createExternalSymbolName(Name);
573 // TODO: Parse the target flags.
574 Dest = MachineOperand::CreateES(Symbol);
578 bool MIParser::parseCFIOffset(int &Offset) {
579 if (Token.isNot(MIToken::IntegerLiteral))
580 return error("expected a cfi offset");
581 if (Token.integerValue().getMinSignedBits() > 32)
582 return error("expected a 32 bit integer (the cfi offset is too large)");
583 Offset = (int)Token.integerValue().getExtValue();
588 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
589 // TODO: Parse the other CFI operands.
590 assert(Token.is(MIToken::kw_cfi_def_cfa_offset));
593 if (parseCFIOffset(Offset))
595 // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
596 Dest = MachineOperand::CreateCFIIndex(MF.getMMI().addFrameInst(
597 MCCFIInstruction::createDefCfaOffset(nullptr, -Offset)));
601 bool MIParser::parseMachineOperand(MachineOperand &Dest) {
602 switch (Token.kind()) {
603 case MIToken::kw_implicit:
604 case MIToken::kw_implicit_define:
605 case MIToken::kw_dead:
606 case MIToken::kw_killed:
607 case MIToken::kw_undef:
608 case MIToken::underscore:
609 case MIToken::NamedRegister:
610 case MIToken::VirtualRegister:
611 return parseRegisterOperand(Dest);
612 case MIToken::IntegerLiteral:
613 return parseImmediateOperand(Dest);
614 case MIToken::MachineBasicBlock:
615 return parseMBBOperand(Dest);
616 case MIToken::StackObject:
617 return parseStackObjectOperand(Dest);
618 case MIToken::FixedStackObject:
619 return parseFixedStackObjectOperand(Dest);
620 case MIToken::GlobalValue:
621 case MIToken::NamedGlobalValue:
622 case MIToken::QuotedNamedGlobalValue:
623 return parseGlobalAddressOperand(Dest);
624 case MIToken::ConstantPoolItem:
625 return parseConstantPoolIndexOperand(Dest);
626 case MIToken::JumpTableIndex:
627 return parseJumpTableIndexOperand(Dest);
628 case MIToken::ExternalSymbol:
629 case MIToken::QuotedExternalSymbol:
630 return parseExternalSymbolOperand(Dest);
631 case MIToken::kw_cfi_def_cfa_offset:
632 return parseCFIOperand(Dest);
635 case MIToken::Identifier:
636 if (const auto *RegMask = getRegMask(Token.stringValue())) {
637 Dest = MachineOperand::CreateRegMask(RegMask);
643 // TODO: parse the other machine operands.
644 return error("expected a machine operand");
649 void MIParser::initNames2InstrOpCodes() {
650 if (!Names2InstrOpCodes.empty())
652 const auto *TII = MF.getSubtarget().getInstrInfo();
653 assert(TII && "Expected target instruction info");
654 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
655 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
658 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
659 initNames2InstrOpCodes();
660 auto InstrInfo = Names2InstrOpCodes.find(InstrName);
661 if (InstrInfo == Names2InstrOpCodes.end())
663 OpCode = InstrInfo->getValue();
667 void MIParser::initNames2Regs() {
668 if (!Names2Regs.empty())
670 // The '%noreg' register is the register 0.
671 Names2Regs.insert(std::make_pair("noreg", 0));
672 const auto *TRI = MF.getSubtarget().getRegisterInfo();
673 assert(TRI && "Expected target register info");
674 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
676 Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
679 assert(WasInserted && "Expected registers to be unique case-insensitively");
683 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) {
685 auto RegInfo = Names2Regs.find(RegName);
686 if (RegInfo == Names2Regs.end())
688 Reg = RegInfo->getValue();
692 void MIParser::initNames2RegMasks() {
693 if (!Names2RegMasks.empty())
695 const auto *TRI = MF.getSubtarget().getRegisterInfo();
696 assert(TRI && "Expected target register info");
697 ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
698 ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
699 assert(RegMasks.size() == RegMaskNames.size());
700 for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
701 Names2RegMasks.insert(
702 std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
705 const uint32_t *MIParser::getRegMask(StringRef Identifier) {
706 initNames2RegMasks();
707 auto RegMaskInfo = Names2RegMasks.find(Identifier);
708 if (RegMaskInfo == Names2RegMasks.end())
710 return RegMaskInfo->getValue();
713 void MIParser::initNames2SubRegIndices() {
714 if (!Names2SubRegIndices.empty())
716 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
717 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
718 Names2SubRegIndices.insert(
719 std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I));
722 unsigned MIParser::getSubRegIndex(StringRef Name) {
723 initNames2SubRegIndices();
724 auto SubRegInfo = Names2SubRegIndices.find(Name);
725 if (SubRegInfo == Names2SubRegIndices.end())
727 return SubRegInfo->getValue();
730 bool llvm::parseMachineInstr(MachineInstr *&MI, SourceMgr &SM,
731 MachineFunction &MF, StringRef Src,
732 const PerFunctionMIParsingState &PFS,
733 const SlotMapping &IRSlots, SMDiagnostic &Error) {
734 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parse(MI);
737 bool llvm::parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM,
738 MachineFunction &MF, StringRef Src,
739 const PerFunctionMIParsingState &PFS,
740 const SlotMapping &IRSlots, SMDiagnostic &Error) {
741 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseMBB(MBB);
744 bool llvm::parseNamedRegisterReference(unsigned &Reg, SourceMgr &SM,
745 MachineFunction &MF, StringRef Src,
746 const PerFunctionMIParsingState &PFS,
747 const SlotMapping &IRSlots,
748 SMDiagnostic &Error) {
749 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseNamedRegister(Reg);