1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the parsing of machine instructions.
12 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/StringMap.h"
17 #include "llvm/AsmParser/SlotMapping.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/IR/Instructions.h"
25 #include "llvm/IR/Module.h"
26 #include "llvm/IR/ModuleSlotTracker.h"
27 #include "llvm/Support/raw_ostream.h"
28 #include "llvm/Support/SourceMgr.h"
29 #include "llvm/Target/TargetSubtargetInfo.h"
30 #include "llvm/Target/TargetInstrInfo.h"
36 struct StringValueUtility {
38 std::string UnescapedString;
40 StringValueUtility(const MIToken &Token) {
41 if (Token.isStringValueQuoted()) {
42 Token.unescapeQuotedStringValue(UnescapedString);
43 String = UnescapedString;
46 String = Token.stringValue();
49 operator StringRef() const { return String; }
52 /// A wrapper struct around the 'MachineOperand' struct that includes a source
54 struct MachineOperandWithLocation {
55 MachineOperand Operand;
56 StringRef::iterator Begin;
57 StringRef::iterator End;
59 MachineOperandWithLocation(const MachineOperand &Operand,
60 StringRef::iterator Begin, StringRef::iterator End)
61 : Operand(Operand), Begin(Begin), End(End) {}
68 StringRef Source, CurrentSource;
70 const PerFunctionMIParsingState &PFS;
71 /// Maps from indices to unnamed global values and metadata nodes.
72 const SlotMapping &IRSlots;
73 /// Maps from instruction names to op codes.
74 StringMap<unsigned> Names2InstrOpCodes;
75 /// Maps from register names to registers.
76 StringMap<unsigned> Names2Regs;
77 /// Maps from register mask names to register masks.
78 StringMap<const uint32_t *> Names2RegMasks;
79 /// Maps from subregister names to subregister indices.
80 StringMap<unsigned> Names2SubRegIndices;
81 /// Maps from slot numbers to function's unnamed basic blocks.
82 DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
85 MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
86 StringRef Source, const PerFunctionMIParsingState &PFS,
87 const SlotMapping &IRSlots);
91 /// Report an error at the current location with the given message.
93 /// This function always return true.
94 bool error(const Twine &Msg);
96 /// Report an error at the given location with the given message.
98 /// This function always return true.
99 bool error(StringRef::iterator Loc, const Twine &Msg);
101 bool parse(MachineInstr *&MI);
102 bool parseStandaloneMBB(MachineBasicBlock *&MBB);
103 bool parseStandaloneNamedRegister(unsigned &Reg);
104 bool parseStandaloneVirtualRegister(unsigned &Reg);
105 bool parseStandaloneIRBlockReference(const BasicBlock *&BB);
107 bool parseRegister(unsigned &Reg);
108 bool parseRegisterFlag(unsigned &Flags);
109 bool parseSubRegisterIndex(unsigned &SubReg);
110 bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
111 bool parseImmediateOperand(MachineOperand &Dest);
112 bool parseMBBReference(MachineBasicBlock *&MBB);
113 bool parseMBBOperand(MachineOperand &Dest);
114 bool parseStackObjectOperand(MachineOperand &Dest);
115 bool parseFixedStackObjectOperand(MachineOperand &Dest);
116 bool parseGlobalAddressOperand(MachineOperand &Dest);
117 bool parseConstantPoolIndexOperand(MachineOperand &Dest);
118 bool parseJumpTableIndexOperand(MachineOperand &Dest);
119 bool parseExternalSymbolOperand(MachineOperand &Dest);
120 bool parseMDNode(MDNode *&Node);
121 bool parseMetadataOperand(MachineOperand &Dest);
122 bool parseCFIOffset(int &Offset);
123 bool parseCFIRegister(unsigned &Reg);
124 bool parseCFIOperand(MachineOperand &Dest);
125 bool parseMachineOperand(MachineOperand &Dest);
128 /// Convert the integer literal in the current token into an unsigned integer.
130 /// Return true if an error occurred.
131 bool getUnsigned(unsigned &Result);
133 /// If the current token is of the given kind, consume it and return false.
134 /// Otherwise report an error and return true.
135 bool expectAndConsume(MIToken::TokenKind TokenKind);
137 void initNames2InstrOpCodes();
139 /// Try to convert an instruction name to an opcode. Return true if the
140 /// instruction name is invalid.
141 bool parseInstrName(StringRef InstrName, unsigned &OpCode);
143 bool parseInstruction(unsigned &OpCode, unsigned &Flags);
145 bool verifyImplicitOperands(ArrayRef<MachineOperandWithLocation> Operands,
146 const MCInstrDesc &MCID);
148 void initNames2Regs();
150 /// Try to convert a register name to a register number. Return true if the
151 /// register name is invalid.
152 bool getRegisterByName(StringRef RegName, unsigned &Reg);
154 void initNames2RegMasks();
156 /// Check if the given identifier is a name of a register mask.
158 /// Return null if the identifier isn't a register mask.
159 const uint32_t *getRegMask(StringRef Identifier);
161 void initNames2SubRegIndices();
163 /// Check if the given identifier is a name of a subregister index.
165 /// Return 0 if the name isn't a subregister index class.
166 unsigned getSubRegIndex(StringRef Name);
168 void initSlots2BasicBlocks();
170 const BasicBlock *getIRBlock(unsigned Slot);
173 } // end anonymous namespace
175 MIParser::MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
176 StringRef Source, const PerFunctionMIParsingState &PFS,
177 const SlotMapping &IRSlots)
178 : SM(SM), MF(MF), Error(Error), Source(Source), CurrentSource(Source),
179 Token(MIToken::Error, StringRef()), PFS(PFS), IRSlots(IRSlots) {}
181 void MIParser::lex() {
182 CurrentSource = lexMIToken(
183 CurrentSource, Token,
184 [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
187 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
189 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
190 assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
191 Error = SMDiagnostic(
193 SM.getMemoryBuffer(SM.getMainFileID())->getBufferIdentifier(), 1,
194 Loc - Source.data(), SourceMgr::DK_Error, Msg.str(), Source, None, None);
198 static const char *toString(MIToken::TokenKind TokenKind) {
203 return "<unknown token>";
207 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
208 if (Token.isNot(TokenKind))
209 return error(Twine("expected ") + toString(TokenKind));
214 bool MIParser::parse(MachineInstr *&MI) {
217 // Parse any register operands before '='
218 // TODO: Allow parsing of multiple operands before '='
219 MachineOperand MO = MachineOperand::CreateImm(0);
220 SmallVector<MachineOperandWithLocation, 8> Operands;
221 if (Token.isRegister() || Token.isRegisterFlag()) {
222 auto Loc = Token.location();
223 if (parseRegisterOperand(MO, /*IsDef=*/true))
225 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
226 if (Token.isNot(MIToken::equal))
227 return error("expected '='");
231 unsigned OpCode, Flags = 0;
232 if (Token.isError() || parseInstruction(OpCode, Flags))
235 // TODO: Parse the bundle instruction flags and memory operands.
237 // Parse the remaining machine operands.
238 while (Token.isNot(MIToken::Eof) && Token.isNot(MIToken::kw_debug_location)) {
239 auto Loc = Token.location();
240 if (parseMachineOperand(MO))
242 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
243 if (Token.is(MIToken::Eof))
245 if (Token.isNot(MIToken::comma))
246 return error("expected ',' before the next machine operand");
250 DebugLoc DebugLocation;
251 if (Token.is(MIToken::kw_debug_location)) {
253 if (Token.isNot(MIToken::exclaim))
254 return error("expected a metadata node after 'debug-location'");
255 MDNode *Node = nullptr;
256 if (parseMDNode(Node))
258 DebugLocation = DebugLoc(Node);
261 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
262 if (!MCID.isVariadic()) {
263 // FIXME: Move the implicit operand verification to the machine verifier.
264 if (verifyImplicitOperands(Operands, MCID))
268 // TODO: Check for extraneous machine operands.
269 MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
271 for (const auto &Operand : Operands)
272 MI->addOperand(MF, Operand.Operand);
276 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
278 if (Token.isNot(MIToken::MachineBasicBlock))
279 return error("expected a machine basic block reference");
280 if (parseMBBReference(MBB))
283 if (Token.isNot(MIToken::Eof))
285 "expected end of string after the machine basic block reference");
289 bool MIParser::parseStandaloneNamedRegister(unsigned &Reg) {
291 if (Token.isNot(MIToken::NamedRegister))
292 return error("expected a named register");
293 if (parseRegister(Reg))
296 if (Token.isNot(MIToken::Eof))
297 return error("expected end of string after the register reference");
301 bool MIParser::parseStandaloneVirtualRegister(unsigned &Reg) {
303 if (Token.isNot(MIToken::VirtualRegister))
304 return error("expected a virtual register");
305 if (parseRegister(Reg))
308 if (Token.isNot(MIToken::Eof))
309 return error("expected end of string after the register reference");
313 bool MIParser::parseStandaloneIRBlockReference(const BasicBlock *&BB) {
315 if (Token.isNot(MIToken::IRBlock))
316 return error("expected an IR block reference");
317 unsigned SlotNumber = 0;
318 if (getUnsigned(SlotNumber))
320 BB = getIRBlock(SlotNumber);
322 return error(Twine("use of undefined IR block '%ir-block.") +
323 Twine(SlotNumber) + "'");
325 if (Token.isNot(MIToken::Eof))
326 return error("expected end of string after the IR block reference");
330 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
331 assert(MO.isImplicit());
332 return MO.isDef() ? "implicit-def" : "implicit";
335 static std::string getRegisterName(const TargetRegisterInfo *TRI,
337 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "expected phys reg");
338 return StringRef(TRI->getName(Reg)).lower();
341 bool MIParser::verifyImplicitOperands(
342 ArrayRef<MachineOperandWithLocation> Operands, const MCInstrDesc &MCID) {
344 // We can't verify call instructions as they can contain arbitrary implicit
345 // register and register mask operands.
348 // Gather all the expected implicit operands.
349 SmallVector<MachineOperand, 4> ImplicitOperands;
350 if (MCID.ImplicitDefs)
351 for (const uint16_t *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
352 ImplicitOperands.push_back(
353 MachineOperand::CreateReg(*ImpDefs, true, true));
354 if (MCID.ImplicitUses)
355 for (const uint16_t *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
356 ImplicitOperands.push_back(
357 MachineOperand::CreateReg(*ImpUses, false, true));
359 const auto *TRI = MF.getSubtarget().getRegisterInfo();
360 assert(TRI && "Expected target register info");
361 size_t I = ImplicitOperands.size(), J = Operands.size();
366 const auto &ImplicitOperand = ImplicitOperands[I];
367 const auto &Operand = Operands[J].Operand;
368 if (ImplicitOperand.isIdenticalTo(Operand))
370 if (Operand.isReg() && Operand.isImplicit()) {
371 return error(Operands[J].Begin,
372 Twine("expected an implicit register operand '") +
373 printImplicitRegisterFlag(ImplicitOperand) + " %" +
374 getRegisterName(TRI, ImplicitOperand.getReg()) + "'");
377 // TODO: Fix source location when Operands[J].end is right before '=', i.e:
378 // insead of reporting an error at this location:
381 // report the error at the following location:
384 return error(J < Operands.size() ? Operands[J].End : Token.location(),
385 Twine("missing implicit register operand '") +
386 printImplicitRegisterFlag(ImplicitOperands[I]) + " %" +
387 getRegisterName(TRI, ImplicitOperands[I].getReg()) + "'");
392 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
393 if (Token.is(MIToken::kw_frame_setup)) {
394 Flags |= MachineInstr::FrameSetup;
397 if (Token.isNot(MIToken::Identifier))
398 return error("expected a machine instruction");
399 StringRef InstrName = Token.stringValue();
400 if (parseInstrName(InstrName, OpCode))
401 return error(Twine("unknown machine instruction name '") + InstrName + "'");
406 bool MIParser::parseRegister(unsigned &Reg) {
407 switch (Token.kind()) {
408 case MIToken::underscore:
411 case MIToken::NamedRegister: {
412 StringRef Name = Token.stringValue();
413 if (getRegisterByName(Name, Reg))
414 return error(Twine("unknown register name '") + Name + "'");
417 case MIToken::VirtualRegister: {
421 const auto RegInfo = PFS.VirtualRegisterSlots.find(ID);
422 if (RegInfo == PFS.VirtualRegisterSlots.end())
423 return error(Twine("use of undefined virtual register '%") + Twine(ID) +
425 Reg = RegInfo->second;
428 // TODO: Parse other register kinds.
430 llvm_unreachable("The current token should be a register");
435 bool MIParser::parseRegisterFlag(unsigned &Flags) {
436 switch (Token.kind()) {
437 case MIToken::kw_implicit:
438 Flags |= RegState::Implicit;
440 case MIToken::kw_implicit_define:
441 Flags |= RegState::ImplicitDefine;
443 case MIToken::kw_dead:
444 Flags |= RegState::Dead;
446 case MIToken::kw_killed:
447 Flags |= RegState::Kill;
449 case MIToken::kw_undef:
450 Flags |= RegState::Undef;
452 // TODO: report an error when we specify the same flag more than once.
453 // TODO: parse the other register flags.
455 llvm_unreachable("The current token should be a register flag");
461 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
462 assert(Token.is(MIToken::colon));
464 if (Token.isNot(MIToken::Identifier))
465 return error("expected a subregister index after ':'");
466 auto Name = Token.stringValue();
467 SubReg = getSubRegIndex(Name);
469 return error(Twine("use of unknown subregister index '") + Name + "'");
474 bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
476 unsigned Flags = IsDef ? RegState::Define : 0;
477 while (Token.isRegisterFlag()) {
478 if (parseRegisterFlag(Flags))
481 if (!Token.isRegister())
482 return error("expected a register after register flags");
483 if (parseRegister(Reg))
487 if (Token.is(MIToken::colon)) {
488 if (parseSubRegisterIndex(SubReg))
491 Dest = MachineOperand::CreateReg(
492 Reg, Flags & RegState::Define, Flags & RegState::Implicit,
493 Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
494 /*isEarlyClobber=*/false, SubReg);
498 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
499 assert(Token.is(MIToken::IntegerLiteral));
500 const APSInt &Int = Token.integerValue();
501 if (Int.getMinSignedBits() > 64)
502 // TODO: Replace this with an error when we can parse CIMM Machine Operands.
503 llvm_unreachable("Can't parse large integer literals yet!");
504 Dest = MachineOperand::CreateImm(Int.getExtValue());
509 bool MIParser::getUnsigned(unsigned &Result) {
510 assert(Token.hasIntegerValue() && "Expected a token with an integer value");
511 const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
512 uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
514 return error("expected 32-bit integer (too large)");
519 bool MIParser::parseMBBReference(MachineBasicBlock *&MBB) {
520 assert(Token.is(MIToken::MachineBasicBlock));
522 if (getUnsigned(Number))
524 auto MBBInfo = PFS.MBBSlots.find(Number);
525 if (MBBInfo == PFS.MBBSlots.end())
526 return error(Twine("use of undefined machine basic block #") +
528 MBB = MBBInfo->second;
529 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
530 return error(Twine("the name of machine basic block #") + Twine(Number) +
531 " isn't '" + Token.stringValue() + "'");
535 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
536 MachineBasicBlock *MBB;
537 if (parseMBBReference(MBB))
539 Dest = MachineOperand::CreateMBB(MBB);
544 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
545 assert(Token.is(MIToken::StackObject));
549 auto ObjectInfo = PFS.StackObjectSlots.find(ID);
550 if (ObjectInfo == PFS.StackObjectSlots.end())
551 return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
554 if (const auto *Alloca =
555 MF.getFrameInfo()->getObjectAllocation(ObjectInfo->second))
556 Name = Alloca->getName();
557 if (!Token.stringValue().empty() && Token.stringValue() != Name)
558 return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
559 "' isn't '" + Token.stringValue() + "'");
561 Dest = MachineOperand::CreateFI(ObjectInfo->second);
565 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
566 assert(Token.is(MIToken::FixedStackObject));
570 auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
571 if (ObjectInfo == PFS.FixedStackObjectSlots.end())
572 return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
575 Dest = MachineOperand::CreateFI(ObjectInfo->second);
579 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
580 switch (Token.kind()) {
581 case MIToken::NamedGlobalValue:
582 case MIToken::QuotedNamedGlobalValue: {
583 StringValueUtility Name(Token);
584 const Module *M = MF.getFunction()->getParent();
585 if (const auto *GV = M->getNamedValue(Name)) {
586 Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
589 return error(Twine("use of undefined global value '@") +
590 Token.rawStringValue() + "'");
592 case MIToken::GlobalValue: {
594 if (getUnsigned(GVIdx))
596 if (GVIdx >= IRSlots.GlobalValues.size())
597 return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
599 Dest = MachineOperand::CreateGA(IRSlots.GlobalValues[GVIdx],
604 llvm_unreachable("The current token should be a global value");
606 // TODO: Parse offset and target flags.
611 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
612 assert(Token.is(MIToken::ConstantPoolItem));
616 auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
617 if (ConstantInfo == PFS.ConstantPoolSlots.end())
618 return error("use of undefined constant '%const." + Twine(ID) + "'");
620 // TODO: Parse offset and target flags.
621 Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
625 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
626 assert(Token.is(MIToken::JumpTableIndex));
630 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
631 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
632 return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
634 // TODO: Parse target flags.
635 Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
639 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
640 assert(Token.is(MIToken::ExternalSymbol) ||
641 Token.is(MIToken::QuotedExternalSymbol));
642 StringValueUtility Name(Token);
643 const char *Symbol = MF.createExternalSymbolName(Name);
645 // TODO: Parse the target flags.
646 Dest = MachineOperand::CreateES(Symbol);
650 bool MIParser::parseMDNode(MDNode *&Node) {
651 assert(Token.is(MIToken::exclaim));
652 auto Loc = Token.location();
654 if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
655 return error("expected metadata id after '!'");
659 auto NodeInfo = IRSlots.MetadataNodes.find(ID);
660 if (NodeInfo == IRSlots.MetadataNodes.end())
661 return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
663 Node = NodeInfo->second.get();
667 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
668 MDNode *Node = nullptr;
669 if (parseMDNode(Node))
671 Dest = MachineOperand::CreateMetadata(Node);
675 bool MIParser::parseCFIOffset(int &Offset) {
676 if (Token.isNot(MIToken::IntegerLiteral))
677 return error("expected a cfi offset");
678 if (Token.integerValue().getMinSignedBits() > 32)
679 return error("expected a 32 bit integer (the cfi offset is too large)");
680 Offset = (int)Token.integerValue().getExtValue();
685 bool MIParser::parseCFIRegister(unsigned &Reg) {
686 if (Token.isNot(MIToken::NamedRegister))
687 return error("expected a cfi register");
689 if (parseRegister(LLVMReg))
691 const auto *TRI = MF.getSubtarget().getRegisterInfo();
692 assert(TRI && "Expected target register info");
693 int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
695 return error("invalid DWARF register");
696 Reg = (unsigned)DwarfReg;
701 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
702 auto Kind = Token.kind();
704 auto &MMI = MF.getMMI();
709 case MIToken::kw_cfi_offset:
710 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
711 parseCFIOffset(Offset))
714 MMI.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
716 case MIToken::kw_cfi_def_cfa_register:
717 if (parseCFIRegister(Reg))
720 MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
722 case MIToken::kw_cfi_def_cfa_offset:
723 if (parseCFIOffset(Offset))
725 // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
726 CFIIndex = MMI.addFrameInst(
727 MCCFIInstruction::createDefCfaOffset(nullptr, -Offset));
730 // TODO: Parse the other CFI operands.
731 llvm_unreachable("The current token should be a cfi operand");
733 Dest = MachineOperand::CreateCFIIndex(CFIIndex);
737 bool MIParser::parseMachineOperand(MachineOperand &Dest) {
738 switch (Token.kind()) {
739 case MIToken::kw_implicit:
740 case MIToken::kw_implicit_define:
741 case MIToken::kw_dead:
742 case MIToken::kw_killed:
743 case MIToken::kw_undef:
744 case MIToken::underscore:
745 case MIToken::NamedRegister:
746 case MIToken::VirtualRegister:
747 return parseRegisterOperand(Dest);
748 case MIToken::IntegerLiteral:
749 return parseImmediateOperand(Dest);
750 case MIToken::MachineBasicBlock:
751 return parseMBBOperand(Dest);
752 case MIToken::StackObject:
753 return parseStackObjectOperand(Dest);
754 case MIToken::FixedStackObject:
755 return parseFixedStackObjectOperand(Dest);
756 case MIToken::GlobalValue:
757 case MIToken::NamedGlobalValue:
758 case MIToken::QuotedNamedGlobalValue:
759 return parseGlobalAddressOperand(Dest);
760 case MIToken::ConstantPoolItem:
761 return parseConstantPoolIndexOperand(Dest);
762 case MIToken::JumpTableIndex:
763 return parseJumpTableIndexOperand(Dest);
764 case MIToken::ExternalSymbol:
765 case MIToken::QuotedExternalSymbol:
766 return parseExternalSymbolOperand(Dest);
767 case MIToken::exclaim:
768 return parseMetadataOperand(Dest);
769 case MIToken::kw_cfi_offset:
770 case MIToken::kw_cfi_def_cfa_register:
771 case MIToken::kw_cfi_def_cfa_offset:
772 return parseCFIOperand(Dest);
775 case MIToken::Identifier:
776 if (const auto *RegMask = getRegMask(Token.stringValue())) {
777 Dest = MachineOperand::CreateRegMask(RegMask);
783 // TODO: parse the other machine operands.
784 return error("expected a machine operand");
789 void MIParser::initNames2InstrOpCodes() {
790 if (!Names2InstrOpCodes.empty())
792 const auto *TII = MF.getSubtarget().getInstrInfo();
793 assert(TII && "Expected target instruction info");
794 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
795 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
798 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
799 initNames2InstrOpCodes();
800 auto InstrInfo = Names2InstrOpCodes.find(InstrName);
801 if (InstrInfo == Names2InstrOpCodes.end())
803 OpCode = InstrInfo->getValue();
807 void MIParser::initNames2Regs() {
808 if (!Names2Regs.empty())
810 // The '%noreg' register is the register 0.
811 Names2Regs.insert(std::make_pair("noreg", 0));
812 const auto *TRI = MF.getSubtarget().getRegisterInfo();
813 assert(TRI && "Expected target register info");
814 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
816 Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
819 assert(WasInserted && "Expected registers to be unique case-insensitively");
823 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) {
825 auto RegInfo = Names2Regs.find(RegName);
826 if (RegInfo == Names2Regs.end())
828 Reg = RegInfo->getValue();
832 void MIParser::initNames2RegMasks() {
833 if (!Names2RegMasks.empty())
835 const auto *TRI = MF.getSubtarget().getRegisterInfo();
836 assert(TRI && "Expected target register info");
837 ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
838 ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
839 assert(RegMasks.size() == RegMaskNames.size());
840 for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
841 Names2RegMasks.insert(
842 std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
845 const uint32_t *MIParser::getRegMask(StringRef Identifier) {
846 initNames2RegMasks();
847 auto RegMaskInfo = Names2RegMasks.find(Identifier);
848 if (RegMaskInfo == Names2RegMasks.end())
850 return RegMaskInfo->getValue();
853 void MIParser::initNames2SubRegIndices() {
854 if (!Names2SubRegIndices.empty())
856 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
857 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
858 Names2SubRegIndices.insert(
859 std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I));
862 unsigned MIParser::getSubRegIndex(StringRef Name) {
863 initNames2SubRegIndices();
864 auto SubRegInfo = Names2SubRegIndices.find(Name);
865 if (SubRegInfo == Names2SubRegIndices.end())
867 return SubRegInfo->getValue();
870 void MIParser::initSlots2BasicBlocks() {
871 if (!Slots2BasicBlocks.empty())
873 const auto &F = *MF.getFunction();
874 ModuleSlotTracker MST(F.getParent());
875 MST.incorporateFunction(F);
879 int Slot = MST.getLocalSlot(&BB);
882 Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
886 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
887 initSlots2BasicBlocks();
888 auto BlockInfo = Slots2BasicBlocks.find(Slot);
889 if (BlockInfo == Slots2BasicBlocks.end())
891 return BlockInfo->second;
894 bool llvm::parseMachineInstr(MachineInstr *&MI, SourceMgr &SM,
895 MachineFunction &MF, StringRef Src,
896 const PerFunctionMIParsingState &PFS,
897 const SlotMapping &IRSlots, SMDiagnostic &Error) {
898 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parse(MI);
901 bool llvm::parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM,
902 MachineFunction &MF, StringRef Src,
903 const PerFunctionMIParsingState &PFS,
904 const SlotMapping &IRSlots, SMDiagnostic &Error) {
905 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseStandaloneMBB(MBB);
908 bool llvm::parseNamedRegisterReference(unsigned &Reg, SourceMgr &SM,
909 MachineFunction &MF, StringRef Src,
910 const PerFunctionMIParsingState &PFS,
911 const SlotMapping &IRSlots,
912 SMDiagnostic &Error) {
913 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
914 .parseStandaloneNamedRegister(Reg);
917 bool llvm::parseVirtualRegisterReference(unsigned &Reg, SourceMgr &SM,
918 MachineFunction &MF, StringRef Src,
919 const PerFunctionMIParsingState &PFS,
920 const SlotMapping &IRSlots,
921 SMDiagnostic &Error) {
922 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
923 .parseStandaloneVirtualRegister(Reg);
926 bool llvm::parseIRBlockReference(const BasicBlock *&BB, SourceMgr &SM,
927 MachineFunction &MF, StringRef Src,
928 const PerFunctionMIParsingState &PFS,
929 const SlotMapping &IRSlots,
930 SMDiagnostic &Error) {
931 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
932 .parseStandaloneIRBlockReference(BB);