1 //===---- LiveRangeEdit.h - Basic tools for split and spill -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // The LiveRangeEdit class represents changes done to a virtual register when it
11 // is spilled or split.
13 // The parent register is never changed. Instead, a number of new virtual
14 // registers are created and added to the newRegs vector.
16 //===----------------------------------------------------------------------===//
18 #ifndef LLVM_CODEGEN_LIVERANGEEDIT_H
19 #define LLVM_CODEGEN_LIVERANGEEDIT_H
21 #include "llvm/CodeGen/LiveInterval.h"
26 class MachineRegisterInfo;
30 LiveInterval &parent_;
31 SmallVectorImpl<LiveInterval*> &newRegs_;
32 const SmallVectorImpl<LiveInterval*> &uselessRegs_;
34 /// firstNew_ - Index of the first register added to newRegs_.
35 const unsigned firstNew_;
38 /// Create a LiveRangeEdit for breaking down parent into smaller pieces.
39 /// @param parent The register being spilled or split.
40 /// @param newRegs List to receive any new registers created. This needn't be
41 /// empty initially, any existing registers are ignored.
42 /// @param uselessRegs List of registers that can't be used when
43 /// rematerializing values because they are about to be removed.
44 LiveRangeEdit(LiveInterval &parent,
45 SmallVectorImpl<LiveInterval*> &newRegs,
46 const SmallVectorImpl<LiveInterval*> &uselessRegs)
47 : parent_(parent), newRegs_(newRegs), uselessRegs_(uselessRegs),
48 firstNew_(newRegs.size()) {}
50 LiveInterval &getParent() const { return parent_; }
51 unsigned getReg() const { return parent_.reg; }
53 /// Iterator for accessing the new registers added by this edit.
54 typedef SmallVectorImpl<LiveInterval*>::const_iterator iterator;
55 iterator begin() const { return newRegs_.begin()+firstNew_; }
56 iterator end() const { return newRegs_.end(); }
58 /// assignStackSlot - Ensure a stack slot is assigned to parent.
59 /// @return the assigned stack slot number.
60 int assignStackSlot(VirtRegMap&);
62 /// create - Create a new register with the same class and stack slot as
64 LiveInterval &create(MachineRegisterInfo&, LiveIntervals&, VirtRegMap&);
66 /// allUsesAvailableAt - Return true if all registers used by OrigMI at
67 /// OrigIdx are also available with the same value at UseIdx.
68 bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
69 SlotIndex UseIdx, LiveIntervals &lis);