1 //===-- LiveIntervalUnion.h - Live interval union data struct --*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // LiveIntervalUnion is a union of live segments across multiple live virtual
11 // registers. This may be used during coalescing to represent a congruence
12 // class, or during register allocation to model liveness of a physical
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_LIVEINTERVALUNION
18 #define LLVM_CODEGEN_LIVEINTERVALUNION
20 #include "llvm/ADT/IntervalMap.h"
21 #include "llvm/CodeGen/LiveInterval.h"
25 class TargetRegisterInfo;
28 // forward declaration
29 template <unsigned Element> class SparseBitVector;
30 typedef SparseBitVector<128> LiveVirtRegBitSet;
33 /// Compare a live virtual register segment to a LiveIntervalUnion segment.
35 overlap(const LiveRange &VRSeg,
36 const IntervalMap<SlotIndex, LiveInterval*>::const_iterator &LUSeg) {
37 return VRSeg.start < LUSeg.stop() && LUSeg.start() < VRSeg.end;
40 /// Union of live intervals that are strong candidates for coalescing into a
41 /// single register (either physical or virtual depending on the context). We
42 /// expect the constituent live intervals to be disjoint, although we may
43 /// eventually make exceptions to handle value-based interference.
44 class LiveIntervalUnion {
45 // A set of live virtual register segments that supports fast insertion,
46 // intersection, and removal.
47 // Mapping SlotIndex intervals to virtual register numbers.
48 typedef IntervalMap<SlotIndex, LiveInterval*> LiveSegments;
51 // SegmentIter can advance to the next segment ordered by starting position
52 // which may belong to a different live virtual register. We also must be able
53 // to reach the current segment's containing virtual register.
54 typedef LiveSegments::iterator SegmentIter;
56 // LiveIntervalUnions share an external allocator.
57 typedef LiveSegments::Allocator Allocator;
59 class InterferenceResult;
63 const unsigned RepReg; // representative register number
64 LiveSegments Segments; // union of virtual reg segments
67 LiveIntervalUnion(unsigned r, Allocator &a) : RepReg(r), Segments(a) {}
69 // Iterate over all segments in the union of live virtual registers ordered
70 // by their starting position.
71 SegmentIter begin() { return Segments.begin(); }
72 SegmentIter end() { return Segments.end(); }
73 SegmentIter find(SlotIndex x) { return Segments.find(x); }
74 bool empty() { return Segments.empty(); }
75 SlotIndex startIndex() { return Segments.start(); }
77 // Add a live virtual register to this union and merge its segments.
78 void unify(LiveInterval &VirtReg);
80 // Remove a live virtual register's segments from this union.
81 void extract(LiveInterval &VirtReg);
83 // Print union, using TRI to translate register names
84 void print(raw_ostream &OS, const TargetRegisterInfo *TRI) const;
87 // Verify the live intervals in this union and add them to the visited set.
88 void verify(LiveVirtRegBitSet& VisitedVRegs);
91 /// Cache a single interference test result in the form of two intersecting
92 /// segments. This allows efficiently iterating over the interferences. The
93 /// iteration logic is handled by LiveIntervalUnion::Query which may
94 /// filter interferences depending on the type of query.
95 class InterferenceResult {
98 LiveInterval::iterator VirtRegI; // current position in VirtReg
99 SegmentIter LiveUnionI; // current position in LiveUnion
102 InterferenceResult(LiveInterval::iterator VRegI, SegmentIter UnionI)
103 : VirtRegI(VRegI), LiveUnionI(UnionI) {}
106 // Public default ctor.
107 InterferenceResult(): VirtRegI(), LiveUnionI() {}
109 // Note: this interface provides raw access to the iterators because the
110 // result has no way to tell if it's valid to dereference them.
112 // Access the VirtReg segment.
113 LiveInterval::iterator virtRegPos() const { return VirtRegI; }
115 // Access the LiveUnion segment.
116 const SegmentIter &liveUnionPos() const { return LiveUnionI; }
118 bool operator==(const InterferenceResult &IR) const {
119 return VirtRegI == IR.VirtRegI && LiveUnionI == IR.LiveUnionI;
121 bool operator!=(const InterferenceResult &IR) const {
122 return !operator==(IR);
126 /// Query interferences between a single live virtual register and a live
129 LiveIntervalUnion *LiveUnion;
130 LiveInterval *VirtReg;
131 InterferenceResult FirstInterference;
132 SmallVector<LiveInterval*,4> InterferingVRegs;
133 bool CheckedFirstInterference;
134 bool SeenAllInterferences;
135 bool SeenUnspillableVReg;
138 Query(): LiveUnion(), VirtReg() {}
140 Query(LiveInterval *VReg, LiveIntervalUnion *LIU):
141 LiveUnion(LIU), VirtReg(VReg), CheckedFirstInterference(false),
142 SeenAllInterferences(false), SeenUnspillableVReg(false)
148 InterferingVRegs.clear();
149 CheckedFirstInterference = false;
150 SeenAllInterferences = false;
151 SeenUnspillableVReg = false;
154 void init(LiveInterval *VReg, LiveIntervalUnion *LIU) {
155 assert(VReg && LIU && "Invalid arguments");
156 if (VirtReg == VReg && LiveUnion == LIU) {
157 // Retain cached results, e.g. firstInterference.
165 LiveInterval &virtReg() const {
166 assert(VirtReg && "uninitialized");
170 bool isInterference(const InterferenceResult &IR) const {
171 if (IR.VirtRegI != VirtReg->end()) {
172 assert(overlap(*IR.VirtRegI, IR.LiveUnionI) &&
173 "invalid segment iterators");
179 // Does this live virtual register interfere with the union?
180 bool checkInterference() { return isInterference(firstInterference()); }
182 // Get the first pair of interfering segments, or a noninterfering result.
183 // This initializes the firstInterference_ cache.
184 const InterferenceResult &firstInterference();
186 // Treat the result as an iterator and advance to the next interfering pair
187 // of segments. Visiting each unique interfering pairs means that the same
188 // VirtReg or LiveUnion segment may be visited multiple times.
189 bool nextInterference(InterferenceResult &IR) const;
191 // Count the virtual registers in this union that interfere with this
192 // query's live virtual register, up to maxInterferingRegs.
193 unsigned collectInterferingVRegs(unsigned MaxInterferingRegs = UINT_MAX);
195 // Was this virtual register visited during collectInterferingVRegs?
196 bool isSeenInterference(LiveInterval *VReg) const;
198 // Did collectInterferingVRegs collect all interferences?
199 bool seenAllInterferences() const { return SeenAllInterferences; }
201 // Did collectInterferingVRegs encounter an unspillable vreg?
202 bool seenUnspillableVReg() const { return SeenUnspillableVReg; }
204 // Vector generated by collectInterferingVRegs.
205 const SmallVectorImpl<LiveInterval*> &interferingVRegs() const {
206 return InterferingVRegs;
210 Query(const Query&); // DO NOT IMPLEMENT
211 void operator=(const Query&); // DO NOT IMPLEMENT
213 // Private interface for queries
214 void findIntersection(InterferenceResult &IR) const;
218 } // end namespace llvm
220 #endif // !defined(LLVM_CODEGEN_LIVEINTERVALUNION)