1 //===-- LiveIntervals.cpp - Live Interval Analysis ------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveInterval analysis pass which is used
11 // by the Linear Scan Register allocator. This pass linearizes the
12 // basic blocks of the function in DFS order and uses the
13 // LiveVariables pass to conservatively compute live intervals for
14 // each virtual and physical register.
16 //===----------------------------------------------------------------------===//
18 #define DEBUG_TYPE "liveintervals"
19 #include "llvm/CodeGen/LiveIntervals.h"
20 #include "llvm/Function.h"
21 #include "llvm/CodeGen/LiveVariables.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/MachineInstr.h"
25 #include "llvm/CodeGen/Passes.h"
26 #include "llvm/CodeGen/SSARegMap.h"
27 #include "llvm/Target/MRegisterInfo.h"
28 #include "llvm/Target/TargetInstrInfo.h"
29 #include "llvm/Target/TargetMachine.h"
30 #include "llvm/Target/TargetRegInfo.h"
31 #include "llvm/Support/CFG.h"
32 #include "Support/Debug.h"
33 #include "Support/DepthFirstIterator.h"
34 #include "Support/Statistic.h"
41 RegisterAnalysis<LiveIntervals> X("liveintervals",
42 "Live Interval Analysis");
44 Statistic<> numIntervals("liveintervals", "Number of intervals");
47 void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const
49 AU.addPreserved<LiveVariables>();
50 AU.addRequired<LiveVariables>();
51 AU.addPreservedID(PHIEliminationID);
52 AU.addRequiredID(PHIEliminationID);
53 AU.addRequiredID(TwoAddressInstructionPassID);
54 MachineFunctionPass::getAnalysisUsage(AU);
57 /// runOnMachineFunction - Register allocate the whole function
59 bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
60 DEBUG(std::cerr << "Machine Function\n");
62 tm_ = &fn.getTarget();
63 mri_ = tm_->getRegisterInfo();
64 lv_ = &getAnalysis<LiveVariables>();
65 allocatableRegisters_.clear();
72 // mark allocatable registers
73 allocatableRegisters_.resize(MRegisterInfo::FirstVirtualRegister);
74 // Loop over all of the register classes...
75 for (MRegisterInfo::regclass_iterator
76 rci = mri_->regclass_begin(), rce = mri_->regclass_end();
78 // Loop over all of the allocatable registers in the function...
79 for (TargetRegisterClass::iterator
80 i = (*rci)->allocation_order_begin(*mf_),
81 e = (*rci)->allocation_order_end(*mf_); i != e; ++i) {
82 allocatableRegisters_[*i] = true; // The reg is allocatable!
86 // number MachineInstrs
88 for (MachineFunction::iterator mbb = mf_->begin(), mbbEnd = mf_->end();
89 mbb != mbbEnd; ++mbb) {
90 const std::pair<MachineBasicBlock*, unsigned>& entry =
91 lv_->getMachineBasicBlockInfo(&*mbb);
92 bool inserted = mbbi2mbbMap_.insert(std::make_pair(entry.second,
94 assert(inserted && "multiple index -> MachineBasicBlock");
96 for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end();
98 inserted = mi2iMap_.insert(std::make_pair(*mi, miIndex)).second;
99 assert(inserted && "multiple MachineInstr -> index mappings");
109 void LiveIntervals::printRegName(unsigned reg) const
111 if (reg < MRegisterInfo::FirstVirtualRegister)
112 std::cerr << mri_->getName(reg);
114 std::cerr << '%' << reg;
117 void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock* mbb,
118 MachineBasicBlock::iterator mi,
121 DEBUG(std::cerr << "\t\t\tregister: ";printRegName(reg); std::cerr << '\n');
123 unsigned instrIndex = getInstructionIndex(*mi);
125 LiveVariables::VarInfo& vi = lv_->getVarInfo(reg);
127 Interval* interval = 0;
128 Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg);
129 if (r2iit == r2iMap_.end()) {
131 intervals_.push_back(Interval(reg));
132 // update interval index for this register
133 r2iMap_[reg] = intervals_.size() - 1;
134 interval = &intervals_.back();
137 interval = &intervals_[r2iit->second];
140 for (MbbIndex2MbbMap::iterator
141 it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end();
143 unsigned liveBlockIndex = it->first;
144 MachineBasicBlock* liveBlock = it->second;
145 if (liveBlockIndex < vi.AliveBlocks.size() &&
146 vi.AliveBlocks[liveBlockIndex]) {
147 unsigned start = getInstructionIndex(liveBlock->front());
148 unsigned end = getInstructionIndex(liveBlock->back()) + 1;
149 interval->addRange(start, end);
153 bool killedInDefiningBasicBlock = false;
154 for (int i = 0, e = vi.Kills.size(); i != e; ++i) {
155 MachineBasicBlock* killerBlock = vi.Kills[i].first;
156 MachineInstr* killerInstr = vi.Kills[i].second;
157 unsigned start = (mbb == killerBlock ?
159 getInstructionIndex(killerBlock->front()));
160 unsigned end = getInstructionIndex(killerInstr) + 1;
162 killedInDefiningBasicBlock |= mbb == killerBlock;
163 interval->addRange(start, end);
167 if (!killedInDefiningBasicBlock) {
168 unsigned end = getInstructionIndex(mbb->back()) + 1;
169 interval->addRange(instrIndex, end);
173 void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock* mbb,
174 MachineBasicBlock::iterator mi,
177 DEBUG(std::cerr << "\t\t\tregister: ";printRegName(reg); std::cerr << '\n');
178 if (!lv_->getAllocatablePhysicalRegisters()[reg]) {
179 DEBUG(std::cerr << "\t\t\t\tnon allocatable register: ignoring\n");
183 unsigned start = getInstructionIndex(*mi);
184 unsigned end = start;
186 for (MachineBasicBlock::iterator e = mbb->end(); mi != e; ++mi) {
187 for (LiveVariables::killed_iterator
188 ki = lv_->dead_begin(*mi),
189 ke = lv_->dead_end(*mi);
191 if (reg == ki->second) {
192 end = getInstructionIndex(ki->first) + 1;
197 for (LiveVariables::killed_iterator
198 ki = lv_->killed_begin(*mi),
199 ke = lv_->killed_end(*mi);
201 if (reg == ki->second) {
202 end = getInstructionIndex(ki->first) + 1;
208 assert(start < end && "did not find end of interval?");
210 Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg);
211 if (r2iit != r2iMap_.end()) {
212 unsigned ii = r2iit->second;
213 Interval& interval = intervals_[ii];
214 interval.addRange(start, end);
217 intervals_.push_back(Interval(reg));
218 Interval& interval = intervals_.back();
219 // update interval index for this register
220 r2iMap_[reg] = intervals_.size() - 1;
221 interval.addRange(start, end);
225 void LiveIntervals::handleRegisterDef(MachineBasicBlock* mbb,
226 MachineBasicBlock::iterator mi,
229 if (reg < MRegisterInfo::FirstVirtualRegister) {
230 if (allocatableRegisters_[reg]) {
231 handlePhysicalRegisterDef(mbb, mi, reg);
235 handleVirtualRegisterDef(mbb, mi, reg);
239 unsigned LiveIntervals::getInstructionIndex(MachineInstr* instr) const
241 assert(mi2iMap_.find(instr) != mi2iMap_.end() &&
242 "instruction not assigned a number");
243 return mi2iMap_.find(instr)->second;
246 /// computeIntervals - computes the live intervals for virtual
247 /// registers. for some ordering of the machine instructions [1,N] a
248 /// live interval is an interval [i, j] where 1 <= i <= j <= N for
249 /// which a variable is live
250 void LiveIntervals::computeIntervals()
252 DEBUG(std::cerr << "computing live intervals:\n");
254 for (MbbIndex2MbbMap::iterator
255 it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end();
257 MachineBasicBlock* mbb = it->second;
258 DEBUG(std::cerr << "machine basic block: "
259 << mbb->getBasicBlock()->getName() << "\n");
260 for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end();
262 MachineInstr* instr = *mi;
263 const TargetInstrDescriptor& tid =
264 tm_->getInstrInfo().get(instr->getOpcode());
265 DEBUG(std::cerr << "\t\tinstruction["
266 << getInstructionIndex(instr) << "]: ";
267 instr->print(std::cerr, *tm_););
269 // handle implicit defs
270 for (const unsigned* id = tid.ImplicitDefs; *id; ++id) {
271 unsigned physReg = *id;
272 handlePhysicalRegisterDef(mbb, mi, physReg);
275 // handle explicit defs
276 for (int i = instr->getNumOperands() - 1; i >= 0; --i) {
277 MachineOperand& mop = instr->getOperand(i);
279 if (!mop.isRegister())
282 unsigned reg = mop.getAllocatedRegNum();
283 // handle defs - build intervals
285 if (reg < MRegisterInfo::FirstVirtualRegister)
286 handlePhysicalRegisterDef(mbb, mi, reg);
288 handleVirtualRegisterDef(mbb, mi, reg);
292 Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg);
293 if (r2iit != r2iMap_.end() &&
294 reg >= MRegisterInfo::FirstVirtualRegister)
295 ++intervals_[r2iit->second].weight;
300 std::sort(intervals_.begin(), intervals_.end(), StartPointComp());
301 DEBUG(std::copy(intervals_.begin(), intervals_.end(),
302 std::ostream_iterator<Interval>(std::cerr, "\n")));
305 LiveIntervals::Interval::Interval(unsigned r)
307 weight((r < MRegisterInfo::FirstVirtualRegister ?
308 std::numeric_limits<unsigned>::max() : 0))
313 void LiveIntervals::Interval::addRange(unsigned start, unsigned end)
315 DEBUG(std::cerr << "\t\t\t\tadding range: [" << start <<','<< end << "]\n");
316 //assert(start < end && "invalid range?");
317 Range range = std::make_pair(start, end);
318 Ranges::iterator it =
319 ranges.insert(std::upper_bound(ranges.begin(), ranges.end(), range),
322 DEBUG(std::cerr << "\t\t\t\tbefore merge forward: " << *this << '\n');
323 mergeRangesForward(it);
324 DEBUG(std::cerr << "\t\t\t\tbefore merge backward: " << *this << '\n');
325 mergeRangesBackward(it);
326 DEBUG(std::cerr << "\t\t\t\tafter merging: " << *this << '\n');
329 void LiveIntervals::Interval::mergeRangesForward(Ranges::iterator it)
331 for (Ranges::iterator next = it + 1;
332 next != ranges.end() && it->second >= next->first; ) {
333 it->second = std::max(it->second, next->second);
334 next = ranges.erase(next);
338 void LiveIntervals::Interval::mergeRangesBackward(Ranges::iterator it)
340 for (Ranges::iterator prev = it - 1;
341 it != ranges.begin() && it->first <= prev->second; ) {
342 it->first = std::min(it->first, prev->first);
343 it->second = std::max(it->second, prev->second);
344 it = ranges.erase(prev);
349 bool LiveIntervals::Interval::liveAt(unsigned index) const
351 Ranges::const_iterator r = ranges.begin();
352 while (r != ranges.end() && index < r->second) {
353 if (index >= r->first)
360 bool LiveIntervals::Interval::overlaps(const Interval& other) const
362 std::vector<bool> bitMap(end(), false);
363 for (Ranges::const_iterator r = ranges.begin(); r != ranges.end(); ++r) {
364 for (unsigned i = r->first; i < r->second; ++i)
367 for (Ranges::const_iterator r = other.ranges.begin();
368 r != other.ranges.end(); ++r) {
369 for (unsigned i = r->first;
370 i < r->second && i < bitMap.size(); ++i)
378 std::ostream& llvm::operator<<(std::ostream& os,
379 const LiveIntervals::Interval& li)
381 os << "%reg" << li.reg << ',' << li.weight << " = ";
382 for (LiveIntervals::Interval::Ranges::const_iterator
383 i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) {
384 os << "[" << i->first << "," << i->second << "]";