lib/CodeGen/LLVMTargetMachine.cpp

   1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements the LLVMTargetMachine class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/Target/TargetMachine.h"
  15 #include "llvm/PassManager.h"
  16 #include "llvm/Pass.h"
  17 #include "llvm/Assembly/PrintModulePass.h"
  18 #include "llvm/Analysis/LoopPass.h"
  19 #include "llvm/CodeGen/Passes.h"
  20 #include "llvm/CodeGen/GCStrategy.h"
  21 #include "llvm/Target/TargetOptions.h"
  22 #include "llvm/Target/TargetAsmInfo.h"
  23 #include "llvm/Transforms/Scalar.h"
  24 #include "llvm/Support/CommandLine.h"
  25 using namespace llvm;
  26
  27 static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
  28     cl::desc("Print LLVM IR produced by the loop-reduce pass"));
  29 static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
  30     cl::desc("Print LLVM IR input to isel pass"));
  31 static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
  32     cl::desc("Dump emitter generated instructions as assembly"));
  33 static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
  34     cl::desc("Dump garbage collector data"));
  35
  36 // Hidden options to help debugging
  37 static cl::opt<bool>
  38 EnableSinking("enable-sinking", cl::init(false), cl::Hidden,
  39               cl::desc("Perform sinking on machine code"));
  40 static cl::opt<bool>
  41 EnableLICM("machine-licm",
  42            cl::init(false), cl::Hidden,
  43            cl::desc("Perform loop-invariant code motion on machine code"));
  44
  45 // When this works it will be on by default.
  46 static cl::opt<bool>
  47 DisablePostRAScheduler("disable-post-RA-scheduler",
  48                        cl::desc("Disable scheduling after register allocation"),
  49                        cl::init(true));
  50
  51 FileModel::Model
  52 LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
  53                                        std::ostream &Out,
  54                                        CodeGenFileType FileType,
  55                                        bool Fast) {
  56   // Standard LLVM-Level Passes.
  57
  58   // Run loop strength reduction before anything else.
  59   if (!Fast) {
  60     PM.add(createLoopStrengthReducePass(getTargetLowering()));
  61     if (PrintLSR)
  62       PM.add(new PrintFunctionPass("\n\n*** Code after LSR ***\n", &cerr));
  63   }
  64
  65   PM.add(createGCLoweringPass());
  66
  67   if (!getTargetAsmInfo()->doesSupportExceptionHandling())
  68     PM.add(createLowerInvokePass(getTargetLowering()));
  69
  70   // Make sure that no unreachable blocks are instruction selected.
  71   PM.add(createUnreachableBlockEliminationPass());
  72
  73   if (!Fast)
  74     PM.add(createCodeGenPreparePass(getTargetLowering()));
  75
  76   if (PrintISelInput)
  77     PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
  78                                  &cerr));
  79
  80   // Ask the target for an isel.
  81   if (addInstSelector(PM, Fast))
  82     return FileModel::Error;
  83
  84   // Print the instruction selected machine code...
  85   if (PrintMachineCode)
  86     PM.add(createMachineFunctionPrinterPass(cerr));
  87
  88   if (EnableLICM)
  89     PM.add(createMachineLICMPass());
  90
  91   if (EnableSinking)
  92     PM.add(createMachineSinkingPass());
  93
  94   // Run pre-ra passes.
  95   if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
  96     PM.add(createMachineFunctionPrinterPass(cerr));
  97
  98   // Perform register allocation to convert to a concrete x86 representation
  99   PM.add(createRegisterAllocator());
 100
 101   // Perform stack slot coloring.
 102   if (!Fast)
 103     PM.add(createStackSlotColoringPass());
 104
 105   if (PrintMachineCode)  // Print the register-allocated code
 106     PM.add(createMachineFunctionPrinterPass(cerr));
 107
 108   // Run post-ra passes.
 109   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
 110     PM.add(createMachineFunctionPrinterPass(cerr));
 111
 112   PM.add(createLowerSubregsPass());
 113
 114   if (PrintMachineCode)  // Print the subreg lowered code
 115     PM.add(createMachineFunctionPrinterPass(cerr));
 116
 117   // Insert prolog/epilog code.  Eliminate abstract frame index references...
 118   PM.add(createPrologEpilogCodeInserter());
 119
 120   if (PrintMachineCode)
 121     PM.add(createMachineFunctionPrinterPass(cerr));
 122
 123   // Second pass scheduler.
 124   if (!Fast && !DisablePostRAScheduler)
 125     PM.add(createPostRAScheduler());
 126
 127   // Branch folding must be run after regalloc and prolog/epilog insertion.
 128   if (!Fast)
 129     PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
 130
 131   PM.add(createGCMachineCodeAnalysisPass());
 132   if (PrintMachineCode)
 133     PM.add(createMachineFunctionPrinterPass(cerr));
 134
 135   if (PrintGCInfo)
 136     PM.add(createGCInfoPrinter(*cerr));
 137
 138   // Fold redundant debug labels.
 139   PM.add(createDebugLabelFoldingPass());
 140
 141   if (PrintMachineCode)  // Print the register-allocated code
 142     PM.add(createMachineFunctionPrinterPass(cerr));
 143
 144   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
 145     PM.add(createMachineFunctionPrinterPass(cerr));
 146
 147   if (!Fast && !OptimizeForSize)
 148     PM.add(createLoopAlignerPass());
 149
 150   switch (FileType) {
 151   default:
 152     break;
 153   case TargetMachine::AssemblyFile:
 154     if (addAssemblyEmitter(PM, Fast, Out))
 155       return FileModel::Error;
 156     return FileModel::AsmFile;
 157   case TargetMachine::ObjectFile:
 158     if (getMachOWriterInfo())
 159       return FileModel::MachOFile;
 160     else if (getELFWriterInfo())
 161       return FileModel::ElfFile;
 162   }
 163
 164   return FileModel::Error;
 165 }
 166
 167 /// addPassesToEmitFileFinish - If the passes to emit the specified file had to
 168 /// be split up (e.g., to add an object writer pass), this method can be used to
 169 /// finish up adding passes to emit the file, if necessary.
 170 bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
 171                                                   MachineCodeEmitter *MCE,
 172                                                   bool Fast) {
 173   if (MCE)
 174     addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
 175
 176   PM.add(createGCInfoDeleter());
 177
 178   // Delete machine code for this function
 179   PM.add(createMachineCodeDeleter());
 180
 181   return false; // success!
 182 }
 183
 184 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
 185 /// get machine code emitted.  This uses a MachineCodeEmitter object to handle
 186 /// actually outputting the machine code and resolving things like the address
 187 /// of functions.  This method should returns true if machine code emission is
 188 /// not supported.
 189 ///
 190 bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
 191                                                    MachineCodeEmitter &MCE,
 192                                                    bool Fast) {
 193   // Standard LLVM-Level Passes.
 194
 195   // Run loop strength reduction before anything else.
 196   if (!Fast) {
 197     PM.add(createLoopStrengthReducePass(getTargetLowering()));
 198     if (PrintLSR)
 199       PM.add(new PrintFunctionPass("\n\n*** Code after LSR ***\n", &cerr));
 200   }
 201
 202   PM.add(createGCLoweringPass());
 203
 204   if (!getTargetAsmInfo()->doesSupportExceptionHandling())
 205     PM.add(createLowerInvokePass(getTargetLowering()));
 206
 207   // Make sure that no unreachable blocks are instruction selected.
 208   PM.add(createUnreachableBlockEliminationPass());
 209
 210   if (!Fast)
 211     PM.add(createCodeGenPreparePass(getTargetLowering()));
 212
 213   if (PrintISelInput)
 214     PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
 215                                  &cerr));
 216
 217   // Ask the target for an isel.
 218   if (addInstSelector(PM, Fast))
 219     return true;
 220
 221   // Print the instruction selected machine code...
 222   if (PrintMachineCode)
 223     PM.add(createMachineFunctionPrinterPass(cerr));
 224
 225   if (EnableLICM)
 226     PM.add(createMachineLICMPass());
 227
 228   if (EnableSinking)
 229     PM.add(createMachineSinkingPass());
 230
 231   // Run pre-ra passes.
 232   if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
 233     PM.add(createMachineFunctionPrinterPass(cerr));
 234
 235   // Perform register allocation.
 236   PM.add(createRegisterAllocator());
 237
 238   // Perform stack slot coloring.
 239   if (!Fast)
 240     PM.add(createStackSlotColoringPass());
 241
 242   if (PrintMachineCode)
 243     PM.add(createMachineFunctionPrinterPass(cerr));
 244
 245   // Run post-ra passes.
 246   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
 247     PM.add(createMachineFunctionPrinterPass(cerr));
 248
 249   if (PrintMachineCode)  // Print the register-allocated code
 250     PM.add(createMachineFunctionPrinterPass(cerr));
 251
 252   PM.add(createLowerSubregsPass());
 253
 254   if (PrintMachineCode)  // Print the subreg lowered code
 255     PM.add(createMachineFunctionPrinterPass(cerr));
 256
 257   // Insert prolog/epilog code.  Eliminate abstract frame index references...
 258   PM.add(createPrologEpilogCodeInserter());
 259
 260   if (PrintMachineCode)
 261     PM.add(createMachineFunctionPrinterPass(cerr));
 262
 263   // Second pass scheduler.
 264   if (!Fast)
 265     PM.add(createPostRAScheduler());
 266
 267   // Branch folding must be run after regalloc and prolog/epilog insertion.
 268   if (!Fast)
 269     PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
 270
 271   PM.add(createGCMachineCodeAnalysisPass());
 272
 273   if (PrintMachineCode)
 274     PM.add(createMachineFunctionPrinterPass(cerr));
 275
 276   if (PrintGCInfo)
 277     PM.add(createGCInfoPrinter(*cerr));
 278
 279   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
 280     PM.add(createMachineFunctionPrinterPass(cerr));
 281
 282   addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
 283
 284   PM.add(createGCInfoDeleter());
 285
 286   // Delete machine code for this function
 287   PM.add(createMachineCodeDeleter());
 288
 289   return false; // success!
 290 }