1 //===-- IfConversion.cpp - Machine code if conversion pass. ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the machine instruction level if-conversion pass.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/Passes.h"
15 #include "BranchFolding.h"
16 #include "llvm/ADT/STLExtras.h"
17 #include "llvm/ADT/SmallSet.h"
18 #include "llvm/ADT/Statistic.h"
19 #include "llvm/CodeGen/LivePhysRegs.h"
20 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
21 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineModuleInfo.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/TargetSchedule.h"
27 #include "llvm/MC/MCInstrItineraries.h"
28 #include "llvm/Support/CommandLine.h"
29 #include "llvm/Support/Debug.h"
30 #include "llvm/Support/ErrorHandling.h"
31 #include "llvm/Support/raw_ostream.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetMachine.h"
35 #include "llvm/Target/TargetRegisterInfo.h"
36 #include "llvm/Target/TargetSubtargetInfo.h"
40 #define DEBUG_TYPE "ifcvt"
42 // Hidden options for help debugging.
43 static cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden);
44 static cl::opt<int> IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden);
45 static cl::opt<int> IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden);
46 static cl::opt<bool> DisableSimple("disable-ifcvt-simple",
47 cl::init(false), cl::Hidden);
48 static cl::opt<bool> DisableSimpleF("disable-ifcvt-simple-false",
49 cl::init(false), cl::Hidden);
50 static cl::opt<bool> DisableTriangle("disable-ifcvt-triangle",
51 cl::init(false), cl::Hidden);
52 static cl::opt<bool> DisableTriangleR("disable-ifcvt-triangle-rev",
53 cl::init(false), cl::Hidden);
54 static cl::opt<bool> DisableTriangleF("disable-ifcvt-triangle-false",
55 cl::init(false), cl::Hidden);
56 static cl::opt<bool> DisableTriangleFR("disable-ifcvt-triangle-false-rev",
57 cl::init(false), cl::Hidden);
58 static cl::opt<bool> DisableDiamond("disable-ifcvt-diamond",
59 cl::init(false), cl::Hidden);
60 static cl::opt<bool> IfCvtBranchFold("ifcvt-branch-fold",
61 cl::init(true), cl::Hidden);
63 STATISTIC(NumSimple, "Number of simple if-conversions performed");
64 STATISTIC(NumSimpleFalse, "Number of simple (F) if-conversions performed");
65 STATISTIC(NumTriangle, "Number of triangle if-conversions performed");
66 STATISTIC(NumTriangleRev, "Number of triangle (R) if-conversions performed");
67 STATISTIC(NumTriangleFalse,"Number of triangle (F) if-conversions performed");
68 STATISTIC(NumTriangleFRev, "Number of triangle (F/R) if-conversions performed");
69 STATISTIC(NumDiamonds, "Number of diamond if-conversions performed");
70 STATISTIC(NumIfConvBBs, "Number of if-converted blocks");
71 STATISTIC(NumDupBBs, "Number of duplicated blocks");
72 STATISTIC(NumUnpred, "Number of true blocks of diamonds unpredicated");
75 class IfConverter : public MachineFunctionPass {
77 ICNotClassfied, // BB data valid, but not classified.
78 ICSimpleFalse, // Same as ICSimple, but on the false path.
79 ICSimple, // BB is entry of an one split, no rejoin sub-CFG.
80 ICTriangleFRev, // Same as ICTriangleFalse, but false path rev condition.
81 ICTriangleRev, // Same as ICTriangle, but true path rev condition.
82 ICTriangleFalse, // Same as ICTriangle, but on the false path.
83 ICTriangle, // BB is entry of a triangle sub-CFG.
84 ICDiamond // BB is entry of a diamond sub-CFG.
87 /// BBInfo - One per MachineBasicBlock, this is used to cache the result
88 /// if-conversion feasibility analysis. This includes results from
89 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
90 /// classification, and common tail block of its successors (if it's a
91 /// diamond shape), its size, whether it's predicable, and whether any
92 /// instruction can clobber the 'would-be' predicate.
94 /// IsDone - True if BB is not to be considered for ifcvt.
95 /// IsBeingAnalyzed - True if BB is currently being analyzed.
96 /// IsAnalyzed - True if BB has been analyzed (info is still valid).
97 /// IsEnqueued - True if BB has been enqueued to be ifcvt'ed.
98 /// IsBrAnalyzable - True if AnalyzeBranch() returns false.
99 /// HasFallThrough - True if BB may fallthrough to the following BB.
100 /// IsUnpredicable - True if BB is known to be unpredicable.
101 /// ClobbersPred - True if BB could modify predicates (e.g. has
103 /// NonPredSize - Number of non-predicated instructions.
104 /// ExtraCost - Extra cost for multi-cycle instructions.
105 /// ExtraCost2 - Some instructions are slower when predicated
106 /// BB - Corresponding MachineBasicBlock.
107 /// TrueBB / FalseBB- See AnalyzeBranch().
108 /// BrCond - Conditions for end of block conditional branches.
109 /// Predicate - Predicate used in the BB.
112 bool IsBeingAnalyzed : 1;
115 bool IsBrAnalyzable : 1;
116 bool HasFallThrough : 1;
117 bool IsUnpredicable : 1;
118 bool CannotBeCopied : 1;
119 bool ClobbersPred : 1;
120 unsigned NonPredSize;
123 MachineBasicBlock *BB;
124 MachineBasicBlock *TrueBB;
125 MachineBasicBlock *FalseBB;
126 SmallVector<MachineOperand, 4> BrCond;
127 SmallVector<MachineOperand, 4> Predicate;
128 BBInfo() : IsDone(false), IsBeingAnalyzed(false),
129 IsAnalyzed(false), IsEnqueued(false), IsBrAnalyzable(false),
130 HasFallThrough(false), IsUnpredicable(false),
131 CannotBeCopied(false), ClobbersPred(false), NonPredSize(0),
132 ExtraCost(0), ExtraCost2(0), BB(nullptr), TrueBB(nullptr),
136 /// IfcvtToken - Record information about pending if-conversions to attempt:
137 /// BBI - Corresponding BBInfo.
138 /// Kind - Type of block. See IfcvtKind.
139 /// NeedSubsumption - True if the to-be-predicated BB has already been
141 /// NumDups - Number of instructions that would be duplicated due
142 /// to this if-conversion. (For diamonds, the number of
143 /// identical instructions at the beginnings of both
145 /// NumDups2 - For diamonds, the number of identical instructions
146 /// at the ends of both paths.
150 bool NeedSubsumption;
153 IfcvtToken(BBInfo &b, IfcvtKind k, bool s, unsigned d, unsigned d2 = 0)
154 : BBI(b), Kind(k), NeedSubsumption(s), NumDups(d), NumDups2(d2) {}
157 /// BBAnalysis - Results of if-conversion feasibility analysis indexed by
158 /// basic block number.
159 std::vector<BBInfo> BBAnalysis;
160 TargetSchedModel SchedModel;
162 const TargetLoweringBase *TLI;
163 const TargetInstrInfo *TII;
164 const TargetRegisterInfo *TRI;
165 const MachineBlockFrequencyInfo *MBFI;
166 const MachineBranchProbabilityInfo *MBPI;
167 MachineRegisterInfo *MRI;
170 LivePhysRegs DontKill;
177 IfConverter() : MachineFunctionPass(ID), FnNum(-1) {
178 initializeIfConverterPass(*PassRegistry::getPassRegistry());
181 void getAnalysisUsage(AnalysisUsage &AU) const override {
182 AU.addRequired<MachineBlockFrequencyInfo>();
183 AU.addRequired<MachineBranchProbabilityInfo>();
184 MachineFunctionPass::getAnalysisUsage(AU);
187 bool runOnMachineFunction(MachineFunction &MF) override;
190 bool ReverseBranchCondition(BBInfo &BBI);
191 bool ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
192 const BranchProbability &Prediction) const;
193 bool ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
194 bool FalseBranch, unsigned &Dups,
195 const BranchProbability &Prediction) const;
196 bool ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
197 unsigned &Dups1, unsigned &Dups2) const;
198 void ScanInstructions(BBInfo &BBI);
199 BBInfo &AnalyzeBlock(MachineBasicBlock *BB,
200 std::vector<IfcvtToken*> &Tokens);
201 bool FeasibilityAnalysis(BBInfo &BBI, SmallVectorImpl<MachineOperand> &Cond,
202 bool isTriangle = false, bool RevBranch = false);
203 void AnalyzeBlocks(MachineFunction &MF, std::vector<IfcvtToken*> &Tokens);
204 void InvalidatePreds(MachineBasicBlock *BB);
205 void RemoveExtraEdges(BBInfo &BBI);
206 bool IfConvertSimple(BBInfo &BBI, IfcvtKind Kind);
207 bool IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind);
208 bool IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
209 unsigned NumDups1, unsigned NumDups2);
210 void PredicateBlock(BBInfo &BBI,
211 MachineBasicBlock::iterator E,
212 SmallVectorImpl<MachineOperand> &Cond,
213 SmallSet<unsigned, 4> *LaterRedefs = nullptr);
214 void CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
215 SmallVectorImpl<MachineOperand> &Cond,
216 bool IgnoreBr = false);
217 void MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges = true);
219 bool MeetIfcvtSizeLimit(MachineBasicBlock &BB,
220 unsigned Cycle, unsigned Extra,
221 const BranchProbability &Prediction) const {
222 return Cycle > 0 && TII->isProfitableToIfCvt(BB, Cycle, Extra,
226 bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB,
227 unsigned TCycle, unsigned TExtra,
228 MachineBasicBlock &FBB,
229 unsigned FCycle, unsigned FExtra,
230 const BranchProbability &Prediction) const {
231 return TCycle > 0 && FCycle > 0 &&
232 TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
236 // blockAlwaysFallThrough - Block ends without a terminator.
237 bool blockAlwaysFallThrough(BBInfo &BBI) const {
238 return BBI.IsBrAnalyzable && BBI.TrueBB == nullptr;
241 // IfcvtTokenCmp - Used to sort if-conversion candidates.
242 static bool IfcvtTokenCmp(IfcvtToken *C1, IfcvtToken *C2) {
243 int Incr1 = (C1->Kind == ICDiamond)
244 ? -(int)(C1->NumDups + C1->NumDups2) : (int)C1->NumDups;
245 int Incr2 = (C2->Kind == ICDiamond)
246 ? -(int)(C2->NumDups + C2->NumDups2) : (int)C2->NumDups;
249 else if (Incr1 == Incr2) {
250 // Favors subsumption.
251 if (C1->NeedSubsumption == false && C2->NeedSubsumption == true)
253 else if (C1->NeedSubsumption == C2->NeedSubsumption) {
254 // Favors diamond over triangle, etc.
255 if ((unsigned)C1->Kind < (unsigned)C2->Kind)
257 else if (C1->Kind == C2->Kind)
258 return C1->BBI.BB->getNumber() < C2->BBI.BB->getNumber();
265 char IfConverter::ID = 0;
268 char &llvm::IfConverterID = IfConverter::ID;
270 INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, false)
271 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
272 INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, false)
274 bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
275 TLI = MF.getSubtarget().getTargetLowering();
276 TII = MF.getSubtarget().getInstrInfo();
277 TRI = MF.getSubtarget().getRegisterInfo();
278 MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
279 MBPI = &getAnalysis<MachineBranchProbabilityInfo>();
280 MRI = &MF.getRegInfo();
282 const TargetSubtargetInfo &ST =
283 MF.getTarget().getSubtarget<TargetSubtargetInfo>();
284 SchedModel.init(*ST.getSchedModel(), &ST, TII);
286 if (!TII) return false;
288 PreRegAlloc = MRI->isSSA();
290 bool BFChange = false;
292 // Tail merge tend to expose more if-conversion opportunities.
293 BranchFolder BF(true, false, *MBFI, *MBPI);
294 BFChange = BF.OptimizeFunction(MF, TII, MF.getSubtarget().getRegisterInfo(),
295 getAnalysisIfAvailable<MachineModuleInfo>());
298 DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum << ") \'"
299 << MF.getName() << "\'");
301 if (FnNum < IfCvtFnStart || (IfCvtFnStop != -1 && FnNum > IfCvtFnStop)) {
302 DEBUG(dbgs() << " skipped\n");
305 DEBUG(dbgs() << "\n");
308 BBAnalysis.resize(MF.getNumBlockIDs());
310 std::vector<IfcvtToken*> Tokens;
312 unsigned NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle +
313 NumTriangleRev + NumTriangleFalse + NumTriangleFRev + NumDiamonds;
314 while (IfCvtLimit == -1 || (int)NumIfCvts < IfCvtLimit) {
315 // Do an initial analysis for each basic block and find all the potential
316 // candidates to perform if-conversion.
318 AnalyzeBlocks(MF, Tokens);
319 while (!Tokens.empty()) {
320 IfcvtToken *Token = Tokens.back();
322 BBInfo &BBI = Token->BBI;
323 IfcvtKind Kind = Token->Kind;
324 unsigned NumDups = Token->NumDups;
325 unsigned NumDups2 = Token->NumDups2;
329 // If the block has been evicted out of the queue or it has already been
330 // marked dead (due to it being predicated), then skip it.
332 BBI.IsEnqueued = false;
336 BBI.IsEnqueued = false;
340 default: llvm_unreachable("Unexpected!");
342 case ICSimpleFalse: {
343 bool isFalse = Kind == ICSimpleFalse;
344 if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break;
345 DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ?
347 << "): BB#" << BBI.BB->getNumber() << " ("
348 << ((Kind == ICSimpleFalse)
349 ? BBI.FalseBB->getNumber()
350 : BBI.TrueBB->getNumber()) << ") ");
351 RetVal = IfConvertSimple(BBI, Kind);
352 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
354 if (isFalse) ++NumSimpleFalse;
361 case ICTriangleFalse:
362 case ICTriangleFRev: {
363 bool isFalse = Kind == ICTriangleFalse;
364 bool isRev = (Kind == ICTriangleRev || Kind == ICTriangleFRev);
365 if (DisableTriangle && !isFalse && !isRev) break;
366 if (DisableTriangleR && !isFalse && isRev) break;
367 if (DisableTriangleF && isFalse && !isRev) break;
368 if (DisableTriangleFR && isFalse && isRev) break;
369 DEBUG(dbgs() << "Ifcvt (Triangle");
371 DEBUG(dbgs() << " false");
373 DEBUG(dbgs() << " rev");
374 DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:"
375 << BBI.TrueBB->getNumber() << ",F:"
376 << BBI.FalseBB->getNumber() << ") ");
377 RetVal = IfConvertTriangle(BBI, Kind);
378 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
381 if (isRev) ++NumTriangleFRev;
382 else ++NumTriangleFalse;
384 if (isRev) ++NumTriangleRev;
391 if (DisableDiamond) break;
392 DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:"
393 << BBI.TrueBB->getNumber() << ",F:"
394 << BBI.FalseBB->getNumber() << ") ");
395 RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2);
396 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
397 if (RetVal) ++NumDiamonds;
404 NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + NumTriangleRev +
405 NumTriangleFalse + NumTriangleFRev + NumDiamonds;
406 if (IfCvtLimit != -1 && (int)NumIfCvts >= IfCvtLimit)
412 MadeChange |= Change;
415 // Delete tokens in case of early exit.
416 while (!Tokens.empty()) {
417 IfcvtToken *Token = Tokens.back();
425 if (MadeChange && IfCvtBranchFold) {
426 BranchFolder BF(false, false, *MBFI, *MBPI);
427 BF.OptimizeFunction(MF, TII, MF.getSubtarget().getRegisterInfo(),
428 getAnalysisIfAvailable<MachineModuleInfo>());
431 MadeChange |= BFChange;
435 /// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
436 /// its 'true' successor.
437 static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB,
438 MachineBasicBlock *TrueBB) {
439 for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
440 E = BB->succ_end(); SI != E; ++SI) {
441 MachineBasicBlock *SuccBB = *SI;
442 if (SuccBB != TrueBB)
448 /// ReverseBranchCondition - Reverse the condition of the end of the block
449 /// branch. Swap block's 'true' and 'false' successors.
450 bool IfConverter::ReverseBranchCondition(BBInfo &BBI) {
451 DebugLoc dl; // FIXME: this is nowhere
452 if (!TII->ReverseBranchCondition(BBI.BrCond)) {
453 TII->RemoveBranch(*BBI.BB);
454 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
455 std::swap(BBI.TrueBB, BBI.FalseBB);
461 /// getNextBlock - Returns the next block in the function blocks ordering. If
462 /// it is the end, returns NULL.
463 static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) {
464 MachineFunction::iterator I = BB;
465 MachineFunction::iterator E = BB->getParent()->end();
471 /// ValidSimple - Returns true if the 'true' block (along with its
472 /// predecessor) forms a valid simple shape for ifcvt. It also returns the
473 /// number of instructions that the ifcvt would need to duplicate if performed
475 bool IfConverter::ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
476 const BranchProbability &Prediction) const {
478 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
481 if (TrueBBI.IsBrAnalyzable)
484 if (TrueBBI.BB->pred_size() > 1) {
485 if (TrueBBI.CannotBeCopied ||
486 !TII->isProfitableToDupForIfCvt(*TrueBBI.BB, TrueBBI.NonPredSize,
489 Dups = TrueBBI.NonPredSize;
495 /// ValidTriangle - Returns true if the 'true' and 'false' blocks (along
496 /// with their common predecessor) forms a valid triangle shape for ifcvt.
497 /// If 'FalseBranch' is true, it checks if 'true' block's false branch
498 /// branches to the 'false' block rather than the other way around. It also
499 /// returns the number of instructions that the ifcvt would need to duplicate
500 /// if performed in 'Dups'.
501 bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
502 bool FalseBranch, unsigned &Dups,
503 const BranchProbability &Prediction) const {
505 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
508 if (TrueBBI.BB->pred_size() > 1) {
509 if (TrueBBI.CannotBeCopied)
512 unsigned Size = TrueBBI.NonPredSize;
513 if (TrueBBI.IsBrAnalyzable) {
514 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
515 // Ends with an unconditional branch. It will be removed.
518 MachineBasicBlock *FExit = FalseBranch
519 ? TrueBBI.TrueBB : TrueBBI.FalseBB;
521 // Require a conditional branch
525 if (!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, Size, Prediction))
530 MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB;
531 if (!TExit && blockAlwaysFallThrough(TrueBBI)) {
532 MachineFunction::iterator I = TrueBBI.BB;
533 if (++I == TrueBBI.BB->getParent()->end())
537 return TExit && TExit == FalseBBI.BB;
540 /// ValidDiamond - Returns true if the 'true' and 'false' blocks (along
541 /// with their common predecessor) forms a valid diamond shape for ifcvt.
542 bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
543 unsigned &Dups1, unsigned &Dups2) const {
545 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone ||
546 FalseBBI.IsBeingAnalyzed || FalseBBI.IsDone)
549 MachineBasicBlock *TT = TrueBBI.TrueBB;
550 MachineBasicBlock *FT = FalseBBI.TrueBB;
552 if (!TT && blockAlwaysFallThrough(TrueBBI))
553 TT = getNextBlock(TrueBBI.BB);
554 if (!FT && blockAlwaysFallThrough(FalseBBI))
555 FT = getNextBlock(FalseBBI.BB);
558 if (!TT && (TrueBBI.IsBrAnalyzable || FalseBBI.IsBrAnalyzable))
560 if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
563 // FIXME: Allow true block to have an early exit?
564 if (TrueBBI.FalseBB || FalseBBI.FalseBB ||
565 (TrueBBI.ClobbersPred && FalseBBI.ClobbersPred))
568 // Count duplicate instructions at the beginning of the true and false blocks.
569 MachineBasicBlock::iterator TIB = TrueBBI.BB->begin();
570 MachineBasicBlock::iterator FIB = FalseBBI.BB->begin();
571 MachineBasicBlock::iterator TIE = TrueBBI.BB->end();
572 MachineBasicBlock::iterator FIE = FalseBBI.BB->end();
573 while (TIB != TIE && FIB != FIE) {
574 // Skip dbg_value instructions. These do not count.
575 if (TIB->isDebugValue()) {
576 while (TIB != TIE && TIB->isDebugValue())
581 if (FIB->isDebugValue()) {
582 while (FIB != FIE && FIB->isDebugValue())
587 if (!TIB->isIdenticalTo(FIB))
594 // Now, in preparation for counting duplicate instructions at the ends of the
595 // blocks, move the end iterators up past any branch instructions.
598 if (!TIE->isBranch())
603 if (!FIE->isBranch())
607 // If Dups1 includes all of a block, then don't count duplicate
608 // instructions at the end of the blocks.
609 if (TIB == TIE || FIB == FIE)
612 // Count duplicate instructions at the ends of the blocks.
613 while (TIE != TIB && FIE != FIB) {
614 // Skip dbg_value instructions. These do not count.
615 if (TIE->isDebugValue()) {
616 while (TIE != TIB && TIE->isDebugValue())
621 if (FIE->isDebugValue()) {
622 while (FIE != FIB && FIE->isDebugValue())
627 if (!TIE->isIdenticalTo(FIE))
637 /// ScanInstructions - Scan all the instructions in the block to determine if
638 /// the block is predicable. In most cases, that means all the instructions
639 /// in the block are isPredicable(). Also checks if the block contains any
640 /// instruction which can clobber a predicate (e.g. condition code register).
641 /// If so, the block is not predicable unless it's the last instruction.
642 void IfConverter::ScanInstructions(BBInfo &BBI) {
646 bool AlreadyPredicated = !BBI.Predicate.empty();
647 // First analyze the end of BB branches.
648 BBI.TrueBB = BBI.FalseBB = nullptr;
651 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
652 BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == nullptr;
654 if (BBI.BrCond.size()) {
655 // No false branch. This BB must end with a conditional branch and a
658 BBI.FalseBB = findFalseBlock(BBI.BB, BBI.TrueBB);
660 // Malformed bcc? True and false blocks are the same?
661 BBI.IsUnpredicable = true;
666 // Then scan all the instructions.
670 BBI.ClobbersPred = false;
671 for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end();
673 if (I->isDebugValue())
676 if (I->isNotDuplicable())
677 BBI.CannotBeCopied = true;
679 bool isPredicated = TII->isPredicated(I);
680 bool isCondBr = BBI.IsBrAnalyzable && I->isConditionalBranch();
682 // A conditional branch is not predicable, but it may be eliminated.
688 unsigned ExtraPredCost = TII->getPredicationCost(&*I);
689 unsigned NumCycles = SchedModel.computeInstrLatency(&*I, false);
691 BBI.ExtraCost += NumCycles-1;
692 BBI.ExtraCost2 += ExtraPredCost;
693 } else if (!AlreadyPredicated) {
694 // FIXME: This instruction is already predicated before the
695 // if-conversion pass. It's probably something like a conditional move.
696 // Mark this block unpredicable for now.
697 BBI.IsUnpredicable = true;
701 if (BBI.ClobbersPred && !isPredicated) {
702 // Predicate modification instruction should end the block (except for
703 // already predicated instructions and end of block branches).
704 // Predicate may have been modified, the subsequent (currently)
705 // unpredicated instructions cannot be correctly predicated.
706 BBI.IsUnpredicable = true;
710 // FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are
711 // still potentially predicable.
712 std::vector<MachineOperand> PredDefs;
713 if (TII->DefinesPredicate(I, PredDefs))
714 BBI.ClobbersPred = true;
716 if (!TII->isPredicable(I)) {
717 BBI.IsUnpredicable = true;
723 /// FeasibilityAnalysis - Determine if the block is a suitable candidate to be
724 /// predicated by the specified predicate.
725 bool IfConverter::FeasibilityAnalysis(BBInfo &BBI,
726 SmallVectorImpl<MachineOperand> &Pred,
727 bool isTriangle, bool RevBranch) {
728 // If the block is dead or unpredicable, then it cannot be predicated.
729 if (BBI.IsDone || BBI.IsUnpredicable)
732 // If it is already predicated, check if the new predicate subsumes
734 if (BBI.Predicate.size() && !TII->SubsumesPredicate(Pred, BBI.Predicate))
737 if (BBI.BrCond.size()) {
741 // Test predicate subsumption.
742 SmallVector<MachineOperand, 4> RevPred(Pred.begin(), Pred.end());
743 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
745 if (TII->ReverseBranchCondition(Cond))
748 if (TII->ReverseBranchCondition(RevPred) ||
749 !TII->SubsumesPredicate(Cond, RevPred))
756 /// AnalyzeBlock - Analyze the structure of the sub-CFG starting from
757 /// the specified block. Record its successors and whether it looks like an
758 /// if-conversion candidate.
759 IfConverter::BBInfo &IfConverter::AnalyzeBlock(MachineBasicBlock *BB,
760 std::vector<IfcvtToken*> &Tokens) {
761 BBInfo &BBI = BBAnalysis[BB->getNumber()];
763 if (BBI.IsAnalyzed || BBI.IsBeingAnalyzed)
767 BBI.IsBeingAnalyzed = true;
769 ScanInstructions(BBI);
771 // Unanalyzable or ends with fallthrough or unconditional branch, or if is not
772 // considered for ifcvt anymore.
773 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) {
774 BBI.IsBeingAnalyzed = false;
775 BBI.IsAnalyzed = true;
779 // Do not ifcvt if either path is a back edge to the entry block.
780 if (BBI.TrueBB == BB || BBI.FalseBB == BB) {
781 BBI.IsBeingAnalyzed = false;
782 BBI.IsAnalyzed = true;
786 // Do not ifcvt if true and false fallthrough blocks are the same.
788 BBI.IsBeingAnalyzed = false;
789 BBI.IsAnalyzed = true;
793 BBInfo &TrueBBI = AnalyzeBlock(BBI.TrueBB, Tokens);
794 BBInfo &FalseBBI = AnalyzeBlock(BBI.FalseBB, Tokens);
796 if (TrueBBI.IsDone && FalseBBI.IsDone) {
797 BBI.IsBeingAnalyzed = false;
798 BBI.IsAnalyzed = true;
802 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
803 bool CanRevCond = !TII->ReverseBranchCondition(RevCond);
807 bool TNeedSub = !TrueBBI.Predicate.empty();
808 bool FNeedSub = !FalseBBI.Predicate.empty();
809 bool Enqueued = false;
811 BranchProbability Prediction = MBPI->getEdgeProbability(BB, TrueBBI.BB);
813 if (CanRevCond && ValidDiamond(TrueBBI, FalseBBI, Dups, Dups2) &&
814 MeetIfcvtSizeLimit(*TrueBBI.BB, (TrueBBI.NonPredSize - (Dups + Dups2) +
815 TrueBBI.ExtraCost), TrueBBI.ExtraCost2,
816 *FalseBBI.BB, (FalseBBI.NonPredSize - (Dups + Dups2) +
817 FalseBBI.ExtraCost),FalseBBI.ExtraCost2,
819 FeasibilityAnalysis(TrueBBI, BBI.BrCond) &&
820 FeasibilityAnalysis(FalseBBI, RevCond)) {
828 // Note TailBB can be empty.
829 Tokens.push_back(new IfcvtToken(BBI, ICDiamond, TNeedSub|FNeedSub, Dups,
834 if (ValidTriangle(TrueBBI, FalseBBI, false, Dups, Prediction) &&
835 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
836 TrueBBI.ExtraCost2, Prediction) &&
837 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) {
845 Tokens.push_back(new IfcvtToken(BBI, ICTriangle, TNeedSub, Dups));
849 if (ValidTriangle(TrueBBI, FalseBBI, true, Dups, Prediction) &&
850 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
851 TrueBBI.ExtraCost2, Prediction) &&
852 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) {
853 Tokens.push_back(new IfcvtToken(BBI, ICTriangleRev, TNeedSub, Dups));
857 if (ValidSimple(TrueBBI, Dups, Prediction) &&
858 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
859 TrueBBI.ExtraCost2, Prediction) &&
860 FeasibilityAnalysis(TrueBBI, BBI.BrCond)) {
861 // Simple (split, no rejoin):
868 Tokens.push_back(new IfcvtToken(BBI, ICSimple, TNeedSub, Dups));
873 // Try the other path...
874 if (ValidTriangle(FalseBBI, TrueBBI, false, Dups,
875 Prediction.getCompl()) &&
876 MeetIfcvtSizeLimit(*FalseBBI.BB,
877 FalseBBI.NonPredSize + FalseBBI.ExtraCost,
878 FalseBBI.ExtraCost2, Prediction.getCompl()) &&
879 FeasibilityAnalysis(FalseBBI, RevCond, true)) {
880 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFalse, FNeedSub, Dups));
884 if (ValidTriangle(FalseBBI, TrueBBI, true, Dups,
885 Prediction.getCompl()) &&
886 MeetIfcvtSizeLimit(*FalseBBI.BB,
887 FalseBBI.NonPredSize + FalseBBI.ExtraCost,
888 FalseBBI.ExtraCost2, Prediction.getCompl()) &&
889 FeasibilityAnalysis(FalseBBI, RevCond, true, true)) {
890 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFRev, FNeedSub, Dups));
894 if (ValidSimple(FalseBBI, Dups, Prediction.getCompl()) &&
895 MeetIfcvtSizeLimit(*FalseBBI.BB,
896 FalseBBI.NonPredSize + FalseBBI.ExtraCost,
897 FalseBBI.ExtraCost2, Prediction.getCompl()) &&
898 FeasibilityAnalysis(FalseBBI, RevCond)) {
899 Tokens.push_back(new IfcvtToken(BBI, ICSimpleFalse, FNeedSub, Dups));
904 BBI.IsEnqueued = Enqueued;
905 BBI.IsBeingAnalyzed = false;
906 BBI.IsAnalyzed = true;
910 /// AnalyzeBlocks - Analyze all blocks and find entries for all if-conversion
912 void IfConverter::AnalyzeBlocks(MachineFunction &MF,
913 std::vector<IfcvtToken*> &Tokens) {
914 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
915 MachineBasicBlock *BB = I;
916 AnalyzeBlock(BB, Tokens);
919 // Sort to favor more complex ifcvt scheme.
920 std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp);
923 /// canFallThroughTo - Returns true either if ToBB is the next block after BB or
924 /// that all the intervening blocks are empty (given BB can fall through to its
926 static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) {
927 MachineFunction::iterator PI = BB;
928 MachineFunction::iterator I = std::next(PI);
929 MachineFunction::iterator TI = ToBB;
930 MachineFunction::iterator E = BB->getParent()->end();
932 // Check isSuccessor to avoid case where the next block is empty, but
933 // it's not a successor.
934 if (I == E || !I->empty() || !PI->isSuccessor(I))
941 /// InvalidatePreds - Invalidate predecessor BB info so it would be re-analyzed
942 /// to determine if it can be if-converted. If predecessor is already enqueued,
944 void IfConverter::InvalidatePreds(MachineBasicBlock *BB) {
945 for (MachineBasicBlock::pred_iterator PI = BB->pred_begin(),
946 E = BB->pred_end(); PI != E; ++PI) {
947 BBInfo &PBBI = BBAnalysis[(*PI)->getNumber()];
948 if (PBBI.IsDone || PBBI.BB == BB)
950 PBBI.IsAnalyzed = false;
951 PBBI.IsEnqueued = false;
955 /// InsertUncondBranch - Inserts an unconditional branch from BB to ToBB.
957 static void InsertUncondBranch(MachineBasicBlock *BB, MachineBasicBlock *ToBB,
958 const TargetInstrInfo *TII) {
959 DebugLoc dl; // FIXME: this is nowhere
960 SmallVector<MachineOperand, 0> NoCond;
961 TII->InsertBranch(*BB, ToBB, nullptr, NoCond, dl);
964 /// RemoveExtraEdges - Remove true / false edges if either / both are no longer
966 void IfConverter::RemoveExtraEdges(BBInfo &BBI) {
967 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
968 SmallVector<MachineOperand, 4> Cond;
969 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
970 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
973 /// Behaves like LiveRegUnits::StepForward() but also adds implicit uses to all
974 /// values defined in MI which are not live/used by MI.
975 static void UpdatePredRedefs(MachineInstr *MI, LivePhysRegs &Redefs) {
976 for (ConstMIBundleOperands Ops(MI); Ops.isValid(); ++Ops) {
977 if (!Ops->isReg() || !Ops->isKill())
979 unsigned Reg = Ops->getReg();
982 Redefs.removeReg(Reg);
984 for (MIBundleOperands Ops(MI); Ops.isValid(); ++Ops) {
985 if (!Ops->isReg() || !Ops->isDef())
987 unsigned Reg = Ops->getReg();
988 if (Reg == 0 || Redefs.contains(Reg))
992 MachineOperand &Op = *Ops;
993 MachineInstr *MI = Op.getParent();
994 MachineInstrBuilder MIB(*MI->getParent()->getParent(), MI);
995 MIB.addReg(Reg, RegState::Implicit | RegState::Undef);
1000 * Remove kill flags from operands with a registers in the @p DontKill set.
1002 static void RemoveKills(MachineInstr &MI, const LivePhysRegs &DontKill) {
1003 for (MIBundleOperands O(&MI); O.isValid(); ++O) {
1004 if (!O->isReg() || !O->isKill())
1006 if (DontKill.contains(O->getReg()))
1007 O->setIsKill(false);
1012 * Walks a range of machine instructions and removes kill flags for registers
1013 * in the @p DontKill set.
1015 static void RemoveKills(MachineBasicBlock::iterator I,
1016 MachineBasicBlock::iterator E,
1017 const LivePhysRegs &DontKill,
1018 const MCRegisterInfo &MCRI) {
1019 for ( ; I != E; ++I)
1020 RemoveKills(*I, DontKill);
1023 /// IfConvertSimple - If convert a simple (split, no rejoin) sub-CFG.
1025 bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
1026 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1027 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1028 BBInfo *CvtBBI = &TrueBBI;
1029 BBInfo *NextBBI = &FalseBBI;
1031 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1032 if (Kind == ICSimpleFalse)
1033 std::swap(CvtBBI, NextBBI);
1035 if (CvtBBI->IsDone ||
1036 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1037 // Something has changed. It's no longer safe to predicate this block.
1038 BBI.IsAnalyzed = false;
1039 CvtBBI->IsAnalyzed = false;
1043 if (CvtBBI->BB->hasAddressTaken())
1044 // Conservatively abort if-conversion if BB's address is taken.
1047 if (Kind == ICSimpleFalse)
1048 if (TII->ReverseBranchCondition(Cond))
1049 llvm_unreachable("Unable to reverse branch condition!");
1051 // Initialize liveins to the first BB. These are potentiall redefined by
1052 // predicated instructions.
1054 Redefs.addLiveIns(CvtBBI->BB);
1055 Redefs.addLiveIns(NextBBI->BB);
1057 // Compute a set of registers which must not be killed by instructions in
1058 // BB1: This is everything live-in to BB2.
1060 DontKill.addLiveIns(NextBBI->BB);
1062 if (CvtBBI->BB->pred_size() > 1) {
1063 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1064 // Copy instructions in the true block, predicate them, and add them to
1066 CopyAndPredicateBlock(BBI, *CvtBBI, Cond);
1068 // RemoveExtraEdges won't work if the block has an unanalyzable branch, so
1069 // explicitly remove CvtBBI as a successor.
1070 BBI.BB->removeSuccessor(CvtBBI->BB);
1072 RemoveKills(CvtBBI->BB->begin(), CvtBBI->BB->end(), DontKill, *TRI);
1073 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond);
1075 // Merge converted block into entry block.
1076 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1077 MergeBlocks(BBI, *CvtBBI);
1080 bool IterIfcvt = true;
1081 if (!canFallThroughTo(BBI.BB, NextBBI->BB)) {
1082 InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1083 BBI.HasFallThrough = false;
1084 // Now ifcvt'd block will look like this:
1091 // We cannot further ifcvt this block because the unconditional branch
1092 // will have to be predicated on the new condition, that will not be
1093 // available if cmp executes.
1097 RemoveExtraEdges(BBI);
1099 // Update block info. BB can be iteratively if-converted.
1102 InvalidatePreds(BBI.BB);
1103 CvtBBI->IsDone = true;
1105 // FIXME: Must maintain LiveIns.
1109 /// Scale down weights to fit into uint32_t. NewTrue is the new weight
1110 /// for successor TrueBB, and NewFalse is the new weight for successor
1112 static void ScaleWeights(uint64_t NewTrue, uint64_t NewFalse,
1113 MachineBasicBlock *MBB,
1114 const MachineBasicBlock *TrueBB,
1115 const MachineBasicBlock *FalseBB,
1116 const MachineBranchProbabilityInfo *MBPI) {
1117 uint64_t NewMax = (NewTrue > NewFalse) ? NewTrue : NewFalse;
1118 uint32_t Scale = (NewMax / UINT32_MAX) + 1;
1119 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
1120 SE = MBB->succ_end();
1123 MBB->setSuccWeight(SI, (uint32_t)(NewTrue / Scale));
1124 else if (*SI == FalseBB)
1125 MBB->setSuccWeight(SI, (uint32_t)(NewFalse / Scale));
1127 MBB->setSuccWeight(SI, MBPI->getEdgeWeight(MBB, SI) / Scale);
1131 /// IfConvertTriangle - If convert a triangle sub-CFG.
1133 bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
1134 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1135 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1136 BBInfo *CvtBBI = &TrueBBI;
1137 BBInfo *NextBBI = &FalseBBI;
1138 DebugLoc dl; // FIXME: this is nowhere
1140 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1141 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1142 std::swap(CvtBBI, NextBBI);
1144 if (CvtBBI->IsDone ||
1145 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1146 // Something has changed. It's no longer safe to predicate this block.
1147 BBI.IsAnalyzed = false;
1148 CvtBBI->IsAnalyzed = false;
1152 if (CvtBBI->BB->hasAddressTaken())
1153 // Conservatively abort if-conversion if BB's address is taken.
1156 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1157 if (TII->ReverseBranchCondition(Cond))
1158 llvm_unreachable("Unable to reverse branch condition!");
1160 if (Kind == ICTriangleRev || Kind == ICTriangleFRev) {
1161 if (ReverseBranchCondition(*CvtBBI)) {
1162 // BB has been changed, modify its predecessors (except for this
1163 // one) so they don't get ifcvt'ed based on bad intel.
1164 for (MachineBasicBlock::pred_iterator PI = CvtBBI->BB->pred_begin(),
1165 E = CvtBBI->BB->pred_end(); PI != E; ++PI) {
1166 MachineBasicBlock *PBB = *PI;
1169 BBInfo &PBBI = BBAnalysis[PBB->getNumber()];
1170 if (PBBI.IsEnqueued) {
1171 PBBI.IsAnalyzed = false;
1172 PBBI.IsEnqueued = false;
1178 // Initialize liveins to the first BB. These are potentially redefined by
1179 // predicated instructions.
1181 Redefs.addLiveIns(CvtBBI->BB);
1182 Redefs.addLiveIns(NextBBI->BB);
1186 bool HasEarlyExit = CvtBBI->FalseBB != nullptr;
1187 uint64_t CvtNext = 0, CvtFalse = 0, BBNext = 0, BBCvt = 0, SumWeight = 0;
1188 uint32_t WeightScale = 0;
1190 // Get weights before modifying CvtBBI->BB and BBI.BB.
1191 CvtNext = MBPI->getEdgeWeight(CvtBBI->BB, NextBBI->BB);
1192 CvtFalse = MBPI->getEdgeWeight(CvtBBI->BB, CvtBBI->FalseBB);
1193 BBNext = MBPI->getEdgeWeight(BBI.BB, NextBBI->BB);
1194 BBCvt = MBPI->getEdgeWeight(BBI.BB, CvtBBI->BB);
1195 SumWeight = MBPI->getSumForBlock(CvtBBI->BB, WeightScale);
1197 if (CvtBBI->BB->pred_size() > 1) {
1198 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1199 // Copy instructions in the true block, predicate them, and add them to
1201 CopyAndPredicateBlock(BBI, *CvtBBI, Cond, true);
1203 // RemoveExtraEdges won't work if the block has an unanalyzable branch, so
1204 // explicitly remove CvtBBI as a successor.
1205 BBI.BB->removeSuccessor(CvtBBI->BB);
1207 // Predicate the 'true' block after removing its branch.
1208 CvtBBI->NonPredSize -= TII->RemoveBranch(*CvtBBI->BB);
1209 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond);
1211 // Now merge the entry of the triangle with the true block.
1212 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1213 MergeBlocks(BBI, *CvtBBI, false);
1216 // If 'true' block has a 'false' successor, add an exit branch to it.
1218 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(),
1219 CvtBBI->BrCond.end());
1220 if (TII->ReverseBranchCondition(RevCond))
1221 llvm_unreachable("Unable to reverse branch condition!");
1222 TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, nullptr, RevCond, dl);
1223 BBI.BB->addSuccessor(CvtBBI->FalseBB);
1224 // Update the edge weight for both CvtBBI->FalseBB and NextBBI.
1225 // New_Weight(BBI.BB, NextBBI->BB) =
1226 // Weight(BBI.BB, NextBBI->BB) * getSumForBlock(CvtBBI->BB) +
1227 // Weight(BBI.BB, CvtBBI->BB) * Weight(CvtBBI->BB, NextBBI->BB)
1228 // New_Weight(BBI.BB, CvtBBI->FalseBB) =
1229 // Weight(BBI.BB, CvtBBI->BB) * Weight(CvtBBI->BB, CvtBBI->FalseBB)
1231 uint64_t NewNext = BBNext * SumWeight + (BBCvt * CvtNext) / WeightScale;
1232 uint64_t NewFalse = (BBCvt * CvtFalse) / WeightScale;
1233 // We need to scale down all weights of BBI.BB to fit uint32_t.
1234 // Here BBI.BB is connected to CvtBBI->FalseBB and will fall through to
1236 ScaleWeights(NewNext, NewFalse, BBI.BB, getNextBlock(BBI.BB),
1237 CvtBBI->FalseBB, MBPI);
1240 // Merge in the 'false' block if the 'false' block has no other
1241 // predecessors. Otherwise, add an unconditional branch to 'false'.
1242 bool FalseBBDead = false;
1243 bool IterIfcvt = true;
1244 bool isFallThrough = canFallThroughTo(BBI.BB, NextBBI->BB);
1245 if (!isFallThrough) {
1246 // Only merge them if the true block does not fallthrough to the false
1247 // block. By not merging them, we make it possible to iteratively
1248 // ifcvt the blocks.
1249 if (!HasEarlyExit &&
1250 NextBBI->BB->pred_size() == 1 && !NextBBI->HasFallThrough &&
1251 !NextBBI->BB->hasAddressTaken()) {
1252 MergeBlocks(BBI, *NextBBI);
1255 InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1256 BBI.HasFallThrough = false;
1258 // Mixed predicated and unpredicated code. This cannot be iteratively
1263 RemoveExtraEdges(BBI);
1265 // Update block info. BB can be iteratively if-converted.
1268 InvalidatePreds(BBI.BB);
1269 CvtBBI->IsDone = true;
1271 NextBBI->IsDone = true;
1273 // FIXME: Must maintain LiveIns.
1277 /// IfConvertDiamond - If convert a diamond sub-CFG.
1279 bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
1280 unsigned NumDups1, unsigned NumDups2) {
1281 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1282 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1283 MachineBasicBlock *TailBB = TrueBBI.TrueBB;
1284 // True block must fall through or end with an unanalyzable terminator.
1286 if (blockAlwaysFallThrough(TrueBBI))
1287 TailBB = FalseBBI.TrueBB;
1288 assert((TailBB || !TrueBBI.IsBrAnalyzable) && "Unexpected!");
1291 if (TrueBBI.IsDone || FalseBBI.IsDone ||
1292 TrueBBI.BB->pred_size() > 1 ||
1293 FalseBBI.BB->pred_size() > 1) {
1294 // Something has changed. It's no longer safe to predicate these blocks.
1295 BBI.IsAnalyzed = false;
1296 TrueBBI.IsAnalyzed = false;
1297 FalseBBI.IsAnalyzed = false;
1301 if (TrueBBI.BB->hasAddressTaken() || FalseBBI.BB->hasAddressTaken())
1302 // Conservatively abort if-conversion if either BB has its address taken.
1305 // Put the predicated instructions from the 'true' block before the
1306 // instructions from the 'false' block, unless the true block would clobber
1307 // the predicate, in which case, do the opposite.
1308 BBInfo *BBI1 = &TrueBBI;
1309 BBInfo *BBI2 = &FalseBBI;
1310 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
1311 if (TII->ReverseBranchCondition(RevCond))
1312 llvm_unreachable("Unable to reverse branch condition!");
1313 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond;
1314 SmallVector<MachineOperand, 4> *Cond2 = &RevCond;
1316 // Figure out the more profitable ordering.
1317 bool DoSwap = false;
1318 if (TrueBBI.ClobbersPred && !FalseBBI.ClobbersPred)
1320 else if (TrueBBI.ClobbersPred == FalseBBI.ClobbersPred) {
1321 if (TrueBBI.NonPredSize > FalseBBI.NonPredSize)
1325 std::swap(BBI1, BBI2);
1326 std::swap(Cond1, Cond2);
1329 // Remove the conditional branch from entry to the blocks.
1330 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1332 // Initialize liveins to the first BB. These are potentially redefined by
1333 // predicated instructions.
1335 Redefs.addLiveIns(BBI1->BB);
1337 // Remove the duplicated instructions at the beginnings of both paths.
1338 MachineBasicBlock::iterator DI1 = BBI1->BB->begin();
1339 MachineBasicBlock::iterator DI2 = BBI2->BB->begin();
1340 MachineBasicBlock::iterator DIE1 = BBI1->BB->end();
1341 MachineBasicBlock::iterator DIE2 = BBI2->BB->end();
1342 // Skip dbg_value instructions
1343 while (DI1 != DIE1 && DI1->isDebugValue())
1345 while (DI2 != DIE2 && DI2->isDebugValue())
1347 BBI1->NonPredSize -= NumDups1;
1348 BBI2->NonPredSize -= NumDups1;
1350 // Skip past the dups on each side separately since there may be
1351 // differing dbg_value entries.
1352 for (unsigned i = 0; i < NumDups1; ++DI1) {
1353 if (!DI1->isDebugValue())
1356 while (NumDups1 != 0) {
1358 if (!DI2->isDebugValue())
1362 // Compute a set of registers which must not be killed by instructions in BB1:
1363 // This is everything used+live in BB2 after the duplicated instructions. We
1364 // can compute this set by simulating liveness backwards from the end of BB2.
1366 for (MachineBasicBlock::reverse_iterator I = BBI2->BB->rbegin(),
1367 E = MachineBasicBlock::reverse_iterator(DI2); I != E; ++I) {
1368 DontKill.stepBackward(*I);
1371 for (MachineBasicBlock::const_iterator I = BBI1->BB->begin(), E = DI1; I != E;
1373 Redefs.stepForward(*I);
1375 BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1);
1376 BBI2->BB->erase(BBI2->BB->begin(), DI2);
1378 // Remove branch from 'true' block and remove duplicated instructions.
1379 BBI1->NonPredSize -= TII->RemoveBranch(*BBI1->BB);
1380 DI1 = BBI1->BB->end();
1381 for (unsigned i = 0; i != NumDups2; ) {
1382 // NumDups2 only counted non-dbg_value instructions, so this won't
1383 // run off the head of the list.
1384 assert (DI1 != BBI1->BB->begin());
1386 // skip dbg_value instructions
1387 if (!DI1->isDebugValue())
1390 BBI1->BB->erase(DI1, BBI1->BB->end());
1392 // Kill flags in the true block for registers living into the false block
1394 RemoveKills(BBI1->BB->begin(), BBI1->BB->end(), DontKill, *TRI);
1396 // Remove 'false' block branch and find the last instruction to predicate.
1397 BBI2->NonPredSize -= TII->RemoveBranch(*BBI2->BB);
1398 DI2 = BBI2->BB->end();
1399 while (NumDups2 != 0) {
1400 // NumDups2 only counted non-dbg_value instructions, so this won't
1401 // run off the head of the list.
1402 assert (DI2 != BBI2->BB->begin());
1404 // skip dbg_value instructions
1405 if (!DI2->isDebugValue())
1409 // Remember which registers would later be defined by the false block.
1410 // This allows us not to predicate instructions in the true block that would
1411 // later be re-defined. That is, rather than
1417 SmallSet<unsigned, 4> RedefsByFalse;
1418 SmallSet<unsigned, 4> ExtUses;
1419 if (TII->isProfitableToUnpredicate(*BBI1->BB, *BBI2->BB)) {
1420 for (MachineBasicBlock::iterator FI = BBI2->BB->begin(); FI != DI2; ++FI) {
1421 if (FI->isDebugValue())
1423 SmallVector<unsigned, 4> Defs;
1424 for (unsigned i = 0, e = FI->getNumOperands(); i != e; ++i) {
1425 const MachineOperand &MO = FI->getOperand(i);
1428 unsigned Reg = MO.getReg();
1432 Defs.push_back(Reg);
1433 } else if (!RedefsByFalse.count(Reg)) {
1434 // These are defined before ctrl flow reach the 'false' instructions.
1435 // They cannot be modified by the 'true' instructions.
1436 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1437 SubRegs.isValid(); ++SubRegs)
1438 ExtUses.insert(*SubRegs);
1442 for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
1443 unsigned Reg = Defs[i];
1444 if (!ExtUses.count(Reg)) {
1445 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1446 SubRegs.isValid(); ++SubRegs)
1447 RedefsByFalse.insert(*SubRegs);
1453 // Predicate the 'true' block.
1454 PredicateBlock(*BBI1, BBI1->BB->end(), *Cond1, &RedefsByFalse);
1456 // Predicate the 'false' block.
1457 PredicateBlock(*BBI2, DI2, *Cond2);
1459 // Merge the true block into the entry of the diamond.
1460 MergeBlocks(BBI, *BBI1, TailBB == nullptr);
1461 MergeBlocks(BBI, *BBI2, TailBB == nullptr);
1463 // If the if-converted block falls through or unconditionally branches into
1464 // the tail block, and the tail block does not have other predecessors, then
1465 // fold the tail block in as well. Otherwise, unless it falls through to the
1466 // tail, add a unconditional branch to it.
1468 BBInfo &TailBBI = BBAnalysis[TailBB->getNumber()];
1469 bool CanMergeTail = !TailBBI.HasFallThrough &&
1470 !TailBBI.BB->hasAddressTaken();
1471 // There may still be a fall-through edge from BBI1 or BBI2 to TailBB;
1472 // check if there are any other predecessors besides those.
1473 unsigned NumPreds = TailBB->pred_size();
1475 CanMergeTail = false;
1476 else if (NumPreds == 1 && CanMergeTail) {
1477 MachineBasicBlock::pred_iterator PI = TailBB->pred_begin();
1478 if (*PI != BBI1->BB && *PI != BBI2->BB)
1479 CanMergeTail = false;
1482 MergeBlocks(BBI, TailBBI);
1483 TailBBI.IsDone = true;
1485 BBI.BB->addSuccessor(TailBB);
1486 InsertUncondBranch(BBI.BB, TailBB, TII);
1487 BBI.HasFallThrough = false;
1491 // RemoveExtraEdges won't work if the block has an unanalyzable branch,
1492 // which can happen here if TailBB is unanalyzable and is merged, so
1493 // explicitly remove BBI1 and BBI2 as successors.
1494 BBI.BB->removeSuccessor(BBI1->BB);
1495 BBI.BB->removeSuccessor(BBI2->BB);
1496 RemoveExtraEdges(BBI);
1498 // Update block info.
1499 BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true;
1500 InvalidatePreds(BBI.BB);
1502 // FIXME: Must maintain LiveIns.
1506 static bool MaySpeculate(const MachineInstr *MI,
1507 SmallSet<unsigned, 4> &LaterRedefs,
1508 const TargetInstrInfo *TII) {
1509 bool SawStore = true;
1510 if (!MI->isSafeToMove(TII, nullptr, SawStore))
1513 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
1514 const MachineOperand &MO = MI->getOperand(i);
1517 unsigned Reg = MO.getReg();
1520 if (MO.isDef() && !LaterRedefs.count(Reg))
1527 /// PredicateBlock - Predicate instructions from the start of the block to the
1528 /// specified end with the specified condition.
1529 void IfConverter::PredicateBlock(BBInfo &BBI,
1530 MachineBasicBlock::iterator E,
1531 SmallVectorImpl<MachineOperand> &Cond,
1532 SmallSet<unsigned, 4> *LaterRedefs) {
1533 bool AnyUnpred = false;
1534 bool MaySpec = LaterRedefs != nullptr;
1535 for (MachineBasicBlock::iterator I = BBI.BB->begin(); I != E; ++I) {
1536 if (I->isDebugValue() || TII->isPredicated(I))
1538 // It may be possible not to predicate an instruction if it's the 'true'
1539 // side of a diamond and the 'false' side may re-define the instruction's
1541 if (MaySpec && MaySpeculate(I, *LaterRedefs, TII)) {
1545 // If any instruction is predicated, then every instruction after it must
1548 if (!TII->PredicateInstruction(I, Cond)) {
1550 dbgs() << "Unable to predicate " << *I << "!\n";
1552 llvm_unreachable(nullptr);
1555 // If the predicated instruction now redefines a register as the result of
1556 // if-conversion, add an implicit kill.
1557 UpdatePredRedefs(I, Redefs);
1560 std::copy(Cond.begin(), Cond.end(), std::back_inserter(BBI.Predicate));
1562 BBI.IsAnalyzed = false;
1563 BBI.NonPredSize = 0;
1570 /// CopyAndPredicateBlock - Copy and predicate instructions from source BB to
1571 /// the destination block. Skip end of block branches if IgnoreBr is true.
1572 void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
1573 SmallVectorImpl<MachineOperand> &Cond,
1575 MachineFunction &MF = *ToBBI.BB->getParent();
1577 for (MachineBasicBlock::iterator I = FromBBI.BB->begin(),
1578 E = FromBBI.BB->end(); I != E; ++I) {
1579 // Do not copy the end of the block branches.
1580 if (IgnoreBr && I->isBranch())
1583 MachineInstr *MI = MF.CloneMachineInstr(I);
1584 ToBBI.BB->insert(ToBBI.BB->end(), MI);
1585 ToBBI.NonPredSize++;
1586 unsigned ExtraPredCost = TII->getPredicationCost(&*I);
1587 unsigned NumCycles = SchedModel.computeInstrLatency(&*I, false);
1589 ToBBI.ExtraCost += NumCycles-1;
1590 ToBBI.ExtraCost2 += ExtraPredCost;
1592 if (!TII->isPredicated(I) && !MI->isDebugValue()) {
1593 if (!TII->PredicateInstruction(MI, Cond)) {
1595 dbgs() << "Unable to predicate " << *I << "!\n";
1597 llvm_unreachable(nullptr);
1601 // If the predicated instruction now redefines a register as the result of
1602 // if-conversion, add an implicit kill.
1603 UpdatePredRedefs(MI, Redefs);
1605 // Some kill flags may not be correct anymore.
1606 if (!DontKill.empty())
1607 RemoveKills(*MI, DontKill);
1611 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1612 FromBBI.BB->succ_end());
1613 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1614 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : nullptr;
1616 for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1617 MachineBasicBlock *Succ = Succs[i];
1618 // Fallthrough edge can't be transferred.
1619 if (Succ == FallThrough)
1621 ToBBI.BB->addSuccessor(Succ);
1625 std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
1626 std::back_inserter(ToBBI.Predicate));
1627 std::copy(Cond.begin(), Cond.end(), std::back_inserter(ToBBI.Predicate));
1629 ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1630 ToBBI.IsAnalyzed = false;
1635 /// MergeBlocks - Move all instructions from FromBB to the end of ToBB.
1636 /// This will leave FromBB as an empty block, so remove all of its
1637 /// successor edges except for the fall-through edge. If AddEdges is true,
1638 /// i.e., when FromBBI's branch is being moved, add those successor edges to
1640 void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges) {
1641 assert(!FromBBI.BB->hasAddressTaken() &&
1642 "Removing a BB whose address is taken!");
1644 ToBBI.BB->splice(ToBBI.BB->end(),
1645 FromBBI.BB, FromBBI.BB->begin(), FromBBI.BB->end());
1647 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1648 FromBBI.BB->succ_end());
1649 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1650 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : nullptr;
1652 for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1653 MachineBasicBlock *Succ = Succs[i];
1654 // Fallthrough edge can't be transferred.
1655 if (Succ == FallThrough)
1657 FromBBI.BB->removeSuccessor(Succ);
1658 if (AddEdges && !ToBBI.BB->isSuccessor(Succ))
1659 ToBBI.BB->addSuccessor(Succ);
1662 // Now FromBBI always falls through to the next block!
1663 if (NBB && !FromBBI.BB->isSuccessor(NBB))
1664 FromBBI.BB->addSuccessor(NBB);
1666 std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
1667 std::back_inserter(ToBBI.Predicate));
1668 FromBBI.Predicate.clear();
1670 ToBBI.NonPredSize += FromBBI.NonPredSize;
1671 ToBBI.ExtraCost += FromBBI.ExtraCost;
1672 ToBBI.ExtraCost2 += FromBBI.ExtraCost2;
1673 FromBBI.NonPredSize = 0;
1674 FromBBI.ExtraCost = 0;
1675 FromBBI.ExtraCost2 = 0;
1677 ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1678 ToBBI.HasFallThrough = FromBBI.HasFallThrough;
1679 ToBBI.IsAnalyzed = false;
1680 FromBBI.IsAnalyzed = false;