1 //===-- AsmPrinterDwarf.cpp - AsmPrinter Dwarf Support --------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the Dwarf emissions parts of AsmPrinter.
12 //===----------------------------------------------------------------------===//
14 #include "ByteStreamer.h"
15 #include "DwarfExpression.h"
16 #include "llvm/CodeGen/AsmPrinter.h"
17 #include "llvm/ADT/Twine.h"
18 #include "llvm/IR/DataLayout.h"
19 #include "llvm/MC/MCAsmInfo.h"
20 #include "llvm/MC/MCSection.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/MC/MCSymbol.h"
23 #include "llvm/MC/MachineLocation.h"
24 #include "llvm/Support/Dwarf.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Target/TargetFrameLowering.h"
27 #include "llvm/Target/TargetLoweringObjectFile.h"
28 #include "llvm/Target/TargetMachine.h"
29 #include "llvm/Target/TargetRegisterInfo.h"
30 #include "llvm/Target/TargetSubtargetInfo.h"
33 #define DEBUG_TYPE "asm-printer"
35 /// DwarfExpression implementation for .debug_loc entries.
36 class DebugLocDwarfExpression : public DwarfExpression {
40 DebugLocDwarfExpression(TargetMachine &TM, ByteStreamer &BS)
41 : DwarfExpression(TM), BS(BS) {}
43 void EmitOp(uint8_t Op, const char *Comment) override;
44 void EmitSigned(int Value) override;
45 void EmitUnsigned(unsigned Value) override;
46 unsigned getFrameRegister() override { llvm_unreachable("not available"); };
49 void DebugLocDwarfExpression::EmitOp(uint8_t Op, const char *Comment) {
51 Op, Comment ? Twine(Comment) + " " + dwarf::OperationEncodingString(Op)
52 : dwarf::OperationEncodingString(Op));
54 void DebugLocDwarfExpression::EmitSigned(int Value) {
55 BS.EmitSLEB128(Value, Twine(Value));
57 void DebugLocDwarfExpression::EmitUnsigned(unsigned Value) {
58 BS.EmitULEB128(Value, Twine(Value));
61 //===----------------------------------------------------------------------===//
62 // Dwarf Emission Helper Routines
63 //===----------------------------------------------------------------------===//
65 /// EmitSLEB128 - emit the specified signed leb128 value.
66 void AsmPrinter::EmitSLEB128(int64_t Value, const char *Desc) const {
67 if (isVerbose() && Desc)
68 OutStreamer.AddComment(Desc);
70 OutStreamer.EmitSLEB128IntValue(Value);
73 /// EmitULEB128 - emit the specified signed leb128 value.
74 void AsmPrinter::EmitULEB128(uint64_t Value, const char *Desc,
75 unsigned PadTo) const {
76 if (isVerbose() && Desc)
77 OutStreamer.AddComment(Desc);
79 OutStreamer.EmitULEB128IntValue(Value, PadTo);
82 /// EmitCFAByte - Emit a .byte 42 directive for a DW_CFA_xxx value.
83 void AsmPrinter::EmitCFAByte(unsigned Val) const {
85 if (Val >= dwarf::DW_CFA_offset && Val < dwarf::DW_CFA_offset + 64)
86 OutStreamer.AddComment("DW_CFA_offset + Reg (" +
87 Twine(Val - dwarf::DW_CFA_offset) + ")");
89 OutStreamer.AddComment(dwarf::CallFrameString(Val));
91 OutStreamer.EmitIntValue(Val, 1);
94 static const char *DecodeDWARFEncoding(unsigned Encoding) {
96 case dwarf::DW_EH_PE_absptr:
98 case dwarf::DW_EH_PE_omit:
100 case dwarf::DW_EH_PE_pcrel:
102 case dwarf::DW_EH_PE_udata4:
104 case dwarf::DW_EH_PE_udata8:
106 case dwarf::DW_EH_PE_sdata4:
108 case dwarf::DW_EH_PE_sdata8:
110 case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata4:
111 return "pcrel udata4";
112 case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4:
113 return "pcrel sdata4";
114 case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata8:
115 return "pcrel udata8";
116 case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata8:
117 return "pcrel sdata8";
118 case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata4
120 return "indirect pcrel udata4";
121 case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4
123 return "indirect pcrel sdata4";
124 case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata8
126 return "indirect pcrel udata8";
127 case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata8
129 return "indirect pcrel sdata8";
132 return "<unknown encoding>";
135 /// EmitEncodingByte - Emit a .byte 42 directive that corresponds to an
136 /// encoding. If verbose assembly output is enabled, we output comments
137 /// describing the encoding. Desc is an optional string saying what the
138 /// encoding is specifying (e.g. "LSDA").
139 void AsmPrinter::EmitEncodingByte(unsigned Val, const char *Desc) const {
142 OutStreamer.AddComment(Twine(Desc) + " Encoding = " +
143 Twine(DecodeDWARFEncoding(Val)));
145 OutStreamer.AddComment(Twine("Encoding = ") + DecodeDWARFEncoding(Val));
148 OutStreamer.EmitIntValue(Val, 1);
151 /// GetSizeOfEncodedValue - Return the size of the encoding in bytes.
152 unsigned AsmPrinter::GetSizeOfEncodedValue(unsigned Encoding) const {
153 if (Encoding == dwarf::DW_EH_PE_omit)
156 switch (Encoding & 0x07) {
158 llvm_unreachable("Invalid encoded value.");
159 case dwarf::DW_EH_PE_absptr:
160 return TM.getSubtargetImpl()->getDataLayout()->getPointerSize();
161 case dwarf::DW_EH_PE_udata2:
163 case dwarf::DW_EH_PE_udata4:
165 case dwarf::DW_EH_PE_udata8:
170 void AsmPrinter::EmitTTypeReference(const GlobalValue *GV,
171 unsigned Encoding) const {
173 const TargetLoweringObjectFile &TLOF = getObjFileLowering();
176 TLOF.getTTypeGlobalReference(GV, Encoding, *Mang, TM, MMI, OutStreamer);
177 OutStreamer.EmitValue(Exp, GetSizeOfEncodedValue(Encoding));
179 OutStreamer.EmitIntValue(0, GetSizeOfEncodedValue(Encoding));
182 /// EmitSectionOffset - Emit the 4-byte offset of Label from the start of its
183 /// section. This can be done with a special directive if the target supports
184 /// it (e.g. cygwin) or by emitting it as an offset from a label at the start
187 /// SectionLabel is a temporary label emitted at the start of the section that
189 void AsmPrinter::EmitSectionOffset(const MCSymbol *Label,
190 const MCSymbol *SectionLabel) const {
191 // On COFF targets, we have to emit the special .secrel32 directive.
192 if (MAI->needsDwarfSectionOffsetDirective()) {
193 OutStreamer.EmitCOFFSecRel32(Label);
197 // Get the section that we're referring to, based on SectionLabel.
198 const MCSection &Section = SectionLabel->getSection();
200 // If Label has already been emitted, verify that it is in the same section as
201 // section label for sanity.
202 assert((!Label->isInSection() || &Label->getSection() == &Section) &&
203 "Section offset using wrong section base for label");
205 // If the section in question will end up with an address of 0 anyway, we can
206 // just emit an absolute reference to save a relocation.
207 if (Section.isBaseAddressKnownZero()) {
208 OutStreamer.EmitSymbolValue(Label, 4);
212 // Otherwise, emit it as a label difference from the start of the section.
213 EmitLabelDifference(Label, SectionLabel, 4);
216 // Some targets do not provide a DWARF register number for every
217 // register. This function attempts to emit a DWARF register by
218 // emitting a piece of a super-register or by piecing together
219 // multiple subregisters that alias the register.
220 void AsmPrinter::EmitDwarfRegOpPiece(ByteStreamer &Streamer,
221 const MachineLocation &MLoc,
222 unsigned PieceSizeInBits,
223 unsigned PieceOffsetInBits) const {
224 assert(MLoc.isReg() && "MLoc must be a register");
225 DebugLocDwarfExpression Expr(TM, Streamer);
226 Expr.AddMachineRegPiece(MLoc.getReg(), PieceSizeInBits, PieceOffsetInBits);
229 void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer,
230 unsigned PieceSizeInBits,
231 unsigned PieceOffsetInBits) const {
232 DebugLocDwarfExpression Expr(TM, Streamer);
233 Expr.AddOpPiece(PieceSizeInBits, PieceOffsetInBits);
236 /// EmitDwarfRegOp - Emit dwarf register operation.
237 void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
238 const MachineLocation &MLoc,
239 bool Indirect) const {
240 DebugLocDwarfExpression Expr(TM, Streamer);
241 const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
242 int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
244 // We assume that pointers are always in an addressable register.
245 if (Indirect || MLoc.isIndirect())
246 // FIXME: We have no reasonable way of handling errors in here. The
247 // caller might be in the middle of a dwarf expression. We should
248 // probably assert that Reg >= 0 once debug info generation is more
250 return Expr.EmitOp(dwarf::DW_OP_nop,
251 "nop (could not find a dwarf register number)");
253 // Attempt to find a valid super- or sub-register.
254 return Expr.AddMachineRegPiece(MLoc.getReg());
257 if (MLoc.isIndirect())
258 Expr.AddRegIndirect(Reg, MLoc.getOffset(), Indirect);
260 Expr.AddRegIndirect(Reg, 0, false);
265 //===----------------------------------------------------------------------===//
266 // Dwarf Lowering Routines
267 //===----------------------------------------------------------------------===//
269 void AsmPrinter::emitCFIInstruction(const MCCFIInstruction &Inst) const {
270 switch (Inst.getOperation()) {
272 llvm_unreachable("Unexpected instruction");
273 case MCCFIInstruction::OpDefCfaOffset:
274 OutStreamer.EmitCFIDefCfaOffset(Inst.getOffset());
276 case MCCFIInstruction::OpDefCfa:
277 OutStreamer.EmitCFIDefCfa(Inst.getRegister(), Inst.getOffset());
279 case MCCFIInstruction::OpDefCfaRegister:
280 OutStreamer.EmitCFIDefCfaRegister(Inst.getRegister());
282 case MCCFIInstruction::OpOffset:
283 OutStreamer.EmitCFIOffset(Inst.getRegister(), Inst.getOffset());
285 case MCCFIInstruction::OpRegister:
286 OutStreamer.EmitCFIRegister(Inst.getRegister(), Inst.getRegister2());
288 case MCCFIInstruction::OpWindowSave:
289 OutStreamer.EmitCFIWindowSave();
291 case MCCFIInstruction::OpSameValue:
292 OutStreamer.EmitCFISameValue(Inst.getRegister());