1 //===-- AsmPrinterDwarf.cpp - AsmPrinter Dwarf Support --------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the Dwarf emissions parts of AsmPrinter.
12 //===----------------------------------------------------------------------===//
14 #include "ByteStreamer.h"
15 #include "DwarfExpression.h"
16 #include "llvm/CodeGen/AsmPrinter.h"
17 #include "llvm/ADT/Twine.h"
18 #include "llvm/IR/DataLayout.h"
19 #include "llvm/MC/MCAsmInfo.h"
20 #include "llvm/MC/MCSection.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/MC/MCSymbol.h"
23 #include "llvm/MC/MachineLocation.h"
24 #include "llvm/Support/Dwarf.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Target/TargetFrameLowering.h"
27 #include "llvm/Target/TargetLoweringObjectFile.h"
28 #include "llvm/Target/TargetMachine.h"
29 #include "llvm/Target/TargetRegisterInfo.h"
30 #include "llvm/Target/TargetSubtargetInfo.h"
33 #define DEBUG_TYPE "asm-printer"
35 /// DwarfExpression implementation for .debug_loc entries.
36 class DebugLocDwarfExpression : public DwarfExpression {
39 DebugLocDwarfExpression(TargetMachine &TM, ByteStreamer &BS)
40 : DwarfExpression(TM), BS(BS) {}
42 void EmitOp(uint8_t Op, const char* Comment) override;
43 void EmitSigned(int Value) override;
44 void EmitUnsigned(unsigned Value) override;
47 void DebugLocDwarfExpression::EmitOp(uint8_t Op, const char* Comment) {
48 BS.EmitInt8(Op, Comment
49 ? Twine(Comment)+Twine(" ")+Twine(dwarf::OperationEncodingString(Op))
50 : dwarf::OperationEncodingString(Op));
52 void DebugLocDwarfExpression::EmitSigned(int Value) {
53 BS.EmitSLEB128(Value, Twine(Value));
55 void DebugLocDwarfExpression::EmitUnsigned(unsigned Value) {
56 BS.EmitULEB128(Value, Twine(Value));
60 //===----------------------------------------------------------------------===//
61 // Dwarf Emission Helper Routines
62 //===----------------------------------------------------------------------===//
64 /// EmitSLEB128 - emit the specified signed leb128 value.
65 void AsmPrinter::EmitSLEB128(int64_t Value, const char *Desc) const {
66 if (isVerbose() && Desc)
67 OutStreamer.AddComment(Desc);
69 OutStreamer.EmitSLEB128IntValue(Value);
72 /// EmitULEB128 - emit the specified signed leb128 value.
73 void AsmPrinter::EmitULEB128(uint64_t Value, const char *Desc,
74 unsigned PadTo) const {
75 if (isVerbose() && Desc)
76 OutStreamer.AddComment(Desc);
78 OutStreamer.EmitULEB128IntValue(Value, PadTo);
81 /// EmitCFAByte - Emit a .byte 42 directive for a DW_CFA_xxx value.
82 void AsmPrinter::EmitCFAByte(unsigned Val) const {
84 if (Val >= dwarf::DW_CFA_offset && Val < dwarf::DW_CFA_offset + 64)
85 OutStreamer.AddComment("DW_CFA_offset + Reg (" +
86 Twine(Val - dwarf::DW_CFA_offset) + ")");
88 OutStreamer.AddComment(dwarf::CallFrameString(Val));
90 OutStreamer.EmitIntValue(Val, 1);
93 static const char *DecodeDWARFEncoding(unsigned Encoding) {
95 case dwarf::DW_EH_PE_absptr:
97 case dwarf::DW_EH_PE_omit:
99 case dwarf::DW_EH_PE_pcrel:
101 case dwarf::DW_EH_PE_udata4:
103 case dwarf::DW_EH_PE_udata8:
105 case dwarf::DW_EH_PE_sdata4:
107 case dwarf::DW_EH_PE_sdata8:
109 case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata4:
110 return "pcrel udata4";
111 case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4:
112 return "pcrel sdata4";
113 case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata8:
114 return "pcrel udata8";
115 case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata8:
116 return "pcrel sdata8";
117 case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata4
119 return "indirect pcrel udata4";
120 case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4
122 return "indirect pcrel sdata4";
123 case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata8
125 return "indirect pcrel udata8";
126 case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata8
128 return "indirect pcrel sdata8";
131 return "<unknown encoding>";
134 /// EmitEncodingByte - Emit a .byte 42 directive that corresponds to an
135 /// encoding. If verbose assembly output is enabled, we output comments
136 /// describing the encoding. Desc is an optional string saying what the
137 /// encoding is specifying (e.g. "LSDA").
138 void AsmPrinter::EmitEncodingByte(unsigned Val, const char *Desc) const {
141 OutStreamer.AddComment(Twine(Desc) + " Encoding = " +
142 Twine(DecodeDWARFEncoding(Val)));
144 OutStreamer.AddComment(Twine("Encoding = ") + DecodeDWARFEncoding(Val));
147 OutStreamer.EmitIntValue(Val, 1);
150 /// GetSizeOfEncodedValue - Return the size of the encoding in bytes.
151 unsigned AsmPrinter::GetSizeOfEncodedValue(unsigned Encoding) const {
152 if (Encoding == dwarf::DW_EH_PE_omit)
155 switch (Encoding & 0x07) {
157 llvm_unreachable("Invalid encoded value.");
158 case dwarf::DW_EH_PE_absptr:
159 return TM.getSubtargetImpl()->getDataLayout()->getPointerSize();
160 case dwarf::DW_EH_PE_udata2:
162 case dwarf::DW_EH_PE_udata4:
164 case dwarf::DW_EH_PE_udata8:
169 void AsmPrinter::EmitTTypeReference(const GlobalValue *GV,
170 unsigned Encoding) const {
172 const TargetLoweringObjectFile &TLOF = getObjFileLowering();
175 TLOF.getTTypeGlobalReference(GV, Encoding, *Mang, TM, MMI, OutStreamer);
176 OutStreamer.EmitValue(Exp, GetSizeOfEncodedValue(Encoding));
178 OutStreamer.EmitIntValue(0, GetSizeOfEncodedValue(Encoding));
181 /// EmitSectionOffset - Emit the 4-byte offset of Label from the start of its
182 /// section. This can be done with a special directive if the target supports
183 /// it (e.g. cygwin) or by emitting it as an offset from a label at the start
186 /// SectionLabel is a temporary label emitted at the start of the section that
188 void AsmPrinter::EmitSectionOffset(const MCSymbol *Label,
189 const MCSymbol *SectionLabel) const {
190 // On COFF targets, we have to emit the special .secrel32 directive.
191 if (MAI->needsDwarfSectionOffsetDirective()) {
192 OutStreamer.EmitCOFFSecRel32(Label);
196 // Get the section that we're referring to, based on SectionLabel.
197 const MCSection &Section = SectionLabel->getSection();
199 // If Label has already been emitted, verify that it is in the same section as
200 // section label for sanity.
201 assert((!Label->isInSection() || &Label->getSection() == &Section) &&
202 "Section offset using wrong section base for label");
204 // If the section in question will end up with an address of 0 anyway, we can
205 // just emit an absolute reference to save a relocation.
206 if (Section.isBaseAddressKnownZero()) {
207 OutStreamer.EmitSymbolValue(Label, 4);
211 // Otherwise, emit it as a label difference from the start of the section.
212 EmitLabelDifference(Label, SectionLabel, 4);
215 // Some targets do not provide a DWARF register number for every
216 // register. This function attempts to emit a DWARF register by
217 // emitting a piece of a super-register or by piecing together
218 // multiple subregisters that alias the register.
219 void AsmPrinter::EmitDwarfRegOpPiece(ByteStreamer &Streamer,
220 const MachineLocation &MLoc,
221 unsigned PieceSizeInBits,
222 unsigned PieceOffsetInBits) const {
223 assert(MLoc.isReg() && "MLoc must be a register");
224 DebugLocDwarfExpression Expr(TM, Streamer);
225 Expr.AddMachineRegPiece(MLoc.getReg(), PieceSizeInBits, PieceOffsetInBits);
228 void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer,
229 unsigned PieceSizeInBits,
230 unsigned PieceOffsetInBits) const {
231 DebugLocDwarfExpression Expr(TM, Streamer);
232 Expr.AddOpPiece(PieceSizeInBits, PieceOffsetInBits);
235 /// EmitDwarfRegOp - Emit dwarf register operation.
236 void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
237 const MachineLocation &MLoc,
238 bool Indirect) const {
239 DebugLocDwarfExpression Expr(TM, Streamer);
240 const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
241 int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
243 // We assume that pointers are always in an addressable register.
244 if (Indirect || MLoc.isIndirect())
245 // FIXME: We have no reasonable way of handling errors in here. The
246 // caller might be in the middle of a dwarf expression. We should
247 // probably assert that Reg >= 0 once debug info generation is more
249 return Expr.EmitOp(dwarf::DW_OP_nop,
250 "nop (could not find a dwarf register number)");
252 // Attempt to find a valid super- or sub-register.
253 return Expr.AddMachineRegPiece(MLoc.getReg());
256 if (MLoc.isIndirect())
257 Expr.AddRegIndirect(Reg, MLoc.getOffset(), Indirect);
259 Expr.AddRegIndirect(Reg, 0, false);
264 //===----------------------------------------------------------------------===//
265 // Dwarf Lowering Routines
266 //===----------------------------------------------------------------------===//
268 void AsmPrinter::emitCFIInstruction(const MCCFIInstruction &Inst) const {
269 switch (Inst.getOperation()) {
271 llvm_unreachable("Unexpected instruction");
272 case MCCFIInstruction::OpDefCfaOffset:
273 OutStreamer.EmitCFIDefCfaOffset(Inst.getOffset());
275 case MCCFIInstruction::OpDefCfa:
276 OutStreamer.EmitCFIDefCfa(Inst.getRegister(), Inst.getOffset());
278 case MCCFIInstruction::OpDefCfaRegister:
279 OutStreamer.EmitCFIDefCfaRegister(Inst.getRegister());
281 case MCCFIInstruction::OpOffset:
282 OutStreamer.EmitCFIOffset(Inst.getRegister(), Inst.getOffset());
284 case MCCFIInstruction::OpRegister:
285 OutStreamer.EmitCFIRegister(Inst.getRegister(), Inst.getRegister2());
287 case MCCFIInstruction::OpWindowSave:
288 OutStreamer.EmitCFIWindowSave();
290 case MCCFIInstruction::OpSameValue:
291 OutStreamer.EmitCFISameValue(Inst.getRegister());