1 //===- llvm/Transforms/TargetTransformInfo.h --------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass exposes codegen information to IR-level passes. Every
11 // transformation that uses codegen information is broken into three parts:
12 // 1. The IR-level analysis pass.
13 // 2. The IR-level transformation interface which provides the needed
15 // 3. Codegen-level implementation which uses target-specific hooks.
17 // This file defines #2, which is the interface that IR-level transformations
18 // use for querying the codegen.
20 //===----------------------------------------------------------------------===//
22 #ifndef LLVM_TRANSFORMS_TARGET_TRANSFORM_INTERFACE
23 #define LLVM_TRANSFORMS_TARGET_TRANSFORM_INTERFACE
25 #include "llvm/AddressingMode.h"
26 #include "llvm/Pass.h"
27 #include "llvm/Support/DataTypes.h"
28 #include "llvm/Type.h"
32 class ScalarTargetTransformInfo;
33 class VectorTargetTransformInfo;
35 /// TargetTransformInfo - This pass provides access to the codegen
36 /// interfaces that are needed for IR-level transformations.
37 class TargetTransformInfo : public ImmutablePass {
39 const ScalarTargetTransformInfo *STTI;
40 const VectorTargetTransformInfo *VTTI;
44 /// @note This has to exist, because this is a pass, but it should never be
46 TargetTransformInfo();
48 TargetTransformInfo(const ScalarTargetTransformInfo* S,
49 const VectorTargetTransformInfo *V)
50 : ImmutablePass(ID), STTI(S), VTTI(V) {
51 initializeTargetTransformInfoPass(*PassRegistry::getPassRegistry());
54 TargetTransformInfo(const TargetTransformInfo &T) :
55 ImmutablePass(ID), STTI(T.STTI), VTTI(T.VTTI) { }
57 const ScalarTargetTransformInfo* getScalarTargetTransformInfo() const {
60 const VectorTargetTransformInfo* getVectorTargetTransformInfo() const {
64 /// Pass identification, replacement for typeid.
68 // ---------------------------------------------------------------------------//
69 // The classes below are inherited and implemented by target-specific classes
71 // ---------------------------------------------------------------------------//
73 /// ScalarTargetTransformInfo - This interface is used by IR-level passes
74 /// that need target-dependent information for generic scalar transformations.
75 /// LSR, and LowerInvoke use this interface.
76 class ScalarTargetTransformInfo {
78 /// PopcntHwSupport - Hardware support for population count. Compared to the
79 /// SW implementation, HW support is supposed to significantly boost the
80 /// performance when the population is dense, and it may or not may degrade
81 /// performance if the population is sparse. A HW support is considered as
82 /// "Fast" if it can outperform, or is on a par with, SW implementaion when
83 /// the population is sparse; otherwise, it is considered as "Slow".
84 enum PopcntHwSupport {
90 virtual ~ScalarTargetTransformInfo() {}
92 /// isLegalAddImmediate - Return true if the specified immediate is legal
93 /// add immediate, that is the target has add instructions which can add
94 /// a register with the immediate without having to materialize the
95 /// immediate into a register.
96 virtual bool isLegalAddImmediate(int64_t) const {
99 /// isLegalICmpImmediate - Return true if the specified immediate is legal
100 /// icmp immediate, that is the target has icmp instructions which can compare
101 /// a register against the immediate without having to materialize the
102 /// immediate into a register.
103 virtual bool isLegalICmpImmediate(int64_t) const {
106 /// isLegalAddressingMode - Return true if the addressing mode represented by
107 /// AM is legal for this target, for a load/store of the specified type.
108 /// The type may be VoidTy, in which case only return true if the addressing
109 /// mode is legal for a load/store of any legal type.
110 /// TODO: Handle pre/postinc as well.
111 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const {
114 /// isTruncateFree - Return true if it's free to truncate a value of
115 /// type Ty1 to type Ty2. e.g. On x86 it's free to truncate a i32 value in
116 /// register EAX to i16 by referencing its sub-register AX.
117 virtual bool isTruncateFree(Type *Ty1, Type *Ty2) const {
120 /// Is this type legal.
121 virtual bool isTypeLegal(Type *Ty) const {
124 /// getJumpBufAlignment - returns the target's jmp_buf alignment in bytes
125 virtual unsigned getJumpBufAlignment() const {
128 /// getJumpBufSize - returns the target's jmp_buf size in bytes.
129 virtual unsigned getJumpBufSize() const {
132 /// shouldBuildLookupTables - Return true if switches should be turned into
133 /// lookup tables for the target.
134 virtual bool shouldBuildLookupTables() const {
138 /// getPopcntHwSupport - Return hardware support for population count.
139 virtual PopcntHwSupport getPopcntHwSupport(unsigned IntTyWidthInBit) const {
144 /// VectorTargetTransformInfo - This interface is used by the vectorizers
145 /// to estimate the profitability of vectorization for different instructions.
146 class VectorTargetTransformInfo {
148 virtual ~VectorTargetTransformInfo() {}
150 /// Returns the expected cost of the instruction opcode. The opcode is one of
151 /// the enums like Instruction::Add. The type arguments are the type of the
153 /// Most instructions only use the first type and in that case the second
154 /// operand is ignored.
157 /// * Br instructions do not use any of the types.
158 /// * Select instructions pass the return type as Ty1 and the selector as Ty2.
159 /// * Cast instructions pass the destination as Ty1 and the source as Ty2.
160 /// * Insert/Extract element pass only the vector type as Ty1.
161 /// * ShuffleVector, Load, Store do not use this call.
162 virtual unsigned getInstrCost(unsigned Opcode,
164 Type *Ty2 = 0) const {
168 /// Returns the expected cost of arithmetic ops, such as mul, xor, fsub, etc.
169 virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty) const {
173 /// Returns the cost of a vector broadcast of a scalar at place zero to a
174 /// vector of type 'Tp'.
175 virtual unsigned getBroadcastCost(Type *Tp) const {
179 /// Returns the expected cost of cast instructions, such as bitcast, trunc,
181 virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
186 /// Returns the expected cost of control-flow related instrutctions such as
188 virtual unsigned getCFInstrCost(unsigned Opcode) const {
192 /// Returns the expected cost of compare and select instructions.
193 virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
194 Type *CondTy = 0) const {
198 /// Returns the expected cost of vector Insert and Extract.
199 /// Use -1 to indicate that there is no information on the index value.
200 virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
201 unsigned Index = -1) const {
205 /// Returns the cost of Load and Store instructions.
206 virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
208 unsigned AddressSpace) const {
212 /// Returns the number of pieces into which the provided type must be
213 /// split during legalization. Zero is returned when the answer is unknown.
214 virtual unsigned getNumberOfParts(Type *Tp) const {
219 } // End llvm namespace