1 //===- TargetSelectionDAG.td - Common code for DAG isels ---*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the target-independent interfaces used by SelectionDAG
11 // instruction selection generators.
13 //===----------------------------------------------------------------------===//
15 //===----------------------------------------------------------------------===//
16 // Selection DAG Type Constraint definitions.
18 // Note that the semantics of these constraints are hard coded into tblgen. To
19 // modify or add constraints, you have to hack tblgen.
22 class SDTypeConstraint<int opnum> {
23 int OperandNum = opnum;
26 // SDTCisVT - The specified operand has exactly this VT.
27 class SDTCisVT<int OpNum, ValueType vt> : SDTypeConstraint<OpNum> {
31 class SDTCisPtrTy<int OpNum> : SDTypeConstraint<OpNum>;
33 // SDTCisInt - The specified operand has integer type.
34 class SDTCisInt<int OpNum> : SDTypeConstraint<OpNum>;
36 // SDTCisFP - The specified operand has floating-point type.
37 class SDTCisFP<int OpNum> : SDTypeConstraint<OpNum>;
39 // SDTCisVec - The specified operand has a vector type.
40 class SDTCisVec<int OpNum> : SDTypeConstraint<OpNum>;
42 // SDTCisSameAs - The two specified operands have identical types.
43 class SDTCisSameAs<int OpNum, int OtherOp> : SDTypeConstraint<OpNum> {
44 int OtherOperandNum = OtherOp;
47 // SDTCisVTSmallerThanOp - The specified operand is a VT SDNode, and its type is
48 // smaller than the 'Other' operand.
49 class SDTCisVTSmallerThanOp<int OpNum, int OtherOp> : SDTypeConstraint<OpNum> {
50 int OtherOperandNum = OtherOp;
53 class SDTCisOpSmallerThanOp<int SmallOp, int BigOp> : SDTypeConstraint<SmallOp>{
54 int BigOperandNum = BigOp;
57 /// SDTCisEltOfVec - This indicates that ThisOp is a scalar type of the same
58 /// type as the element type of OtherOp, which is a vector type.
59 class SDTCisEltOfVec<int ThisOp, int OtherOp>
60 : SDTypeConstraint<ThisOp> {
61 int OtherOpNum = OtherOp;
64 /// SDTCisSubVecOfVec - This indicates that ThisOp is a vector type
65 /// with length less that of OtherOp, which is a vector type.
66 class SDTCisSubVecOfVec<int ThisOp, int OtherOp>
67 : SDTypeConstraint<ThisOp> {
68 int OtherOpNum = OtherOp;
71 // SDTCVecEltisVT - The specified operand is vector type with element type
73 class SDTCVecEltisVT<int OpNum, ValueType vt> : SDTypeConstraint<OpNum> {
77 // SDTCisSameNumEltsAs - The two specified operands have identical number
79 class SDTCisSameNumEltsAs<int OpNum, int OtherOp> : SDTypeConstraint<OpNum> {
80 int OtherOperandNum = OtherOp;
83 //===----------------------------------------------------------------------===//
84 // Selection DAG Type Profile definitions.
86 // These use the constraints defined above to describe the type requirements of
87 // the various nodes. These are not hard coded into tblgen, allowing targets to
88 // add their own if needed.
91 // SDTypeProfile - This profile describes the type requirements of a Selection
93 class SDTypeProfile<int numresults, int numoperands,
94 list<SDTypeConstraint> constraints> {
95 int NumResults = numresults;
96 int NumOperands = numoperands;
97 list<SDTypeConstraint> Constraints = constraints;
101 def SDTIntLeaf: SDTypeProfile<1, 0, [SDTCisInt<0>]>; // for 'imm'.
102 def SDTFPLeaf : SDTypeProfile<1, 0, [SDTCisFP<0>]>; // for 'fpimm'.
103 def SDTPtrLeaf: SDTypeProfile<1, 0, [SDTCisPtrTy<0>]>; // for '&g'.
104 def SDTOther : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'.
105 def SDTUNDEF : SDTypeProfile<1, 0, []>; // for 'undef'.
106 def SDTUnaryOp : SDTypeProfile<1, 1, []>; // for bitconvert.
108 def SDTIntBinOp : SDTypeProfile<1, 2, [ // add, and, or, xor, udiv, etc.
109 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>
111 def SDTIntShiftOp : SDTypeProfile<1, 2, [ // shl, sra, srl
112 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisInt<2>
114 def SDTIntBinHiLoOp : SDTypeProfile<2, 2, [ // mulhi, mullo, sdivrem, udivrem
115 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>,SDTCisInt<0>
118 def SDTFPBinOp : SDTypeProfile<1, 2, [ // fadd, fmul, etc.
119 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>
121 def SDTFPSignOp : SDTypeProfile<1, 2, [ // fcopysign.
122 SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisFP<2>
124 def SDTFPTernaryOp : SDTypeProfile<1, 3, [ // fmadd, fnmsub, etc.
125 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, SDTCisFP<0>
127 def SDTIntUnaryOp : SDTypeProfile<1, 1, [ // ctlz
128 SDTCisSameAs<0, 1>, SDTCisInt<0>
130 def SDTIntExtendOp : SDTypeProfile<1, 1, [ // sext, zext, anyext
131 SDTCisInt<0>, SDTCisInt<1>, SDTCisOpSmallerThanOp<1, 0>
133 def SDTIntTruncOp : SDTypeProfile<1, 1, [ // trunc
134 SDTCisInt<0>, SDTCisInt<1>, SDTCisOpSmallerThanOp<0, 1>
136 def SDTFPUnaryOp : SDTypeProfile<1, 1, [ // fneg, fsqrt, etc
137 SDTCisSameAs<0, 1>, SDTCisFP<0>
139 def SDTFPRoundOp : SDTypeProfile<1, 1, [ // fround
140 SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<0, 1>
142 def SDTFPExtendOp : SDTypeProfile<1, 1, [ // fextend
143 SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<1, 0>
145 def SDTIntToFPOp : SDTypeProfile<1, 1, [ // [su]int_to_fp
146 SDTCisFP<0>, SDTCisInt<1>
148 def SDTFPToIntOp : SDTypeProfile<1, 1, [ // fp_to_[su]int
149 SDTCisInt<0>, SDTCisFP<1>
151 def SDTExtInreg : SDTypeProfile<1, 2, [ // sext_inreg
152 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>,
153 SDTCisVTSmallerThanOp<2, 1>
156 def SDTSetCC : SDTypeProfile<1, 3, [ // setcc
157 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
160 def SDTSelect : SDTypeProfile<1, 3, [ // select
161 SDTCisInt<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>
164 def SDTVSelect : SDTypeProfile<1, 3, [ // vselect
165 SDTCisInt<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>
168 def SDTSelectCC : SDTypeProfile<1, 5, [ // select_cc
169 SDTCisSameAs<1, 2>, SDTCisSameAs<3, 4>, SDTCisSameAs<0, 3>,
173 def SDTBr : SDTypeProfile<0, 1, [ // br
177 def SDTBrCC : SDTypeProfile<0, 4, [ // brcc
178 SDTCisVT<0, OtherVT>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
181 def SDTBrcond : SDTypeProfile<0, 2, [ // brcond
182 SDTCisInt<0>, SDTCisVT<1, OtherVT>
185 def SDTBrind : SDTypeProfile<0, 1, [ // brind
189 def SDTNone : SDTypeProfile<0, 0, []>; // ret, trap
191 def SDTLoad : SDTypeProfile<1, 1, [ // load
195 def SDTStore : SDTypeProfile<0, 2, [ // store
199 def SDTIStore : SDTypeProfile<1, 3, [ // indexed store
200 SDTCisSameAs<0, 2>, SDTCisPtrTy<0>, SDTCisPtrTy<3>
203 def SDTMaskedStore: SDTypeProfile<0, 3, [ // masked store
204 SDTCisPtrTy<0>, SDTCisVec<1>, SDTCisVec<2>
207 def SDTMaskedLoad: SDTypeProfile<1, 3, [ // masked load
208 SDTCisVec<0>, SDTCisPtrTy<1>, SDTCisVec<2>, SDTCisSameAs<0, 3>
211 def SDTVecShuffle : SDTypeProfile<1, 2, [
212 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>
214 def SDTVecExtract : SDTypeProfile<1, 2, [ // vector extract
215 SDTCisEltOfVec<0, 1>, SDTCisPtrTy<2>
217 def SDTVecInsert : SDTypeProfile<1, 3, [ // vector insert
218 SDTCisEltOfVec<2, 1>, SDTCisSameAs<0, 1>, SDTCisPtrTy<3>
221 def SDTSubVecExtract : SDTypeProfile<1, 2, [// subvector extract
222 SDTCisSubVecOfVec<0,1>, SDTCisInt<2>
224 def SDTSubVecInsert : SDTypeProfile<1, 3, [ // subvector insert
225 SDTCisSubVecOfVec<2, 1>, SDTCisSameAs<0,1>, SDTCisInt<3>
228 def SDTPrefetch : SDTypeProfile<0, 4, [ // prefetch
229 SDTCisPtrTy<0>, SDTCisSameAs<1, 2>, SDTCisSameAs<1, 3>, SDTCisInt<1>
232 def SDTMemBarrier : SDTypeProfile<0, 5, [ // memory barrier
233 SDTCisSameAs<0,1>, SDTCisSameAs<0,2>, SDTCisSameAs<0,3>, SDTCisSameAs<0,4>,
236 def SDTAtomicFence : SDTypeProfile<0, 2, [
237 SDTCisSameAs<0,1>, SDTCisPtrTy<0>
239 def SDTAtomic3 : SDTypeProfile<1, 3, [
240 SDTCisSameAs<0,2>, SDTCisSameAs<0,3>, SDTCisInt<0>, SDTCisPtrTy<1>
242 def SDTAtomic2 : SDTypeProfile<1, 2, [
243 SDTCisSameAs<0,2>, SDTCisInt<0>, SDTCisPtrTy<1>
245 def SDTAtomicStore : SDTypeProfile<0, 2, [
246 SDTCisPtrTy<0>, SDTCisInt<1>
248 def SDTAtomicLoad : SDTypeProfile<1, 1, [
249 SDTCisInt<0>, SDTCisPtrTy<1>
252 def SDTConvertOp : SDTypeProfile<1, 5, [ //cvtss, su, us, uu, ff, fs, fu, sf, su
253 SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>, SDTCisPtrTy<4>, SDTCisPtrTy<5>
256 class SDCallSeqStart<list<SDTypeConstraint> constraints> :
257 SDTypeProfile<0, 1, constraints>;
258 class SDCallSeqEnd<list<SDTypeConstraint> constraints> :
259 SDTypeProfile<0, 2, constraints>;
261 //===----------------------------------------------------------------------===//
262 // Selection DAG Node Properties.
264 // Note: These are hard coded into tblgen.
266 class SDNodeProperty;
267 def SDNPCommutative : SDNodeProperty; // X op Y == Y op X
268 def SDNPAssociative : SDNodeProperty; // (X op Y) op Z == X op (Y op Z)
269 def SDNPHasChain : SDNodeProperty; // R/W chain operand and result
270 def SDNPOutGlue : SDNodeProperty; // Write a flag result
271 def SDNPInGlue : SDNodeProperty; // Read a flag operand
272 def SDNPOptInGlue : SDNodeProperty; // Optionally read a flag operand
273 def SDNPMayStore : SDNodeProperty; // May write to memory, sets 'mayStore'.
274 def SDNPMayLoad : SDNodeProperty; // May read memory, sets 'mayLoad'.
275 def SDNPSideEffect : SDNodeProperty; // Sets 'HasUnmodelledSideEffects'.
276 def SDNPMemOperand : SDNodeProperty; // Touches memory, has assoc MemOperand
277 def SDNPVariadic : SDNodeProperty; // Node has variable arguments.
278 def SDNPWantRoot : SDNodeProperty; // ComplexPattern gets the root of match
279 def SDNPWantParent : SDNodeProperty; // ComplexPattern gets the parent
281 //===----------------------------------------------------------------------===//
282 // Selection DAG Pattern Operations
283 class SDPatternOperator;
285 //===----------------------------------------------------------------------===//
286 // Selection DAG Node definitions.
288 class SDNode<string opcode, SDTypeProfile typeprof,
289 list<SDNodeProperty> props = [], string sdclass = "SDNode">
290 : SDPatternOperator {
291 string Opcode = opcode;
292 string SDClass = sdclass;
293 list<SDNodeProperty> Properties = props;
294 SDTypeProfile TypeProfile = typeprof;
297 // Special TableGen-recognized dag nodes
303 def imm : SDNode<"ISD::Constant" , SDTIntLeaf , [], "ConstantSDNode">;
304 def timm : SDNode<"ISD::TargetConstant",SDTIntLeaf, [], "ConstantSDNode">;
305 def fpimm : SDNode<"ISD::ConstantFP", SDTFPLeaf , [], "ConstantFPSDNode">;
306 def vt : SDNode<"ISD::VALUETYPE" , SDTOther , [], "VTSDNode">;
307 def bb : SDNode<"ISD::BasicBlock", SDTOther , [], "BasicBlockSDNode">;
308 def cond : SDNode<"ISD::CONDCODE" , SDTOther , [], "CondCodeSDNode">;
309 def undef : SDNode<"ISD::UNDEF" , SDTUNDEF , []>;
310 def globaladdr : SDNode<"ISD::GlobalAddress", SDTPtrLeaf, [],
311 "GlobalAddressSDNode">;
312 def tglobaladdr : SDNode<"ISD::TargetGlobalAddress", SDTPtrLeaf, [],
313 "GlobalAddressSDNode">;
314 def globaltlsaddr : SDNode<"ISD::GlobalTLSAddress", SDTPtrLeaf, [],
315 "GlobalAddressSDNode">;
316 def tglobaltlsaddr : SDNode<"ISD::TargetGlobalTLSAddress", SDTPtrLeaf, [],
317 "GlobalAddressSDNode">;
318 def constpool : SDNode<"ISD::ConstantPool", SDTPtrLeaf, [],
319 "ConstantPoolSDNode">;
320 def tconstpool : SDNode<"ISD::TargetConstantPool", SDTPtrLeaf, [],
321 "ConstantPoolSDNode">;
322 def jumptable : SDNode<"ISD::JumpTable", SDTPtrLeaf, [],
324 def tjumptable : SDNode<"ISD::TargetJumpTable", SDTPtrLeaf, [],
326 def frameindex : SDNode<"ISD::FrameIndex", SDTPtrLeaf, [],
328 def tframeindex : SDNode<"ISD::TargetFrameIndex", SDTPtrLeaf, [],
330 def externalsym : SDNode<"ISD::ExternalSymbol", SDTPtrLeaf, [],
331 "ExternalSymbolSDNode">;
332 def texternalsym: SDNode<"ISD::TargetExternalSymbol", SDTPtrLeaf, [],
333 "ExternalSymbolSDNode">;
334 def blockaddress : SDNode<"ISD::BlockAddress", SDTPtrLeaf, [],
335 "BlockAddressSDNode">;
336 def tblockaddress: SDNode<"ISD::TargetBlockAddress", SDTPtrLeaf, [],
337 "BlockAddressSDNode">;
339 def add : SDNode<"ISD::ADD" , SDTIntBinOp ,
340 [SDNPCommutative, SDNPAssociative]>;
341 def sub : SDNode<"ISD::SUB" , SDTIntBinOp>;
342 def mul : SDNode<"ISD::MUL" , SDTIntBinOp,
343 [SDNPCommutative, SDNPAssociative]>;
344 def mulhs : SDNode<"ISD::MULHS" , SDTIntBinOp, [SDNPCommutative]>;
345 def mulhu : SDNode<"ISD::MULHU" , SDTIntBinOp, [SDNPCommutative]>;
346 def smullohi : SDNode<"ISD::SMUL_LOHI" , SDTIntBinHiLoOp, [SDNPCommutative]>;
347 def umullohi : SDNode<"ISD::UMUL_LOHI" , SDTIntBinHiLoOp, [SDNPCommutative]>;
348 def sdiv : SDNode<"ISD::SDIV" , SDTIntBinOp>;
349 def udiv : SDNode<"ISD::UDIV" , SDTIntBinOp>;
350 def srem : SDNode<"ISD::SREM" , SDTIntBinOp>;
351 def urem : SDNode<"ISD::UREM" , SDTIntBinOp>;
352 def sdivrem : SDNode<"ISD::SDIVREM" , SDTIntBinHiLoOp>;
353 def udivrem : SDNode<"ISD::UDIVREM" , SDTIntBinHiLoOp>;
354 def srl : SDNode<"ISD::SRL" , SDTIntShiftOp>;
355 def sra : SDNode<"ISD::SRA" , SDTIntShiftOp>;
356 def shl : SDNode<"ISD::SHL" , SDTIntShiftOp>;
357 def rotl : SDNode<"ISD::ROTL" , SDTIntShiftOp>;
358 def rotr : SDNode<"ISD::ROTR" , SDTIntShiftOp>;
359 def and : SDNode<"ISD::AND" , SDTIntBinOp,
360 [SDNPCommutative, SDNPAssociative]>;
361 def or : SDNode<"ISD::OR" , SDTIntBinOp,
362 [SDNPCommutative, SDNPAssociative]>;
363 def xor : SDNode<"ISD::XOR" , SDTIntBinOp,
364 [SDNPCommutative, SDNPAssociative]>;
365 def addc : SDNode<"ISD::ADDC" , SDTIntBinOp,
366 [SDNPCommutative, SDNPOutGlue]>;
367 def adde : SDNode<"ISD::ADDE" , SDTIntBinOp,
368 [SDNPCommutative, SDNPOutGlue, SDNPInGlue]>;
369 def subc : SDNode<"ISD::SUBC" , SDTIntBinOp,
371 def sube : SDNode<"ISD::SUBE" , SDTIntBinOp,
372 [SDNPOutGlue, SDNPInGlue]>;
374 def sext_inreg : SDNode<"ISD::SIGN_EXTEND_INREG", SDTExtInreg>;
375 def bswap : SDNode<"ISD::BSWAP" , SDTIntUnaryOp>;
376 def ctlz : SDNode<"ISD::CTLZ" , SDTIntUnaryOp>;
377 def cttz : SDNode<"ISD::CTTZ" , SDTIntUnaryOp>;
378 def ctpop : SDNode<"ISD::CTPOP" , SDTIntUnaryOp>;
379 def ctlz_zero_undef : SDNode<"ISD::CTLZ_ZERO_UNDEF", SDTIntUnaryOp>;
380 def cttz_zero_undef : SDNode<"ISD::CTTZ_ZERO_UNDEF", SDTIntUnaryOp>;
381 def sext : SDNode<"ISD::SIGN_EXTEND", SDTIntExtendOp>;
382 def zext : SDNode<"ISD::ZERO_EXTEND", SDTIntExtendOp>;
383 def anyext : SDNode<"ISD::ANY_EXTEND" , SDTIntExtendOp>;
384 def trunc : SDNode<"ISD::TRUNCATE" , SDTIntTruncOp>;
385 def bitconvert : SDNode<"ISD::BITCAST" , SDTUnaryOp>;
386 def addrspacecast : SDNode<"ISD::ADDRSPACECAST", SDTUnaryOp>;
387 def extractelt : SDNode<"ISD::EXTRACT_VECTOR_ELT", SDTVecExtract>;
388 def insertelt : SDNode<"ISD::INSERT_VECTOR_ELT", SDTVecInsert>;
390 def fadd : SDNode<"ISD::FADD" , SDTFPBinOp, [SDNPCommutative]>;
391 def fsub : SDNode<"ISD::FSUB" , SDTFPBinOp>;
392 def fmul : SDNode<"ISD::FMUL" , SDTFPBinOp, [SDNPCommutative]>;
393 def fdiv : SDNode<"ISD::FDIV" , SDTFPBinOp>;
394 def frem : SDNode<"ISD::FREM" , SDTFPBinOp>;
395 def fma : SDNode<"ISD::FMA" , SDTFPTernaryOp>;
396 def fmad : SDNode<"ISD::FMAD" , SDTFPTernaryOp>;
397 def fabs : SDNode<"ISD::FABS" , SDTFPUnaryOp>;
398 def fminnum : SDNode<"ISD::FMINNUM" , SDTFPBinOp>;
399 def fmaxnum : SDNode<"ISD::FMAXNUM" , SDTFPBinOp>;
400 def fgetsign : SDNode<"ISD::FGETSIGN" , SDTFPToIntOp>;
401 def fneg : SDNode<"ISD::FNEG" , SDTFPUnaryOp>;
402 def fsqrt : SDNode<"ISD::FSQRT" , SDTFPUnaryOp>;
403 def fsin : SDNode<"ISD::FSIN" , SDTFPUnaryOp>;
404 def fcos : SDNode<"ISD::FCOS" , SDTFPUnaryOp>;
405 def fexp2 : SDNode<"ISD::FEXP2" , SDTFPUnaryOp>;
406 def fpow : SDNode<"ISD::FPOW" , SDTFPBinOp>;
407 def flog2 : SDNode<"ISD::FLOG2" , SDTFPUnaryOp>;
408 def frint : SDNode<"ISD::FRINT" , SDTFPUnaryOp>;
409 def ftrunc : SDNode<"ISD::FTRUNC" , SDTFPUnaryOp>;
410 def fceil : SDNode<"ISD::FCEIL" , SDTFPUnaryOp>;
411 def ffloor : SDNode<"ISD::FFLOOR" , SDTFPUnaryOp>;
412 def fnearbyint : SDNode<"ISD::FNEARBYINT" , SDTFPUnaryOp>;
413 def frnd : SDNode<"ISD::FROUND" , SDTFPUnaryOp>;
415 def fround : SDNode<"ISD::FP_ROUND" , SDTFPRoundOp>;
416 def fextend : SDNode<"ISD::FP_EXTEND" , SDTFPExtendOp>;
417 def fcopysign : SDNode<"ISD::FCOPYSIGN" , SDTFPSignOp>;
419 def sint_to_fp : SDNode<"ISD::SINT_TO_FP" , SDTIntToFPOp>;
420 def uint_to_fp : SDNode<"ISD::UINT_TO_FP" , SDTIntToFPOp>;
421 def fp_to_sint : SDNode<"ISD::FP_TO_SINT" , SDTFPToIntOp>;
422 def fp_to_uint : SDNode<"ISD::FP_TO_UINT" , SDTFPToIntOp>;
423 def f16_to_fp : SDNode<"ISD::FP16_TO_FP" , SDTIntToFPOp>;
424 def fp_to_f16 : SDNode<"ISD::FP_TO_FP16" , SDTFPToIntOp>;
426 def setcc : SDNode<"ISD::SETCC" , SDTSetCC>;
427 def select : SDNode<"ISD::SELECT" , SDTSelect>;
428 def vselect : SDNode<"ISD::VSELECT" , SDTVSelect>;
429 def selectcc : SDNode<"ISD::SELECT_CC" , SDTSelectCC>;
431 def brcc : SDNode<"ISD::BR_CC" , SDTBrCC, [SDNPHasChain]>;
432 def brcond : SDNode<"ISD::BRCOND" , SDTBrcond, [SDNPHasChain]>;
433 def brind : SDNode<"ISD::BRIND" , SDTBrind, [SDNPHasChain]>;
434 def br : SDNode<"ISD::BR" , SDTBr, [SDNPHasChain]>;
435 def trap : SDNode<"ISD::TRAP" , SDTNone,
436 [SDNPHasChain, SDNPSideEffect]>;
437 def debugtrap : SDNode<"ISD::DEBUGTRAP" , SDTNone,
438 [SDNPHasChain, SDNPSideEffect]>;
440 def prefetch : SDNode<"ISD::PREFETCH" , SDTPrefetch,
441 [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
444 def readcyclecounter : SDNode<"ISD::READCYCLECOUNTER", SDTIntLeaf,
445 [SDNPHasChain, SDNPSideEffect]>;
447 def atomic_fence : SDNode<"ISD::ATOMIC_FENCE" , SDTAtomicFence,
448 [SDNPHasChain, SDNPSideEffect]>;
450 def atomic_cmp_swap : SDNode<"ISD::ATOMIC_CMP_SWAP" , SDTAtomic3,
451 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
452 def atomic_load_add : SDNode<"ISD::ATOMIC_LOAD_ADD" , SDTAtomic2,
453 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
454 def atomic_swap : SDNode<"ISD::ATOMIC_SWAP", SDTAtomic2,
455 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
456 def atomic_load_sub : SDNode<"ISD::ATOMIC_LOAD_SUB" , SDTAtomic2,
457 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
458 def atomic_load_and : SDNode<"ISD::ATOMIC_LOAD_AND" , SDTAtomic2,
459 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
460 def atomic_load_or : SDNode<"ISD::ATOMIC_LOAD_OR" , SDTAtomic2,
461 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
462 def atomic_load_xor : SDNode<"ISD::ATOMIC_LOAD_XOR" , SDTAtomic2,
463 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
464 def atomic_load_nand: SDNode<"ISD::ATOMIC_LOAD_NAND", SDTAtomic2,
465 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
466 def atomic_load_min : SDNode<"ISD::ATOMIC_LOAD_MIN", SDTAtomic2,
467 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
468 def atomic_load_max : SDNode<"ISD::ATOMIC_LOAD_MAX", SDTAtomic2,
469 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
470 def atomic_load_umin : SDNode<"ISD::ATOMIC_LOAD_UMIN", SDTAtomic2,
471 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
472 def atomic_load_umax : SDNode<"ISD::ATOMIC_LOAD_UMAX", SDTAtomic2,
473 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
474 def atomic_load : SDNode<"ISD::ATOMIC_LOAD", SDTAtomicLoad,
475 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
476 def atomic_store : SDNode<"ISD::ATOMIC_STORE", SDTAtomicStore,
477 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
479 def masked_store : SDNode<"ISD::MSTORE", SDTMaskedStore,
480 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
481 def masked_load : SDNode<"ISD::MLOAD", SDTMaskedLoad,
482 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
484 // Do not use ld, st directly. Use load, extload, sextload, zextload, store,
485 // and truncst (see below).
486 def ld : SDNode<"ISD::LOAD" , SDTLoad,
487 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
488 def st : SDNode<"ISD::STORE" , SDTStore,
489 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
490 def ist : SDNode<"ISD::STORE" , SDTIStore,
491 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
493 def vector_shuffle : SDNode<"ISD::VECTOR_SHUFFLE", SDTVecShuffle, []>;
494 def build_vector : SDNode<"ISD::BUILD_VECTOR", SDTypeProfile<1, -1, []>, []>;
495 def scalar_to_vector : SDNode<"ISD::SCALAR_TO_VECTOR", SDTypeProfile<1, 1, []>,
497 def vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT",
498 SDTypeProfile<1, 2, [SDTCisPtrTy<2>]>, []>;
499 def vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT",
500 SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>;
501 def concat_vectors : SDNode<"ISD::CONCAT_VECTORS",
502 SDTypeProfile<1, 2, [SDTCisSubVecOfVec<1, 0>, SDTCisSameAs<1, 2>]>,[]>;
504 // This operator does not do subvector type checking. The ARM
505 // backend, at least, needs it.
506 def vector_extract_subvec : SDNode<"ISD::EXTRACT_SUBVECTOR",
507 SDTypeProfile<1, 2, [SDTCisInt<2>, SDTCisVec<1>, SDTCisVec<0>]>,
510 // This operator does subvector type checking.
511 def extract_subvector : SDNode<"ISD::EXTRACT_SUBVECTOR", SDTSubVecExtract, []>;
512 def insert_subvector : SDNode<"ISD::INSERT_SUBVECTOR", SDTSubVecInsert, []>;
514 // Nodes for intrinsics, you should use the intrinsic itself and let tblgen use
515 // these internally. Don't reference these directly.
516 def intrinsic_void : SDNode<"ISD::INTRINSIC_VOID",
517 SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>,
519 def intrinsic_w_chain : SDNode<"ISD::INTRINSIC_W_CHAIN",
520 SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>,
522 def intrinsic_wo_chain : SDNode<"ISD::INTRINSIC_WO_CHAIN",
523 SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>, []>;
525 // Do not use cvt directly. Use cvt forms below
526 def cvt : SDNode<"ISD::CONVERT_RNDSAT", SDTConvertOp>;
528 def SDT_assertext : SDTypeProfile<1, 1,
529 [SDTCisInt<0>, SDTCisInt<1>, SDTCisSameAs<1, 0>]>;
530 def assertsext : SDNode<"ISD::AssertSext", SDT_assertext>;
531 def assertzext : SDNode<"ISD::AssertZext", SDT_assertext>;
534 //===----------------------------------------------------------------------===//
535 // Selection DAG Condition Codes
537 class CondCode; // ISD::CondCode enums
538 def SETOEQ : CondCode; def SETOGT : CondCode;
539 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
540 def SETONE : CondCode; def SETO : CondCode; def SETUO : CondCode;
541 def SETUEQ : CondCode; def SETUGT : CondCode; def SETUGE : CondCode;
542 def SETULT : CondCode; def SETULE : CondCode; def SETUNE : CondCode;
544 def SETEQ : CondCode; def SETGT : CondCode; def SETGE : CondCode;
545 def SETLT : CondCode; def SETLE : CondCode; def SETNE : CondCode;
548 //===----------------------------------------------------------------------===//
549 // Selection DAG Node Transformation Functions.
551 // This mechanism allows targets to manipulate nodes in the output DAG once a
552 // match has been formed. This is typically used to manipulate immediate
555 class SDNodeXForm<SDNode opc, code xformFunction> {
557 code XFormFunction = xformFunction;
560 def NOOP_SDNodeXForm : SDNodeXForm<imm, [{}]>;
562 //===----------------------------------------------------------------------===//
563 // PatPred Subclasses.
565 // These allow specifying different sorts of predicates that control whether a
570 class CodePatPred<code predicate> : PatPred {
571 code PredicateCode = predicate;
575 //===----------------------------------------------------------------------===//
576 // Selection DAG Pattern Fragments.
578 // Pattern fragments are reusable chunks of dags that match specific things.
579 // They can take arguments and have C++ predicates that control whether they
580 // match. They are intended to make the patterns for common instructions more
581 // compact and readable.
584 /// PatFrag - Represents a pattern fragment. This can match something on the
585 /// DAG, from a single node to multiple nested other fragments.
587 class PatFrag<dag ops, dag frag, code pred = [{}],
588 SDNodeXForm xform = NOOP_SDNodeXForm> : SDPatternOperator {
591 code PredicateCode = pred;
592 code ImmediateCode = [{}];
593 SDNodeXForm OperandTransform = xform;
596 // OutPatFrag is a pattern fragment that is used as part of an output pattern
597 // (not an input pattern). These do not have predicates or transforms, but are
598 // used to avoid repeated subexpressions in output patterns.
599 class OutPatFrag<dag ops, dag frag>
600 : PatFrag<ops, frag, [{}], NOOP_SDNodeXForm>;
602 // PatLeaf's are pattern fragments that have no operands. This is just a helper
603 // to define immediates and other common things concisely.
604 class PatLeaf<dag frag, code pred = [{}], SDNodeXForm xform = NOOP_SDNodeXForm>
605 : PatFrag<(ops), frag, pred, xform>;
608 // ImmLeaf is a pattern fragment with a constraint on the immediate. The
609 // constraint is a function that is run on the immediate (always with the value
610 // sign extended out to an int64_t) as Imm. For example:
612 // def immSExt8 : ImmLeaf<i16, [{ return (char)Imm == Imm; }]>;
614 // this is a more convenient form to match 'imm' nodes in than PatLeaf and also
615 // is preferred over using PatLeaf because it allows the code generator to
616 // reason more about the constraint.
618 // If FastIsel should ignore all instructions that have an operand of this type,
619 // the FastIselShouldIgnore flag can be set. This is an optimization to reduce
620 // the code size of the generated fast instruction selector.
621 class ImmLeaf<ValueType vt, code pred, SDNodeXForm xform = NOOP_SDNodeXForm>
622 : PatFrag<(ops), (vt imm), [{}], xform> {
623 let ImmediateCode = pred;
624 bit FastIselShouldIgnore = 0;
630 def vtInt : PatLeaf<(vt), [{ return N->getVT().isInteger(); }]>;
631 def vtFP : PatLeaf<(vt), [{ return N->getVT().isFloatingPoint(); }]>;
633 def immAllOnesV: PatLeaf<(build_vector), [{
634 return ISD::isBuildVectorAllOnes(N);
636 def immAllZerosV: PatLeaf<(build_vector), [{
637 return ISD::isBuildVectorAllZeros(N);
642 // Other helper fragments.
643 def not : PatFrag<(ops node:$in), (xor node:$in, -1)>;
644 def vnot : PatFrag<(ops node:$in), (xor node:$in, immAllOnesV)>;
645 def ineg : PatFrag<(ops node:$in), (sub 0, node:$in)>;
647 // null_frag - The null pattern operator is used in multiclass instantiations
648 // which accept an SDPatternOperator for use in matching patterns for internal
649 // definitions. When expanding a pattern, if the null fragment is referenced
650 // in the expansion, the pattern is discarded and it is as-if '[]' had been
651 // specified. This allows multiclasses to have the isel patterns be optional.
652 def null_frag : SDPatternOperator;
655 def unindexedload : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
656 return cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
658 def load : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
659 return cast<LoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
662 // extending load fragments.
663 def extload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
664 return cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD;
666 def sextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
667 return cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
669 def zextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
670 return cast<LoadSDNode>(N)->getExtensionType() == ISD::ZEXTLOAD;
673 def extloadi1 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
674 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i1;
676 def extloadi8 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
677 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
679 def extloadi16 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
680 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
682 def extloadi32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
683 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
685 def extloadf32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
686 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::f32;
688 def extloadf64 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
689 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::f64;
692 def sextloadi1 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
693 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i1;
695 def sextloadi8 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
696 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
698 def sextloadi16 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
699 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
701 def sextloadi32 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
702 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
705 def zextloadi1 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
706 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i1;
708 def zextloadi8 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
709 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
711 def zextloadi16 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
712 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
714 def zextloadi32 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
715 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
718 def extloadvi1 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
719 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::i1;
721 def extloadvi8 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
722 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8;
724 def extloadvi16 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
725 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16;
727 def extloadvi32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
728 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32;
730 def extloadvf32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
731 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::f32;
733 def extloadvf64 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
734 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::f64;
737 def sextloadvi1 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
738 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::i1;
740 def sextloadvi8 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
741 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8;
743 def sextloadvi16 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
744 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16;
746 def sextloadvi32 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
747 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32;
750 def zextloadvi1 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
751 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::i1;
753 def zextloadvi8 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
754 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8;
756 def zextloadvi16 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
757 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16;
759 def zextloadvi32 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
760 return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32;
764 def unindexedstore : PatFrag<(ops node:$val, node:$ptr),
765 (st node:$val, node:$ptr), [{
766 return cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
768 def store : PatFrag<(ops node:$val, node:$ptr),
769 (unindexedstore node:$val, node:$ptr), [{
770 return !cast<StoreSDNode>(N)->isTruncatingStore();
773 // truncstore fragments.
774 def truncstore : PatFrag<(ops node:$val, node:$ptr),
775 (unindexedstore node:$val, node:$ptr), [{
776 return cast<StoreSDNode>(N)->isTruncatingStore();
778 def truncstorei8 : PatFrag<(ops node:$val, node:$ptr),
779 (truncstore node:$val, node:$ptr), [{
780 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i8;
782 def truncstorei16 : PatFrag<(ops node:$val, node:$ptr),
783 (truncstore node:$val, node:$ptr), [{
784 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i16;
786 def truncstorei32 : PatFrag<(ops node:$val, node:$ptr),
787 (truncstore node:$val, node:$ptr), [{
788 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i32;
790 def truncstoref32 : PatFrag<(ops node:$val, node:$ptr),
791 (truncstore node:$val, node:$ptr), [{
792 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::f32;
794 def truncstoref64 : PatFrag<(ops node:$val, node:$ptr),
795 (truncstore node:$val, node:$ptr), [{
796 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::f64;
799 // indexed store fragments.
800 def istore : PatFrag<(ops node:$val, node:$base, node:$offset),
801 (ist node:$val, node:$base, node:$offset), [{
802 return !cast<StoreSDNode>(N)->isTruncatingStore();
805 def pre_store : PatFrag<(ops node:$val, node:$base, node:$offset),
806 (istore node:$val, node:$base, node:$offset), [{
807 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
808 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
811 def itruncstore : PatFrag<(ops node:$val, node:$base, node:$offset),
812 (ist node:$val, node:$base, node:$offset), [{
813 return cast<StoreSDNode>(N)->isTruncatingStore();
815 def pre_truncst : PatFrag<(ops node:$val, node:$base, node:$offset),
816 (itruncstore node:$val, node:$base, node:$offset), [{
817 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
818 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
820 def pre_truncsti1 : PatFrag<(ops node:$val, node:$base, node:$offset),
821 (pre_truncst node:$val, node:$base, node:$offset), [{
822 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i1;
824 def pre_truncsti8 : PatFrag<(ops node:$val, node:$base, node:$offset),
825 (pre_truncst node:$val, node:$base, node:$offset), [{
826 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i8;
828 def pre_truncsti16 : PatFrag<(ops node:$val, node:$base, node:$offset),
829 (pre_truncst node:$val, node:$base, node:$offset), [{
830 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i16;
832 def pre_truncsti32 : PatFrag<(ops node:$val, node:$base, node:$offset),
833 (pre_truncst node:$val, node:$base, node:$offset), [{
834 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i32;
836 def pre_truncstf32 : PatFrag<(ops node:$val, node:$base, node:$offset),
837 (pre_truncst node:$val, node:$base, node:$offset), [{
838 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::f32;
841 def post_store : PatFrag<(ops node:$val, node:$ptr, node:$offset),
842 (istore node:$val, node:$ptr, node:$offset), [{
843 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
844 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
847 def post_truncst : PatFrag<(ops node:$val, node:$base, node:$offset),
848 (itruncstore node:$val, node:$base, node:$offset), [{
849 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
850 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
852 def post_truncsti1 : PatFrag<(ops node:$val, node:$base, node:$offset),
853 (post_truncst node:$val, node:$base, node:$offset), [{
854 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i1;
856 def post_truncsti8 : PatFrag<(ops node:$val, node:$base, node:$offset),
857 (post_truncst node:$val, node:$base, node:$offset), [{
858 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i8;
860 def post_truncsti16 : PatFrag<(ops node:$val, node:$base, node:$offset),
861 (post_truncst node:$val, node:$base, node:$offset), [{
862 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i16;
864 def post_truncsti32 : PatFrag<(ops node:$val, node:$base, node:$offset),
865 (post_truncst node:$val, node:$base, node:$offset), [{
866 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i32;
868 def post_truncstf32 : PatFrag<(ops node:$val, node:$base, node:$offset),
869 (post_truncst node:$val, node:$base, node:$offset), [{
870 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::f32;
873 // setcc convenience fragments.
874 def setoeq : PatFrag<(ops node:$lhs, node:$rhs),
875 (setcc node:$lhs, node:$rhs, SETOEQ)>;
876 def setogt : PatFrag<(ops node:$lhs, node:$rhs),
877 (setcc node:$lhs, node:$rhs, SETOGT)>;
878 def setoge : PatFrag<(ops node:$lhs, node:$rhs),
879 (setcc node:$lhs, node:$rhs, SETOGE)>;
880 def setolt : PatFrag<(ops node:$lhs, node:$rhs),
881 (setcc node:$lhs, node:$rhs, SETOLT)>;
882 def setole : PatFrag<(ops node:$lhs, node:$rhs),
883 (setcc node:$lhs, node:$rhs, SETOLE)>;
884 def setone : PatFrag<(ops node:$lhs, node:$rhs),
885 (setcc node:$lhs, node:$rhs, SETONE)>;
886 def seto : PatFrag<(ops node:$lhs, node:$rhs),
887 (setcc node:$lhs, node:$rhs, SETO)>;
888 def setuo : PatFrag<(ops node:$lhs, node:$rhs),
889 (setcc node:$lhs, node:$rhs, SETUO)>;
890 def setueq : PatFrag<(ops node:$lhs, node:$rhs),
891 (setcc node:$lhs, node:$rhs, SETUEQ)>;
892 def setugt : PatFrag<(ops node:$lhs, node:$rhs),
893 (setcc node:$lhs, node:$rhs, SETUGT)>;
894 def setuge : PatFrag<(ops node:$lhs, node:$rhs),
895 (setcc node:$lhs, node:$rhs, SETUGE)>;
896 def setult : PatFrag<(ops node:$lhs, node:$rhs),
897 (setcc node:$lhs, node:$rhs, SETULT)>;
898 def setule : PatFrag<(ops node:$lhs, node:$rhs),
899 (setcc node:$lhs, node:$rhs, SETULE)>;
900 def setune : PatFrag<(ops node:$lhs, node:$rhs),
901 (setcc node:$lhs, node:$rhs, SETUNE)>;
902 def seteq : PatFrag<(ops node:$lhs, node:$rhs),
903 (setcc node:$lhs, node:$rhs, SETEQ)>;
904 def setgt : PatFrag<(ops node:$lhs, node:$rhs),
905 (setcc node:$lhs, node:$rhs, SETGT)>;
906 def setge : PatFrag<(ops node:$lhs, node:$rhs),
907 (setcc node:$lhs, node:$rhs, SETGE)>;
908 def setlt : PatFrag<(ops node:$lhs, node:$rhs),
909 (setcc node:$lhs, node:$rhs, SETLT)>;
910 def setle : PatFrag<(ops node:$lhs, node:$rhs),
911 (setcc node:$lhs, node:$rhs, SETLE)>;
912 def setne : PatFrag<(ops node:$lhs, node:$rhs),
913 (setcc node:$lhs, node:$rhs, SETNE)>;
915 def atomic_cmp_swap_8 :
916 PatFrag<(ops node:$ptr, node:$cmp, node:$swap),
917 (atomic_cmp_swap node:$ptr, node:$cmp, node:$swap), [{
918 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i8;
920 def atomic_cmp_swap_16 :
921 PatFrag<(ops node:$ptr, node:$cmp, node:$swap),
922 (atomic_cmp_swap node:$ptr, node:$cmp, node:$swap), [{
923 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i16;
925 def atomic_cmp_swap_32 :
926 PatFrag<(ops node:$ptr, node:$cmp, node:$swap),
927 (atomic_cmp_swap node:$ptr, node:$cmp, node:$swap), [{
928 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i32;
930 def atomic_cmp_swap_64 :
931 PatFrag<(ops node:$ptr, node:$cmp, node:$swap),
932 (atomic_cmp_swap node:$ptr, node:$cmp, node:$swap), [{
933 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i64;
936 multiclass binary_atomic_op<SDNode atomic_op> {
937 def _8 : PatFrag<(ops node:$ptr, node:$val),
938 (atomic_op node:$ptr, node:$val), [{
939 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i8;
941 def _16 : PatFrag<(ops node:$ptr, node:$val),
942 (atomic_op node:$ptr, node:$val), [{
943 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i16;
945 def _32 : PatFrag<(ops node:$ptr, node:$val),
946 (atomic_op node:$ptr, node:$val), [{
947 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i32;
949 def _64 : PatFrag<(ops node:$ptr, node:$val),
950 (atomic_op node:$ptr, node:$val), [{
951 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i64;
955 defm atomic_load_add : binary_atomic_op<atomic_load_add>;
956 defm atomic_swap : binary_atomic_op<atomic_swap>;
957 defm atomic_load_sub : binary_atomic_op<atomic_load_sub>;
958 defm atomic_load_and : binary_atomic_op<atomic_load_and>;
959 defm atomic_load_or : binary_atomic_op<atomic_load_or>;
960 defm atomic_load_xor : binary_atomic_op<atomic_load_xor>;
961 defm atomic_load_nand : binary_atomic_op<atomic_load_nand>;
962 defm atomic_load_min : binary_atomic_op<atomic_load_min>;
963 defm atomic_load_max : binary_atomic_op<atomic_load_max>;
964 defm atomic_load_umin : binary_atomic_op<atomic_load_umin>;
965 defm atomic_load_umax : binary_atomic_op<atomic_load_umax>;
966 defm atomic_store : binary_atomic_op<atomic_store>;
969 PatFrag<(ops node:$ptr),
970 (atomic_load node:$ptr), [{
971 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i8;
974 PatFrag<(ops node:$ptr),
975 (atomic_load node:$ptr), [{
976 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i16;
979 PatFrag<(ops node:$ptr),
980 (atomic_load node:$ptr), [{
981 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i32;
984 PatFrag<(ops node:$ptr),
985 (atomic_load node:$ptr), [{
986 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i64;
989 //===----------------------------------------------------------------------===//
990 // Selection DAG CONVERT_RNDSAT patterns
992 def cvtff : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
993 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
994 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_FF;
997 def cvtss : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
998 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
999 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_SS;
1002 def cvtsu : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
1003 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
1004 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_SU;
1007 def cvtus : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
1008 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
1009 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_US;
1012 def cvtuu : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
1013 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
1014 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_UU;
1017 def cvtsf : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
1018 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
1019 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_SF;
1022 def cvtuf : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
1023 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
1024 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_UF;
1027 def cvtfs : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
1028 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
1029 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_FS;
1032 def cvtfu : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
1033 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
1034 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_FU;
1037 //===----------------------------------------------------------------------===//
1038 // Selection DAG Pattern Support.
1040 // Patterns are what are actually matched against by the target-flavored
1041 // instruction selection DAG. Instructions defined by the target implicitly
1042 // define patterns in most cases, but patterns can also be explicitly added when
1043 // an operation is defined by a sequence of instructions (e.g. loading a large
1044 // immediate value on RISC targets that do not support immediates as large as
1048 class Pattern<dag patternToMatch, list<dag> resultInstrs> {
1049 dag PatternToMatch = patternToMatch;
1050 list<dag> ResultInstrs = resultInstrs;
1051 list<Predicate> Predicates = []; // See class Instruction in Target.td.
1052 int AddedComplexity = 0; // See class Instruction in Target.td.
1055 // Pat - A simple (but common) form of a pattern, which produces a simple result
1056 // not needing a full list.
1057 class Pat<dag pattern, dag result> : Pattern<pattern, [result]>;
1059 //===----------------------------------------------------------------------===//
1060 // Complex pattern definitions.
1063 // Complex patterns, e.g. X86 addressing mode, requires pattern matching code
1064 // in C++. NumOperands is the number of operands returned by the select function;
1065 // SelectFunc is the name of the function used to pattern match the max. pattern;
1066 // RootNodes are the list of possible root nodes of the sub-dags to match.
1067 // e.g. X86 addressing mode - def addr : ComplexPattern<4, "SelectAddr", [add]>;
1069 class ComplexPattern<ValueType ty, int numops, string fn,
1070 list<SDNode> roots = [], list<SDNodeProperty> props = []> {
1072 int NumOperands = numops;
1073 string SelectFunc = fn;
1074 list<SDNode> RootNodes = roots;
1075 list<SDNodeProperty> Properties = props;