1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
24 class TargetSubtarget;
25 class TargetInstrInfo;
26 class TargetIntrinsicInfo;
29 class TargetFrameInfo;
30 class MachineCodeEmitter;
32 class TargetRegisterInfo;
34 class PassManagerBase;
37 class TargetMachOWriterInfo;
38 class TargetELFWriterInfo;
41 // Relocation model types.
46 PIC_, // Cannot be named PIC due to collision with -DPIC
72 // Code generation optimization level.
73 namespace CodeGenOpt {
82 // Possible float ABI settings. Used with FloatABIType in TargetOptions.h.
85 Default, // Target-specific (either soft of hard depending on triple, etc).
91 //===----------------------------------------------------------------------===//
93 /// TargetMachine - Primary interface to the complete machine description for
94 /// the target machine. All target-specific information should be accessible
95 /// through this interface.
98 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
99 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
100 protected: // Can only create subclasses.
103 /// getSubtargetImpl - virtual method implemented by subclasses that returns
104 /// a reference to that target's TargetSubtarget-derived member variable.
105 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
107 /// AsmInfo - Contains target specific asm information.
109 mutable const TargetAsmInfo *AsmInfo;
111 /// createTargetAsmInfo - Create a new instance of target specific asm
113 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; }
116 virtual ~TargetMachine();
118 /// getModuleMatchQuality - This static method should be implemented by
119 /// targets to indicate how closely they match the specified module. This is
120 /// used by the LLC tool to determine which target to use when an explicit
121 /// -march option is not specified. If a target returns zero, it will never
122 /// be chosen without an explicit -march option.
123 static unsigned getModuleMatchQuality(const Module &) { return 0; }
125 /// getJITMatchQuality - This static method should be implemented by targets
126 /// that provide JIT capabilities to indicate how suitable they are for
127 /// execution on the current host. If a value of 0 is returned, the target
128 /// will not be used unless an explicit -march option is used.
129 static unsigned getJITMatchQuality() { return 0; }
131 // Interfaces to the major aspects of target machine information:
132 // -- Instruction opcode and operand information
133 // -- Pipelines and scheduling information
134 // -- Stack frame information
135 // -- Selection DAG lowering information
137 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
138 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
139 virtual TargetLowering *getTargetLowering() const { return 0; }
140 virtual const TargetData *getTargetData() const { return 0; }
142 /// getTargetAsmInfo - Return target specific asm information.
144 const TargetAsmInfo *getTargetAsmInfo() const {
145 if (!AsmInfo) AsmInfo = createTargetAsmInfo();
149 /// getSubtarget - This method returns a pointer to the specified type of
150 /// TargetSubtarget. In debug builds, it verifies that the object being
151 /// returned is of the correct type.
152 template<typename STC> const STC &getSubtarget() const {
153 const TargetSubtarget *TST = getSubtargetImpl();
154 assert(TST && dynamic_cast<const STC*>(TST) &&
155 "Not the right kind of subtarget!");
156 return *static_cast<const STC*>(TST);
159 /// getRegisterInfo - If register information is available, return it. If
160 /// not, return null. This is kept separate from RegInfo until RegInfo has
161 /// details of graph coloring register allocation removed from it.
163 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
165 /// getIntrinsicInfo - If intrinsic information is available, return it. If
166 /// not, return null.
168 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
170 /// getJITInfo - If this target supports a JIT, return information for it,
171 /// otherwise return null.
173 virtual TargetJITInfo *getJITInfo() { return 0; }
175 /// getInstrItineraryData - Returns instruction itinerary data for the target
176 /// or specific subtarget.
178 virtual const InstrItineraryData getInstrItineraryData() const {
179 return InstrItineraryData();
182 /// getMachOWriterInfo - If this target supports a Mach-O writer, return
183 /// information for it, otherwise return null.
185 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
187 /// getELFWriterInfo - If this target supports an ELF writer, return
188 /// information for it, otherwise return null.
190 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
192 /// getRelocationModel - Returns the code generation relocation model. The
193 /// choices are static, PIC, and dynamic-no-pic, and target default.
194 static Reloc::Model getRelocationModel();
196 /// setRelocationModel - Sets the code generation relocation model.
198 static void setRelocationModel(Reloc::Model Model);
200 /// getCodeModel - Returns the code model. The choices are small, kernel,
201 /// medium, large, and target default.
202 static CodeModel::Model getCodeModel();
204 /// setCodeModel - Sets the code model.
206 static void setCodeModel(CodeModel::Model Model);
208 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
210 static bool getAsmVerbosityDefault();
212 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
214 static void setAsmVerbosityDefault(bool);
216 /// CodeGenFileType - These enums are meant to be passed into
217 /// addPassesToEmitFile to indicate what type of file to emit.
218 enum CodeGenFileType {
219 AssemblyFile, ObjectFile, DynamicLibrary
222 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
223 /// on this target. User flag overrides.
224 virtual bool getEnableTailMergeDefault() const { return true; }
226 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
227 /// specified file emitted. Typically this will involve several steps of code
228 /// generation. If Fast is set to true, the code generator should emit code
229 /// as fast as possible, though the generated code may be less efficient.
230 /// This method should return FileModel::Error if emission of this file type
231 /// is not supported.
233 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
237 return FileModel::None;
240 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
241 /// to be split up (e.g., to add an object writer pass), this method can be
242 /// used to finish up adding passes to emit the file, if necessary.
244 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
245 MachineCodeEmitter *,
250 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
251 /// to be split up (e.g., to add an object writer pass), this method can be
252 /// used to finish up adding passes to emit the file, if necessary.
254 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
260 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
261 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
262 /// actually outputting the machine code and resolving things like the address
263 /// of functions. This method returns true if machine code emission is
266 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
267 MachineCodeEmitter &,
272 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
273 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
274 /// actually outputting the machine code and resolving things like the address
275 /// of functions. This method returns true if machine code emission is
278 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
284 /// addPassesToEmitWholeFile - This method can be implemented by targets that
285 /// require having the entire module at once. This is not recommended, do not
287 virtual bool WantsWholeFile() const { return false; }
288 virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &,
295 /// LLVMTargetMachine - This class describes a target machine that is
296 /// implemented with the LLVM target-independent code generator.
298 class LLVMTargetMachine : public TargetMachine {
299 protected: // Can only create subclasses.
300 LLVMTargetMachine() { }
302 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
303 /// both emitting to assembly files or machine code output.
305 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
309 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
310 /// specified file emitted. Typically this will involve several steps of code
311 /// generation. If OptLevel is None, the code generator should emit code as fast
312 /// as possible, though the generated code may be less efficient. This method
313 /// should return FileModel::Error if emission of this file type is not
316 /// The default implementation of this method adds components from the
317 /// LLVM retargetable code generator, invoking the methods below to get
318 /// target-specific passes in standard locations.
320 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
322 CodeGenFileType FileType,
325 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
326 /// to be split up (e.g., to add an object writer pass), this method can be
327 /// used to finish up adding passes to emit the file, if necessary.
329 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
330 MachineCodeEmitter *MCE,
333 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
334 /// to be split up (e.g., to add an object writer pass), this method can be
335 /// used to finish up adding passes to emit the file, if necessary.
337 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
341 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
342 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
343 /// actually outputting the machine code and resolving things like the address
344 /// of functions. This method returns true if machine code emission is
347 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
348 MachineCodeEmitter &MCE,
351 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
352 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
353 /// actually outputting the machine code and resolving things like the address
354 /// of functions. This method returns true if machine code emission is
357 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
361 /// Target-Independent Code Generator Pass Configuration Options.
363 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
364 /// passes, then install an instruction selector pass, which converts from
365 /// LLVM code to machine instructions.
366 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
370 /// addPreRegAllocPasses - This method may be implemented by targets that want
371 /// to run passes immediately before register allocation. This should return
372 /// true if -print-machineinstrs should print after these passes.
373 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
377 /// addPostRegAllocPasses - This method may be implemented by targets that
378 /// want to run passes after register allocation but before prolog-epilog
379 /// insertion. This should return true if -print-machineinstrs should print
380 /// after these passes.
381 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
385 /// addPreEmitPass - This pass may be implemented by targets that want to run
386 /// passes immediately before machine code is emitted. This should return
387 /// true if -print-machineinstrs should print out the code after the passes.
388 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
393 /// addAssemblyEmitter - This pass should be overridden by the target to add
394 /// the asmprinter, if asm emission is supported. If this is not supported,
395 /// 'true' should be returned.
396 virtual bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level,
397 bool /* VerboseAsmDefault */, raw_ostream &) {
401 /// addCodeEmitter - This pass should be overridden by the target to add a
402 /// code emitter, if supported. If this is not supported, 'true' should be
403 /// returned. If DumpAsm is true, the generated assembly is printed to cerr.
404 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
405 bool /*DumpAsm*/, MachineCodeEmitter &) {
409 /// addCodeEmitter - This pass should be overridden by the target to add a
410 /// code emitter, if supported. If this is not supported, 'true' should be
411 /// returned. If DumpAsm is true, the generated assembly is printed to cerr.
412 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
413 bool /*DumpAsm*/, JITCodeEmitter &) {
417 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
418 /// a code emitter (without setting flags), if supported. If this is not
419 /// supported, 'true' should be returned. If DumpAsm is true, the generated
420 /// assembly is printed to cerr.
421 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
422 bool /*DumpAsm*/, MachineCodeEmitter &) {
426 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
427 /// a code emitter (without setting flags), if supported. If this is not
428 /// supported, 'true' should be returned. If DumpAsm is true, the generated
429 /// assembly is printed to cerr.
430 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
431 bool /*DumpAsm*/, JITCodeEmitter &) {
435 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
436 /// on this target. User flag overrides.
437 virtual bool getEnableTailMergeDefault() const { return true; }
440 } // End llvm namespace