1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
24 class TargetSubtarget;
25 class TargetInstrInfo;
28 class TargetFrameInfo;
29 class MachineCodeEmitter;
30 class TargetRegisterInfo;
32 class PassManagerBase;
35 class TargetMachOWriterInfo;
36 class TargetELFWriterInfo;
39 // Relocation model types.
44 PIC_, // Cannot be named PIC due to collision with -DPIC
70 //===----------------------------------------------------------------------===//
72 /// TargetMachine - Primary interface to the complete machine description for
73 /// the target machine. All target-specific information should be accessible
74 /// through this interface.
77 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
78 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
79 protected: // Can only create subclasses.
80 TargetMachine() : AsmInfo(0) { }
82 /// getSubtargetImpl - virtual method implemented by subclasses that returns
83 /// a reference to that target's TargetSubtarget-derived member variable.
84 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
86 /// AsmInfo - Contains target specific asm information.
88 mutable const TargetAsmInfo *AsmInfo;
90 /// createTargetAsmInfo - Create a new instance of target specific asm
92 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; }
95 virtual ~TargetMachine();
97 /// getModuleMatchQuality - This static method should be implemented by
98 /// targets to indicate how closely they match the specified module. This is
99 /// used by the LLC tool to determine which target to use when an explicit
100 /// -march option is not specified. If a target returns zero, it will never
101 /// be chosen without an explicit -march option.
102 static unsigned getModuleMatchQuality(const Module &) { return 0; }
104 /// getJITMatchQuality - This static method should be implemented by targets
105 /// that provide JIT capabilities to indicate how suitable they are for
106 /// execution on the current host. If a value of 0 is returned, the target
107 /// will not be used unless an explicit -march option is used.
108 static unsigned getJITMatchQuality() { return 0; }
110 // Interfaces to the major aspects of target machine information:
111 // -- Instruction opcode and operand information
112 // -- Pipelines and scheduling information
113 // -- Stack frame information
114 // -- Selection DAG lowering information
116 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
117 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
118 virtual TargetLowering *getTargetLowering() const { return 0; }
119 virtual const TargetData *getTargetData() const { return 0; }
122 /// getTargetAsmInfo - Return target specific asm information.
124 const TargetAsmInfo *getTargetAsmInfo() const {
125 if (!AsmInfo) AsmInfo = createTargetAsmInfo();
129 /// getSubtarget - This method returns a pointer to the specified type of
130 /// TargetSubtarget. In debug builds, it verifies that the object being
131 /// returned is of the correct type.
132 template<typename STC> const STC &getSubtarget() const {
133 const TargetSubtarget *TST = getSubtargetImpl();
134 assert(TST && dynamic_cast<const STC*>(TST) &&
135 "Not the right kind of subtarget!");
136 return *static_cast<const STC*>(TST);
139 /// getRegisterInfo - If register information is available, return it. If
140 /// not, return null. This is kept separate from RegInfo until RegInfo has
141 /// details of graph coloring register allocation removed from it.
143 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
145 /// getJITInfo - If this target supports a JIT, return information for it,
146 /// otherwise return null.
148 virtual TargetJITInfo *getJITInfo() { return 0; }
150 /// getInstrItineraryData - Returns instruction itinerary data for the target
151 /// or specific subtarget.
153 virtual const InstrItineraryData getInstrItineraryData() const {
154 return InstrItineraryData();
157 /// getMachOWriterInfo - If this target supports a Mach-O writer, return
158 /// information for it, otherwise return null.
160 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
162 /// getELFWriterInfo - If this target supports an ELF writer, return
163 /// information for it, otherwise return null.
165 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
167 /// getRelocationModel - Returns the code generation relocation model. The
168 /// choices are static, PIC, and dynamic-no-pic, and target default.
169 static Reloc::Model getRelocationModel();
171 /// setRelocationModel - Sets the code generation relocation model.
172 static void setRelocationModel(Reloc::Model Model);
174 /// getCodeModel - Returns the code model. The choices are small, kernel,
175 /// medium, large, and target default.
176 static CodeModel::Model getCodeModel();
178 /// setCodeModel - Sets the code model.
179 static void setCodeModel(CodeModel::Model Model);
181 /// CodeGenFileType - These enums are meant to be passed into
182 /// addPassesToEmitFile to indicate what type of file to emit.
183 enum CodeGenFileType {
184 AssemblyFile, ObjectFile, DynamicLibrary
187 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
188 /// on this target. User flag overrides.
189 virtual bool getEnableTailMergeDefault() const { return true; }
191 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
192 /// specified file emitted. Typically this will involve several steps of code
193 /// generation. If Fast is set to true, the code generator should emit code
194 /// as fast as possible, though the generated code may be less efficient.
195 /// This method should return FileModel::Error if emission of this file type
196 /// is not supported.
198 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
202 return FileModel::None;
205 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
206 /// to be split up (e.g., to add an object writer pass), this method can be
207 /// used to finish up adding passes to emit the file, if necessary.
209 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
210 MachineCodeEmitter *, bool /*Fast*/) {
214 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
215 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
216 /// actually outputting the machine code and resolving things like the address
217 /// of functions. This method returns true if machine code emission is
220 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
221 MachineCodeEmitter &,
226 /// addPassesToEmitWholeFile - This method can be implemented by targets that
227 /// require having the entire module at once. This is not recommended, do not
229 virtual bool WantsWholeFile() const { return false; }
230 virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &,
231 CodeGenFileType, bool /*Fast*/) {
236 /// LLVMTargetMachine - This class describes a target machine that is
237 /// implemented with the LLVM target-independent code generator.
239 class LLVMTargetMachine : public TargetMachine {
240 protected: // Can only create subclasses.
241 LLVMTargetMachine() { }
243 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
244 /// both emitting to assembly files or machine code output.
246 bool addCommonCodeGenPasses(PassManagerBase &, bool /*Fast*/);
250 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
251 /// specified file emitted. Typically this will involve several steps of code
252 /// generation. If Fast is set to true, the code generator should emit code
253 /// as fast as possible, though the generated code may be less efficient.
254 /// This method should return FileModel::Error if emission of this file type
255 /// is not supported.
257 /// The default implementation of this method adds components from the
258 /// LLVM retargetable code generator, invoking the methods below to get
259 /// target-specific passes in standard locations.
261 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
263 CodeGenFileType FileType,
266 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
267 /// to be split up (e.g., to add an object writer pass), this method can be
268 /// used to finish up adding passes to emit the file, if necessary.
270 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
271 MachineCodeEmitter *MCE, bool Fast);
273 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
274 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
275 /// actually outputting the machine code and resolving things like the address
276 /// of functions. This method returns true if machine code emission is
279 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
280 MachineCodeEmitter &MCE, bool Fast);
282 /// Target-Independent Code Generator Pass Configuration Options.
284 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
285 /// passes, then install an instruction selector pass, which converts from
286 /// LLVM code to machine instructions.
287 virtual bool addInstSelector(PassManagerBase &, bool /*Fast*/) {
291 /// addPreRegAllocPasses - This method may be implemented by targets that want
292 /// to run passes immediately before register allocation. This should return
293 /// true if -print-machineinstrs should print after these passes.
294 virtual bool addPreRegAlloc(PassManagerBase &, bool /*Fast*/) {
298 /// addPostRegAllocPasses - This method may be implemented by targets that
299 /// want to run passes after register allocation but before prolog-epilog
300 /// insertion. This should return true if -print-machineinstrs should print
301 /// after these passes.
302 virtual bool addPostRegAlloc(PassManagerBase &, bool /*Fast*/) {
306 /// addPreEmitPass - This pass may be implemented by targets that want to run
307 /// passes immediately before machine code is emitted. This should return
308 /// true if -print-machineinstrs should print out the code after the passes.
309 virtual bool addPreEmitPass(PassManagerBase &, bool /*Fast*/) {
314 /// addAssemblyEmitter - This pass should be overridden by the target to add
315 /// the asmprinter, if asm emission is supported. If this is not supported,
316 /// 'true' should be returned.
317 virtual bool addAssemblyEmitter(PassManagerBase &, bool /*Fast*/,
322 /// addCodeEmitter - This pass should be overridden by the target to add a
323 /// code emitter, if supported. If this is not supported, 'true' should be
324 /// returned. If DumpAsm is true, the generated assembly is printed to cerr.
325 virtual bool addCodeEmitter(PassManagerBase &, bool /*Fast*/,
326 bool /*DumpAsm*/, MachineCodeEmitter &) {
330 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
331 /// a code emitter (without setting flags), if supported. If this is not
332 /// supported, 'true' should be returned. If DumpAsm is true, the generated
333 /// assembly is printed to cerr.
334 virtual bool addSimpleCodeEmitter(PassManagerBase &, bool /*Fast*/,
335 bool /*DumpAsm*/, MachineCodeEmitter &) {
339 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
340 /// on this target. User flag overrides.
341 virtual bool getEnableTailMergeDefault() const { return true; }
344 } // End llvm namespace