1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
24 class TargetSubtarget;
25 class TargetInstrInfo;
26 class TargetIntrinsicInfo;
29 class TargetFrameInfo;
30 class MachineCodeEmitter;
31 class TargetRegisterInfo;
33 class PassManagerBase;
36 class TargetMachOWriterInfo;
37 class TargetELFWriterInfo;
40 // Relocation model types.
45 PIC_, // Cannot be named PIC due to collision with -DPIC
71 // Code generation optimization level.
72 namespace CodeGenOpt {
80 //===----------------------------------------------------------------------===//
82 /// TargetMachine - Primary interface to the complete machine description for
83 /// the target machine. All target-specific information should be accessible
84 /// through this interface.
87 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
88 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
89 protected: // Can only create subclasses.
90 TargetMachine() : AsmInfo(0) { }
92 /// getSubtargetImpl - virtual method implemented by subclasses that returns
93 /// a reference to that target's TargetSubtarget-derived member variable.
94 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
96 /// AsmInfo - Contains target specific asm information.
98 mutable const TargetAsmInfo *AsmInfo;
100 /// createTargetAsmInfo - Create a new instance of target specific asm
102 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; }
105 virtual ~TargetMachine();
107 /// getModuleMatchQuality - This static method should be implemented by
108 /// targets to indicate how closely they match the specified module. This is
109 /// used by the LLC tool to determine which target to use when an explicit
110 /// -march option is not specified. If a target returns zero, it will never
111 /// be chosen without an explicit -march option.
112 static unsigned getModuleMatchQuality(const Module &) { return 0; }
114 /// getJITMatchQuality - This static method should be implemented by targets
115 /// that provide JIT capabilities to indicate how suitable they are for
116 /// execution on the current host. If a value of 0 is returned, the target
117 /// will not be used unless an explicit -march option is used.
118 static unsigned getJITMatchQuality() { return 0; }
120 // Interfaces to the major aspects of target machine information:
121 // -- Instruction opcode and operand information
122 // -- Pipelines and scheduling information
123 // -- Stack frame information
124 // -- Selection DAG lowering information
126 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
127 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
128 virtual TargetLowering *getTargetLowering() const { return 0; }
129 virtual const TargetData *getTargetData() const { return 0; }
131 /// getTargetAsmInfo - Return target specific asm information.
133 const TargetAsmInfo *getTargetAsmInfo() const {
134 if (!AsmInfo) AsmInfo = createTargetAsmInfo();
138 /// getSubtarget - This method returns a pointer to the specified type of
139 /// TargetSubtarget. In debug builds, it verifies that the object being
140 /// returned is of the correct type.
141 template<typename STC> const STC &getSubtarget() const {
142 const TargetSubtarget *TST = getSubtargetImpl();
143 assert(TST && dynamic_cast<const STC*>(TST) &&
144 "Not the right kind of subtarget!");
145 return *static_cast<const STC*>(TST);
148 /// getRegisterInfo - If register information is available, return it. If
149 /// not, return null. This is kept separate from RegInfo until RegInfo has
150 /// details of graph coloring register allocation removed from it.
152 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
154 /// getIntrinsicInfo - If intrinsic information is available, return it. If
155 /// not, return null.
157 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
159 /// getJITInfo - If this target supports a JIT, return information for it,
160 /// otherwise return null.
162 virtual TargetJITInfo *getJITInfo() { return 0; }
164 /// getInstrItineraryData - Returns instruction itinerary data for the target
165 /// or specific subtarget.
167 virtual const InstrItineraryData getInstrItineraryData() const {
168 return InstrItineraryData();
171 /// getMachOWriterInfo - If this target supports a Mach-O writer, return
172 /// information for it, otherwise return null.
174 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
176 /// getELFWriterInfo - If this target supports an ELF writer, return
177 /// information for it, otherwise return null.
179 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
181 /// getRelocationModel - Returns the code generation relocation model. The
182 /// choices are static, PIC, and dynamic-no-pic, and target default.
183 static Reloc::Model getRelocationModel();
185 /// setRelocationModel - Sets the code generation relocation model.
187 static void setRelocationModel(Reloc::Model Model);
189 /// getCodeModel - Returns the code model. The choices are small, kernel,
190 /// medium, large, and target default.
191 static CodeModel::Model getCodeModel();
193 /// setCodeModel - Sets the code model.
195 static void setCodeModel(CodeModel::Model Model);
197 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
199 static bool getAsmVerbosityDefault();
201 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
203 static void setAsmVerbosityDefault(bool);
205 /// CodeGenFileType - These enums are meant to be passed into
206 /// addPassesToEmitFile to indicate what type of file to emit.
207 enum CodeGenFileType {
208 AssemblyFile, ObjectFile, DynamicLibrary
211 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
212 /// on this target. User flag overrides.
213 virtual bool getEnableTailMergeDefault() const { return true; }
215 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
216 /// specified file emitted. Typically this will involve several steps of code
217 /// generation. If Fast is set to true, the code generator should emit code
218 /// as fast as possible, though the generated code may be less efficient.
219 /// This method should return FileModel::Error if emission of this file type
220 /// is not supported.
222 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
226 return FileModel::None;
229 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
230 /// to be split up (e.g., to add an object writer pass), this method can be
231 /// used to finish up adding passes to emit the file, if necessary.
233 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
234 MachineCodeEmitter *,
239 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
240 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
241 /// actually outputting the machine code and resolving things like the address
242 /// of functions. This method returns true if machine code emission is
245 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
246 MachineCodeEmitter &,
251 /// addPassesToEmitWholeFile - This method can be implemented by targets that
252 /// require having the entire module at once. This is not recommended, do not
254 virtual bool WantsWholeFile() const { return false; }
255 virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &,
262 /// LLVMTargetMachine - This class describes a target machine that is
263 /// implemented with the LLVM target-independent code generator.
265 class LLVMTargetMachine : public TargetMachine {
266 protected: // Can only create subclasses.
267 LLVMTargetMachine() { }
269 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
270 /// both emitting to assembly files or machine code output.
272 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
276 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
277 /// specified file emitted. Typically this will involve several steps of code
278 /// generation. If OptLevel is None, the code generator should emit code as fast
279 /// as possible, though the generated code may be less efficient. This method
280 /// should return FileModel::Error if emission of this file type is not
283 /// The default implementation of this method adds components from the
284 /// LLVM retargetable code generator, invoking the methods below to get
285 /// target-specific passes in standard locations.
287 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
289 CodeGenFileType FileType,
292 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
293 /// to be split up (e.g., to add an object writer pass), this method can be
294 /// used to finish up adding passes to emit the file, if necessary.
296 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
297 MachineCodeEmitter *MCE,
300 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
301 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
302 /// actually outputting the machine code and resolving things like the address
303 /// of functions. This method returns true if machine code emission is
306 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
307 MachineCodeEmitter &MCE,
310 /// Target-Independent Code Generator Pass Configuration Options.
312 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
313 /// passes, then install an instruction selector pass, which converts from
314 /// LLVM code to machine instructions.
315 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
319 /// addPreRegAllocPasses - This method may be implemented by targets that want
320 /// to run passes immediately before register allocation. This should return
321 /// true if -print-machineinstrs should print after these passes.
322 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
326 /// addPostRegAllocPasses - This method may be implemented by targets that
327 /// want to run passes after register allocation but before prolog-epilog
328 /// insertion. This should return true if -print-machineinstrs should print
329 /// after these passes.
330 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
334 /// addPreEmitPass - This pass may be implemented by targets that want to run
335 /// passes immediately before machine code is emitted. This should return
336 /// true if -print-machineinstrs should print out the code after the passes.
337 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
342 /// addAssemblyEmitter - This pass should be overridden by the target to add
343 /// the asmprinter, if asm emission is supported. If this is not supported,
344 /// 'true' should be returned.
345 virtual bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level,
346 bool /* VerboseAsmDefault */, raw_ostream &) {
350 /// addCodeEmitter - This pass should be overridden by the target to add a
351 /// code emitter, if supported. If this is not supported, 'true' should be
352 /// returned. If DumpAsm is true, the generated assembly is printed to cerr.
353 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
354 bool /*DumpAsm*/, MachineCodeEmitter &) {
358 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
359 /// a code emitter (without setting flags), if supported. If this is not
360 /// supported, 'true' should be returned. If DumpAsm is true, the generated
361 /// assembly is printed to cerr.
362 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
363 bool /*DumpAsm*/, MachineCodeEmitter &) {
367 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
368 /// on this target. User flag overrides.
369 virtual bool getEnableTailMergeDefault() const { return true; }
372 } // End llvm namespace