1 //===-- llvm/MC/MCTargetAsmParser.h - Target Assembly Parser ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef LLVM_MC_MCTARGETASMPARSER_H
11 #define LLVM_MC_MCTARGETASMPARSER_H
13 #include "llvm/MC/MCExpr.h"
14 #include "llvm/MC/MCParser/MCAsmParserExtension.h"
15 #include "llvm/MC/MCTargetOptions.h"
21 class MCParsedAsmOperand;
23 class MCSubtargetInfo;
26 template <typename T> class SmallVectorImpl;
28 typedef SmallVectorImpl<std::unique_ptr<MCParsedAsmOperand>> OperandVector;
31 AOK_Delete = 0, // Rewrite should be ignored.
32 AOK_Align, // Rewrite align as .align.
33 AOK_DotOperator, // Rewrite a dot operator expression as an immediate.
34 // E.g., [eax].foo.bar -> [eax].8
35 AOK_Emit, // Rewrite _emit as .byte.
36 AOK_Imm, // Rewrite as $$N.
37 AOK_ImmPrefix, // Add $$ before a parsed Imm.
38 AOK_Input, // Rewrite in terms of $N.
39 AOK_Output, // Rewrite in terms of $N.
40 AOK_SizeDirective, // Add a sizing directive (e.g., dword ptr).
41 AOK_Label, // Rewrite local labels.
42 AOK_Skip // Skip emission (e.g., offset/type operators).
45 const char AsmRewritePrecedence [] = {
54 5, // AOK_SizeDirective
66 AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0)
67 : Kind(kind), Loc(loc), Len(len), Val(val) {}
68 AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len, StringRef label)
69 : Kind(kind), Loc(loc), Len(len), Val(0), Label(label) {}
72 struct ParseInstructionInfo {
74 SmallVectorImpl<AsmRewrite> *AsmRewrites;
76 ParseInstructionInfo() : AsmRewrites(nullptr) {}
77 ParseInstructionInfo(SmallVectorImpl<AsmRewrite> *rewrites)
78 : AsmRewrites(rewrites) {}
81 /// MCTargetAsmParser - Generic interface to target specific assembly parsers.
82 class MCTargetAsmParser : public MCAsmParserExtension {
89 FIRST_TARGET_MATCH_RESULT_TY
93 MCTargetAsmParser(const MCTargetAsmParser &) = delete;
94 void operator=(const MCTargetAsmParser &) = delete;
95 protected: // Can only create subclasses.
96 MCTargetAsmParser(MCTargetOptions const &, MCSubtargetInfo &STI);
98 /// AvailableFeatures - The current set of available features.
99 uint64_t AvailableFeatures;
101 /// ParsingInlineAsm - Are we parsing ms-style inline assembly?
102 bool ParsingInlineAsm;
104 /// SemaCallback - The Sema callback implementation. Must be set when parsing
105 /// ms-style inline assembly.
106 MCAsmParserSemaCallback *SemaCallback;
108 /// Set of options which affects instrumentation of inline assembly.
109 MCTargetOptions MCOptions;
112 MCSubtargetInfo &STI;
115 ~MCTargetAsmParser() override;
117 const MCSubtargetInfo &getSTI() const;
119 uint64_t getAvailableFeatures() const { return AvailableFeatures; }
120 void setAvailableFeatures(uint64_t Value) { AvailableFeatures = Value; }
122 bool isParsingInlineAsm () { return ParsingInlineAsm; }
123 void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; }
125 MCTargetOptions getTargetOptions() const { return MCOptions; }
127 void setSemaCallback(MCAsmParserSemaCallback *Callback) {
128 SemaCallback = Callback;
131 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
134 /// Sets frame register corresponding to the current MachineFunction.
135 virtual void SetFrameRegister(unsigned RegNo) {}
137 /// ParseInstruction - Parse one assembly instruction.
139 /// The parser is positioned following the instruction name. The target
140 /// specific instruction parser should parse the entire instruction and
141 /// construct the appropriate MCInst, or emit an error. On success, the entire
142 /// line should be parsed up to and including the end-of-statement token. On
143 /// failure, the parser is not required to read to the end of the line.
145 /// \param Name - The instruction name.
146 /// \param NameLoc - The source location of the name.
147 /// \param Operands [out] - The list of parsed operands, this returns
148 /// ownership of them to the caller.
149 /// \return True on failure.
150 virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
151 SMLoc NameLoc, OperandVector &Operands) = 0;
152 virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
153 AsmToken Token, OperandVector &Operands) {
154 return ParseInstruction(Info, Name, Token.getLoc(), Operands);
157 /// ParseDirective - Parse a target specific assembler directive
159 /// The parser is positioned following the directive name. The target
160 /// specific directive parser should parse the entire directive doing or
161 /// recording any target specific work, or return true and do nothing if the
162 /// directive is not target specific. If the directive is specific for
163 /// the target, the entire line is parsed up to and including the
164 /// end-of-statement token and false is returned.
166 /// \param DirectiveID - the identifier token of the directive.
167 virtual bool ParseDirective(AsmToken DirectiveID) = 0;
169 /// mnemonicIsValid - This returns true if this is a valid mnemonic and false
171 virtual bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) = 0;
173 /// MatchAndEmitInstruction - Recognize a series of operands of a parsed
174 /// instruction as an actual MCInst and emit it to the specified MCStreamer.
175 /// This returns false on success and returns true on failure to match.
177 /// On failure, the target parser is responsible for emitting a diagnostic
178 /// explaining the match failure.
179 virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
180 OperandVector &Operands, MCStreamer &Out,
182 bool MatchingInlineAsm) = 0;
184 /// Allows targets to let registers opt out of clobber lists.
185 virtual bool OmitRegisterFromClobberLists(unsigned RegNo) { return false; }
187 /// Allow a target to add special case operand matching for things that
188 /// tblgen doesn't/can't handle effectively. For example, literal
189 /// immediates on ARM. TableGen expects a token operand, but the parser
190 /// will recognize them as immediates.
191 virtual unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
193 return Match_InvalidOperand;
196 /// checkTargetMatchPredicate - Validate the instruction match against
197 /// any complex target predicates not expressible via match classes.
198 virtual unsigned checkTargetMatchPredicate(MCInst &Inst) {
199 return Match_Success;
202 virtual void convertToMapAndConstraints(unsigned Kind,
203 const OperandVector &Operands) = 0;
205 // Return whether this parser uses assignment statements with equals tokens
206 virtual bool equalIsAsmAssignment() { return true; };
207 // Return whether this start of statement identifier is a label
208 virtual bool isLabel(AsmToken &Token) { return true; };
210 virtual const MCExpr *applyModifierToExpr(const MCExpr *E,
211 MCSymbolRefExpr::VariantKind,
216 virtual void onLabelParsed(MCSymbol *Symbol) { }
219 } // End llvm namespace