include/llvm/IntrinsicsX86.td

   1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by Chris Lattner and is distributed under the
   6 // University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the X86-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14
  15 //===----------------------------------------------------------------------===//
  16 // SSE1
  17
  18 // Arithmetic ops
  19 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  20   def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
  21               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  22                          llvm_v4f32_ty], [IntrNoMem]>;
  23   def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
  24               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  25                          llvm_v4f32_ty], [IntrNoMem]>;
  26   def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
  27               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  28                          llvm_v4f32_ty], [IntrNoMem]>;
  29   def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
  30               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  31                          llvm_v4f32_ty], [IntrNoMem]>;
  32   def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
  33               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  34                         [IntrNoMem]>;
  35   def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
  36               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  37                         [IntrNoMem]>;
  38   def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
  39               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  40                         [IntrNoMem]>;
  41   def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
  42               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  43                         [IntrNoMem]>;
  44   def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
  45               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  46                         [IntrNoMem]>;
  47   def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
  48               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  49                         [IntrNoMem]>;
  50   def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
  51               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  52                          llvm_v4f32_ty], [IntrNoMem]>;
  53   def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
  54               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  55                          llvm_v4f32_ty], [IntrNoMem]>;
  56   def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
  57               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  58                          llvm_v4f32_ty], [IntrNoMem]>;
  59   def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
  60               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  61                          llvm_v4f32_ty], [IntrNoMem]>;
  62 }
  63
  64 // Comparison ops
  65 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  66   def int_x86_sse_cmp_ss :
  67               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  68                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
  69   def int_x86_sse_cmp_ps :
  70               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  71                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
  72   def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
  73               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  74                          llvm_v4f32_ty], [IntrNoMem]>;
  75   def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
  76               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  77                          llvm_v4f32_ty], [IntrNoMem]>;
  78   def int_x86_sse_comile_ss : GCCBuiltin<"__builtin_ia32_comile">,
  79               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  80                          llvm_v4f32_ty], [IntrNoMem]>;
  81   def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
  82               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  83                          llvm_v4f32_ty], [IntrNoMem]>;
  84   def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
  85               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  86                          llvm_v4f32_ty], [IntrNoMem]>;
  87   def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
  88               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  89                          llvm_v4f32_ty], [IntrNoMem]>;
  90   def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
  91               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  92                          llvm_v4f32_ty], [IntrNoMem]>;
  93   def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
  94               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  95                          llvm_v4f32_ty], [IntrNoMem]>;
  96   def int_x86_sse_ucomile_ss : GCCBuiltin<"__builtin_ia32_ucomile">,
  97               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  98                          llvm_v4f32_ty], [IntrNoMem]>;
  99   def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
 100               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 101                          llvm_v4f32_ty], [IntrNoMem]>;
 102   def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
 103               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 104                          llvm_v4f32_ty], [IntrNoMem]>;
 105   def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
 106               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 107                          llvm_v4f32_ty], [IntrNoMem]>;
 108 }
 109
 110
 111 // Conversion ops
 112 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 113   def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
 114               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 115   def int_x86_sse_cvtss2si64 : GCCBuiltin<"__builtin_ia32_cvtss2si64">,
 116               Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 117   def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
 118               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 119   def int_x86_sse_cvttss2si64 : GCCBuiltin<"__builtin_ia32_cvttss2si64">,
 120               Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 121   def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
 122               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 123                          llvm_i32_ty], [IntrNoMem]>;
 124   def int_x86_sse_cvtsi642ss : GCCBuiltin<"__builtin_ia32_cvtsi642ss">,
 125               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 126                          llvm_i64_ty], [IntrNoMem]>;
 127 }
 128
 129 // SIMD load ops
 130 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 131   def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
 132               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
 133 }
 134
 135 // SIMD store ops
 136 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 137   def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
 138               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 139                          llvm_v4f32_ty], [IntrWriteMem]>;
 140 }
 141
 142 // Cacheability support ops
 143 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 144   def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">,
 145               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 146                          llvm_v4f32_ty], [IntrWriteMem]>;
 147   def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
 148               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 149 }
 150
 151 // Control register.
 152 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 153   def int_x86_sse_stmxcsr :
 154               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 155   def int_x86_sse_ldmxcsr :
 156               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 157 }
 158
 159 // Misc.
 160 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 161   def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
 162               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 163 }
 164
 165 //===----------------------------------------------------------------------===//
 166 // SSE2
 167
 168 // FP arithmetic ops
 169 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 170   def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
 171               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 172                          llvm_v2f64_ty], [IntrNoMem]>;
 173   def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">,
 174               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 175                          llvm_v2f64_ty], [IntrNoMem]>;
 176   def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">,
 177               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 178                          llvm_v2f64_ty], [IntrNoMem]>;
 179   def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">,
 180               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 181                          llvm_v2f64_ty], [IntrNoMem]>;
 182   def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">,
 183               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 184                         [IntrNoMem]>;
 185   def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">,
 186               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 187                         [IntrNoMem]>;
 188   def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">,
 189               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 190                          llvm_v2f64_ty], [IntrNoMem]>;
 191   def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">,
 192               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 193                          llvm_v2f64_ty], [IntrNoMem]>;
 194   def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">,
 195               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 196                          llvm_v2f64_ty], [IntrNoMem]>;
 197   def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">,
 198               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 199                          llvm_v2f64_ty], [IntrNoMem]>;
 200 }
 201
 202 // FP comparison ops
 203 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 204   def int_x86_sse2_cmp_sd :
 205               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 206                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
 207   def int_x86_sse2_cmp_pd :
 208               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 209                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
 210   def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">,
 211               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 212                          llvm_v2f64_ty], [IntrNoMem]>;
 213   def int_x86_sse2_comilt_sd : GCCBuiltin<"__builtin_ia32_comisdlt">,
 214               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 215                          llvm_v2f64_ty], [IntrNoMem]>;
 216   def int_x86_sse2_comile_sd : GCCBuiltin<"__builtin_ia32_comisdle">,
 217               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 218                          llvm_v2f64_ty], [IntrNoMem]>;
 219   def int_x86_sse2_comigt_sd : GCCBuiltin<"__builtin_ia32_comisdgt">,
 220               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 221                          llvm_v2f64_ty], [IntrNoMem]>;
 222   def int_x86_sse2_comige_sd : GCCBuiltin<"__builtin_ia32_comisdge">,
 223               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 224                          llvm_v2f64_ty], [IntrNoMem]>;
 225   def int_x86_sse2_comineq_sd : GCCBuiltin<"__builtin_ia32_comisdneq">,
 226               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 227                          llvm_v2f64_ty], [IntrNoMem]>;
 228   def int_x86_sse2_ucomieq_sd : GCCBuiltin<"__builtin_ia32_ucomisdeq">,
 229               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 230                          llvm_v2f64_ty], [IntrNoMem]>;
 231   def int_x86_sse2_ucomilt_sd : GCCBuiltin<"__builtin_ia32_ucomisdlt">,
 232               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 233                          llvm_v2f64_ty], [IntrNoMem]>;
 234   def int_x86_sse2_ucomile_sd : GCCBuiltin<"__builtin_ia32_ucomisdle">,
 235               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 236                          llvm_v2f64_ty], [IntrNoMem]>;
 237   def int_x86_sse2_ucomigt_sd : GCCBuiltin<"__builtin_ia32_ucomisdgt">,
 238               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 239                          llvm_v2f64_ty], [IntrNoMem]>;
 240   def int_x86_sse2_ucomige_sd : GCCBuiltin<"__builtin_ia32_ucomisdge">,
 241               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 242                          llvm_v2f64_ty], [IntrNoMem]>;
 243   def int_x86_sse2_ucomineq_sd : GCCBuiltin<"__builtin_ia32_ucomisdneq">,
 244               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 245                          llvm_v2f64_ty], [IntrNoMem]>;
 246 }
 247
 248 // Integer arithmetic ops.
 249 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 250   def int_x86_sse2_padds_b : GCCBuiltin<"__builtin_ia32_paddsb128">,
 251               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 252                          llvm_v16i8_ty], [IntrNoMem]>;
 253   def int_x86_sse2_padds_w : GCCBuiltin<"__builtin_ia32_paddsw128">,
 254               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 255                          llvm_v8i16_ty], [IntrNoMem]>;
 256   def int_x86_sse2_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb128">,
 257               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 258                          llvm_v16i8_ty], [IntrNoMem]>;
 259   def int_x86_sse2_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw128">,
 260               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 261                          llvm_v8i16_ty], [IntrNoMem]>;
 262   def int_x86_sse2_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb128">,
 263               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 264                          llvm_v16i8_ty], [IntrNoMem]>;
 265   def int_x86_sse2_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw128">,
 266               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 267                          llvm_v8i16_ty], [IntrNoMem]>;
 268   def int_x86_sse2_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb128">,
 269               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 270                          llvm_v16i8_ty], [IntrNoMem]>;
 271   def int_x86_sse2_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw128">,
 272               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 273                          llvm_v8i16_ty], [IntrNoMem]>;
 274   def int_x86_sse2_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw128">,
 275               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 276                          llvm_v8i16_ty], [IntrNoMem]>;
 277   def int_x86_sse2_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw128">,
 278               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 279                          llvm_v8i16_ty], [IntrNoMem]>;
 280   def int_x86_sse2_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq128">,
 281               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty,
 282                          llvm_v4i32_ty], [IntrNoMem]>;
 283   def int_x86_sse2_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd128">,
 284               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty,
 285                          llvm_v8i16_ty], [IntrNoMem]>;
 286   def int_x86_sse2_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb128">,
 287               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 288                          llvm_v16i8_ty], [IntrNoMem]>;
 289   def int_x86_sse2_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw128">,
 290               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 291                          llvm_v8i16_ty], [IntrNoMem]>;
 292   def int_x86_sse2_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub128">,
 293               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 294                          llvm_v16i8_ty], [IntrNoMem]>;
 295   def int_x86_sse2_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw128">,
 296               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 297                          llvm_v8i16_ty], [IntrNoMem]>;
 298   def int_x86_sse2_pminu_b : GCCBuiltin<"__builtin_ia32_pminub128">,
 299               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 300                          llvm_v16i8_ty], [IntrNoMem]>;
 301   def int_x86_sse2_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw128">,
 302               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 303                          llvm_v8i16_ty], [IntrNoMem]>;
 304   def int_x86_sse2_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw128">,
 305               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty,
 306                          llvm_v16i8_ty], [IntrNoMem]>;
 307 }
 308
 309 // Integer shift ops.
 310 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 311   def int_x86_sse2_psll_w :
 312               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 313                          llvm_v4i32_ty], [IntrNoMem]>;
 314   def int_x86_sse2_psll_d :
 315               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 316                          llvm_v4i32_ty], [IntrNoMem]>;
 317   def int_x86_sse2_psll_q :
 318               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 319                          llvm_v4i32_ty], [IntrNoMem]>;
 320   def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
 321               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 322                          llvm_i32_ty], [IntrNoMem]>;
 323   def int_x86_sse2_psrl_w :
 324               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 325                          llvm_v4i32_ty], [IntrNoMem]>;
 326   def int_x86_sse2_psrl_d :
 327               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 328                          llvm_v4i32_ty], [IntrNoMem]>;
 329   def int_x86_sse2_psrl_q :
 330               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 331                          llvm_v4i32_ty], [IntrNoMem]>;
 332   def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
 333               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 334                          llvm_i32_ty], [IntrNoMem]>;
 335   def int_x86_sse2_psra_w :
 336               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 337                          llvm_v4i32_ty], [IntrNoMem]>;
 338   def int_x86_sse2_psra_d :
 339               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 340                          llvm_v4i32_ty], [IntrNoMem]>;
 341 }
 342
 343 // Integer comparison ops
 344 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 345   def int_x86_sse2_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb128">,
 346               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 347                          llvm_v16i8_ty], [IntrNoMem]>;
 348   def int_x86_sse2_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw128">,
 349               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 350                          llvm_v8i16_ty], [IntrNoMem]>;
 351   def int_x86_sse2_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd128">,
 352               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 353                          llvm_v4i32_ty], [IntrNoMem]>;
 354   def int_x86_sse2_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb128">,
 355               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 356                          llvm_v16i8_ty], [IntrNoMem]>;
 357   def int_x86_sse2_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw128">,
 358               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 359                          llvm_v8i16_ty], [IntrNoMem]>;
 360   def int_x86_sse2_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd128">,
 361               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 362                          llvm_v4i32_ty], [IntrNoMem]>;
 363 }
 364
 365 // Conversion ops
 366 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 367   def int_x86_sse2_cvtdq2pd : GCCBuiltin<"__builtin_ia32_cvtdq2pd">,
 368               Intrinsic<[llvm_v2f64_ty, llvm_v4i32_ty], [IntrNoMem]>;
 369   def int_x86_sse2_cvtdq2ps : GCCBuiltin<"__builtin_ia32_cvtdq2ps">,
 370               Intrinsic<[llvm_v4f32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 371   def int_x86_sse2_cvtpd2dq : GCCBuiltin<"__builtin_ia32_cvtpd2dq">,
 372               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 373   def int_x86_sse2_cvttpd2dq : GCCBuiltin<"__builtin_ia32_cvttpd2dq">,
 374               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 375   def int_x86_sse2_cvtpd2ps : GCCBuiltin<"__builtin_ia32_cvtpd2ps">,
 376               Intrinsic<[llvm_v4f32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 377   def int_x86_sse2_cvtps2dq : GCCBuiltin<"__builtin_ia32_cvtps2dq">,
 378               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 379   def int_x86_sse2_cvttps2dq : GCCBuiltin<"__builtin_ia32_cvttps2dq">,
 380               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 381   def int_x86_sse2_cvtps2pd : GCCBuiltin<"__builtin_ia32_cvtps2pd">,
 382               Intrinsic<[llvm_v2f64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 383   def int_x86_sse2_cvtsd2si : GCCBuiltin<"__builtin_ia32_cvtsd2si">,
 384               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 385   def int_x86_sse2_cvtsd2si64 : GCCBuiltin<"__builtin_ia32_cvtsd2si64">,
 386               Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
 387   def int_x86_sse2_cvttsd2si : GCCBuiltin<"__builtin_ia32_cvttsd2si">,
 388               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 389   def int_x86_sse2_cvttsd2si64 : GCCBuiltin<"__builtin_ia32_cvttsd2si64">,
 390               Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
 391   def int_x86_sse2_cvtsi2sd : GCCBuiltin<"__builtin_ia32_cvtsi2sd">,
 392               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 393                          llvm_i32_ty], [IntrNoMem]>;
 394   def int_x86_sse2_cvtsi642sd : GCCBuiltin<"__builtin_ia32_cvtsi642sd">,
 395               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 396                          llvm_i64_ty], [IntrNoMem]>;
 397   def int_x86_sse2_cvtsd2ss : GCCBuiltin<"__builtin_ia32_cvtsd2ss">,
 398               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 399                          llvm_v2f64_ty], [IntrNoMem]>;
 400   def int_x86_sse2_cvtss2sd : GCCBuiltin<"__builtin_ia32_cvtss2sd">,
 401               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 402                          llvm_v4f32_ty], [IntrNoMem]>;
 403 }
 404
 405 // SIMD load ops
 406 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 407   def int_x86_sse2_loadu_pd : GCCBuiltin<"__builtin_ia32_loadupd">,
 408               Intrinsic<[llvm_v2f64_ty, llvm_ptr_ty], [IntrReadMem]>;
 409   def int_x86_sse2_loadu_dq : GCCBuiltin<"__builtin_ia32_loaddqu">,
 410               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 411 }
 412
 413 // SIMD store ops
 414 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 415   def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">,
 416               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 417                          llvm_v2f64_ty], [IntrWriteMem]>;
 418   def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">,
 419               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 420                          llvm_v16i8_ty], [IntrWriteMem]>;
 421   def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">,
 422               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 423                          llvm_v4i32_ty], [IntrWriteMem]>;
 424 }
 425
 426 // Cacheability support ops
 427 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 428   def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">,
 429               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 430                          llvm_v2i64_ty], [IntrWriteMem]>;
 431   def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">,
 432               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 433                          llvm_v2f64_ty], [IntrWriteMem]>;
 434   def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">,
 435               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 436                          llvm_i32_ty], [IntrWriteMem]>;
 437 }
 438
 439 // Misc.
 440 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 441   def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
 442               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 443                          llvm_v8i16_ty], [IntrNoMem]>;
 444   def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
 445               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 446                          llvm_v4i32_ty], [IntrNoMem]>;
 447   def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
 448               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 449                          llvm_v8i16_ty], [IntrNoMem]>;
 450   def int_x86_sse2_movl_dq : GCCBuiltin<"__builtin_ia32_movqv4si">,
 451               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 452   def int_x86_sse2_movmsk_pd : GCCBuiltin<"__builtin_ia32_movmskpd">,
 453               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 454   def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
 455               Intrinsic<[llvm_i32_ty, llvm_v16i8_ty], [IntrNoMem]>;
 456   def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">,
 457               Intrinsic<[llvm_void_ty, llvm_v16i8_ty,
 458                          llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>;
 459   def int_x86_sse2_clflush : GCCBuiltin<"__builtin_ia32_clflush">,
 460               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 461   def int_x86_sse2_lfence : GCCBuiltin<"__builtin_ia32_lfence">,
 462               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 463   def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">,
 464               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 465 }
 466
 467 // Shuffles.
 468 // FIXME: Temporary workarounds since 2-wide shuffle is broken.
 469 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 470   def int_x86_sse2_movs_d : GCCBuiltin<"__builtin_ia32_movsd">,
 471               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 472                          llvm_v2f64_ty], [IntrNoMem]>;
 473   def int_x86_sse2_loadh_pd : GCCBuiltin<"__builtin_ia32_loadhpd">,
 474               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 475                          llvm_ptr_ty], [IntrReadMem]>;
 476   def int_x86_sse2_loadl_pd : GCCBuiltin<"__builtin_ia32_loadlpd">,
 477               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 478                          llvm_ptr_ty], [IntrReadMem]>;
 479   def int_x86_sse2_shuf_pd : GCCBuiltin<"__builtin_ia32_shufpd">,
 480               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 481                          llvm_v2f64_ty, llvm_i32_ty], [IntrNoMem]>;
 482   def int_x86_sse2_unpckh_pd : GCCBuiltin<"__builtin_ia32_unpckhpd">,
 483               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 484                          llvm_v2f64_ty], [IntrNoMem]>;
 485   def int_x86_sse2_unpckl_pd : GCCBuiltin<"__builtin_ia32_unpcklpd">,
 486               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 487                          llvm_v2f64_ty], [IntrNoMem]>;
 488   def int_x86_sse2_punpckh_qdq : GCCBuiltin<"__builtin_ia32_punpckhqdq128">,
 489               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 490                          llvm_v2i64_ty], [IntrNoMem]>;
 491   def int_x86_sse2_punpckl_qdq : GCCBuiltin<"__builtin_ia32_punpcklqdq128">,
 492               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 493                          llvm_v2i64_ty], [IntrNoMem]>;
 494 }
 495
 496 //===----------------------------------------------------------------------===//
 497 // SSE3
 498
 499 // Addition / subtraction ops.
 500 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 501   def int_x86_sse3_addsub_ps : GCCBuiltin<"__builtin_ia32_addsubps">,
 502               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 503                          llvm_v4f32_ty], [IntrNoMem]>;
 504   def int_x86_sse3_addsub_pd : GCCBuiltin<"__builtin_ia32_addsubpd">,
 505               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 506                          llvm_v2f64_ty], [IntrNoMem]>;
 507 }
 508
 509 // Horizontal ops.
 510 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 511   def int_x86_sse3_hadd_ps : GCCBuiltin<"__builtin_ia32_haddps">,
 512               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 513                          llvm_v4f32_ty], [IntrNoMem]>;
 514   def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
 515               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 516                          llvm_v2f64_ty], [IntrNoMem]>;
 517   def int_x86_sse3_hsub_ps : GCCBuiltin<"__builtin_ia32_hsubps">,
 518               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 519                          llvm_v4f32_ty], [IntrNoMem]>;
 520   def int_x86_sse3_hsub_pd : GCCBuiltin<"__builtin_ia32_hsubpd">,
 521               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 522                          llvm_v2f64_ty], [IntrNoMem]>;
 523 }
 524
 525 // Specialized unaligned load.
 526 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 527   def int_x86_sse3_ldu_dq : GCCBuiltin<"__builtin_ia32_lddqu">,
 528               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 529 }
 530
 531 // Thread synchronization ops.
 532 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 533   def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">,
 534               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 535                          llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>;
 536   def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">,
 537               Intrinsic<[llvm_void_ty, llvm_i32_ty,
 538                          llvm_i32_ty], [IntrWriteMem]>;
 539 }
 540
 541 //===----------------------------------------------------------------------===//
 542 // SSSE3
 543
 544 // Horizontal arithmetic ops
 545 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 546   def int_x86_ssse3_phadd_w         : GCCBuiltin<"__builtin_ia32_phaddw">,
 547               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 548                          llvm_v4i16_ty], [IntrNoMem]>;
 549   def int_x86_ssse3_phadd_w_128     : GCCBuiltin<"__builtin_ia32_phaddw128">,
 550               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 551                          llvm_v8i16_ty], [IntrNoMem]>;
 552
 553   def int_x86_ssse3_phadd_d         : GCCBuiltin<"__builtin_ia32_phaddd">,
 554               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 555                          llvm_v2i32_ty], [IntrNoMem]>;
 556   def int_x86_ssse3_phadd_d_128     : GCCBuiltin<"__builtin_ia32_phaddd128">,
 557               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 558                          llvm_v4i32_ty], [IntrNoMem]>;
 559
 560   def int_x86_ssse3_phadd_sw        : GCCBuiltin<"__builtin_ia32_phaddsw">,
 561               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 562                          llvm_v4i16_ty], [IntrNoMem]>;
 563   def int_x86_ssse3_phadd_sw_128    : GCCBuiltin<"__builtin_ia32_phaddsw128">,
 564               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 565                          llvm_v4i32_ty], [IntrNoMem]>;
 566
 567   def int_x86_ssse3_phsub_w         : GCCBuiltin<"__builtin_ia32_phsubw">,
 568               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 569                          llvm_v4i16_ty], [IntrNoMem]>;
 570   def int_x86_ssse3_phsub_w_128     : GCCBuiltin<"__builtin_ia32_phsubw128">,
 571               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 572                          llvm_v8i16_ty], [IntrNoMem]>;
 573
 574   def int_x86_ssse3_phsub_d         : GCCBuiltin<"__builtin_ia32_phsubd">,
 575               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 576                          llvm_v2i32_ty], [IntrNoMem]>;
 577   def int_x86_ssse3_phsub_d_128     : GCCBuiltin<"__builtin_ia32_phsubd128">,
 578               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 579                          llvm_v4i32_ty], [IntrNoMem]>;
 580
 581   def int_x86_ssse3_phsub_sw        : GCCBuiltin<"__builtin_ia32_phsubsw">,
 582               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 583                          llvm_v4i16_ty], [IntrNoMem]>;
 584   def int_x86_ssse3_phsub_sw_128    : GCCBuiltin<"__builtin_ia32_phsubsw128">,
 585               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 586                          llvm_v8i16_ty], [IntrNoMem]>;
 587
 588   def int_x86_ssse3_pmadd_ub_sw     : GCCBuiltin<"__builtin_ia32_pmaddubsw">,
 589               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 590                          llvm_v4i16_ty], [IntrNoMem]>;
 591   def int_x86_ssse3_pmadd_ub_sw_128 : GCCBuiltin<"__builtin_ia32_pmaddubsw128">,
 592               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 593                          llvm_v8i16_ty], [IntrNoMem]>;
 594
 595   def int_x86_ssse3_pmul_hr_sw      : GCCBuiltin<"__builtin_ia32_pmulhrsw">,
 596               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 597                          llvm_v4i16_ty], [IntrNoMem]>;
 598   def int_x86_ssse3_pmul_hr_sw_128  : GCCBuiltin<"__builtin_ia32_pmulhrsw128">,
 599               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 600                          llvm_v8i16_ty], [IntrNoMem]>;
 601 }
 602
 603 // Shuffle ops
 604 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 605   def int_x86_ssse3_pshuf_b         : GCCBuiltin<"__builtin_ia32_pshufb">,
 606               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 607                          llvm_v8i8_ty], [IntrNoMem]>;
 608   def int_x86_ssse3_pshuf_b_128     : GCCBuiltin<"__builtin_ia32_pshufb128">,
 609               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 610                          llvm_v16i8_ty], [IntrNoMem]>;
 611 }
 612
 613 // Sign ops
 614 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 615   def int_x86_ssse3_psign_b         : GCCBuiltin<"__builtin_ia32_psignb">,
 616               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 617                          llvm_v8i8_ty], [IntrNoMem]>;
 618   def int_x86_ssse3_psign_b_128     : GCCBuiltin<"__builtin_ia32_psignb128">,
 619               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 620                          llvm_v16i8_ty], [IntrNoMem]>;
 621
 622   def int_x86_ssse3_psign_w         : GCCBuiltin<"__builtin_ia32_psignw">,
 623               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 624                          llvm_v4i16_ty], [IntrNoMem]>;
 625   def int_x86_ssse3_psign_w_128     : GCCBuiltin<"__builtin_ia32_psignw128">,
 626               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 627                          llvm_v8i16_ty], [IntrNoMem]>;
 628
 629   def int_x86_ssse3_psign_d         : GCCBuiltin<"__builtin_ia32_psignd">,
 630               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 631                          llvm_v2i32_ty], [IntrNoMem]>;
 632   def int_x86_ssse3_psign_d_128     : GCCBuiltin<"__builtin_ia32_psignd128">,
 633               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 634                          llvm_v4i32_ty], [IntrNoMem]>;
 635 }
 636
 637 // Absolute value ops
 638 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 639   def int_x86_ssse3_pabs_b     : GCCBuiltin<"__builtin_ia32_pabsb">,
 640               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
 641   def int_x86_ssse3_pabs_b_128 : GCCBuiltin<"__builtin_ia32_pabsb128">,
 642               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
 643
 644   def int_x86_ssse3_pabs_w     : GCCBuiltin<"__builtin_ia32_pabsw">,
 645               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty], [IntrNoMem]>;
 646   def int_x86_ssse3_pabs_w_128 : GCCBuiltin<"__builtin_ia32_pabsw128">,
 647               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>;
 648
 649   def int_x86_ssse3_pabs_d     : GCCBuiltin<"__builtin_ia32_pabsd">,
 650               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty], [IntrNoMem]>;
 651   def int_x86_ssse3_pabs_d_128 : GCCBuiltin<"__builtin_ia32_pabsd128">,
 652               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 653 }
 654
 655 // Align ops
 656 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 657   def int_x86_ssse3_palign_r        : GCCBuiltin<"__builtin_ia32_palignr">,
 658               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
 659                          llvm_v1i64_ty, llvm_i16_ty], [IntrNoMem]>;
 660   def int_x86_ssse3_palign_r_128    : GCCBuiltin<"__builtin_ia32_palignr128">,
 661               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 662                          llvm_v2i64_ty, llvm_i32_ty], [IntrNoMem]>;
 663 }
 664
 665 //===----------------------------------------------------------------------===//
 666 // MMX
 667
 668 // Empty MMX state op.
 669 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 670   def int_x86_mmx_emms  : GCCBuiltin<"__builtin_ia32_emms">,
 671               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 672   def int_x86_mmx_femms : GCCBuiltin<"__builtin_ia32_femms">,
 673               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 674 }
 675
 676 // Integer arithmetic ops.
 677 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 678   // Addition
 679   def int_x86_mmx_padds_b : GCCBuiltin<"__builtin_ia32_paddsb">,
 680               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 681                          llvm_v8i8_ty], [IntrNoMem]>;
 682   def int_x86_mmx_padds_w : GCCBuiltin<"__builtin_ia32_paddsw">,
 683               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 684                          llvm_v4i16_ty], [IntrNoMem]>;
 685
 686   def int_x86_mmx_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb">,
 687               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 688                          llvm_v8i8_ty], [IntrNoMem]>;
 689   def int_x86_mmx_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw">,
 690               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 691                          llvm_v4i16_ty], [IntrNoMem]>;
 692
 693   // Subtraction
 694   def int_x86_mmx_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb">,
 695               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 696                          llvm_v8i8_ty], [IntrNoMem]>;
 697   def int_x86_mmx_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw">,
 698               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 699                          llvm_v4i16_ty], [IntrNoMem]>;
 700
 701   def int_x86_mmx_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb">,
 702               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 703                          llvm_v8i8_ty], [IntrNoMem]>;
 704   def int_x86_mmx_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw">,
 705               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 706                          llvm_v4i16_ty], [IntrNoMem]>;
 707
 708   // Multiplication
 709   def int_x86_mmx_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw">,
 710               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 711                          llvm_v4i16_ty], [IntrNoMem]>;
 712   def int_x86_mmx_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw">,
 713               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 714                          llvm_v4i16_ty], [IntrNoMem]>;
 715   def int_x86_mmx_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq">,
 716               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 717                          llvm_v2i32_ty], [IntrNoMem]>;
 718   def int_x86_mmx_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd">,
 719               Intrinsic<[llvm_v2i32_ty, llvm_v4i16_ty,
 720                          llvm_v4i16_ty], [IntrNoMem]>;
 721
 722   // Averages
 723   def int_x86_mmx_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb">,
 724               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 725                          llvm_v8i8_ty], [IntrNoMem]>;
 726   def int_x86_mmx_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw">,
 727               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 728                          llvm_v4i16_ty], [IntrNoMem]>;
 729
 730   // Maximum
 731   def int_x86_mmx_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub">,
 732               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 733                          llvm_v8i8_ty], [IntrNoMem]>;
 734   def int_x86_mmx_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw">,
 735               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 736                          llvm_v4i16_ty], [IntrNoMem]>;
 737
 738   // Minimum
 739   def int_x86_mmx_pminu_b : GCCBuiltin<"__builtin_ia32_pminub">,
 740               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 741                          llvm_v8i8_ty], [IntrNoMem]>;
 742   def int_x86_mmx_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw">,
 743               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 744                          llvm_v4i16_ty], [IntrNoMem]>;
 745
 746   // Packed sum of absolute differences
 747   def int_x86_mmx_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw">,
 748               Intrinsic<[llvm_v4i16_ty, llvm_v8i8_ty,
 749                          llvm_v8i8_ty], [IntrNoMem]>;
 750 }
 751
 752 // Integer shift ops.
 753 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 754   // Shift left logical
 755   def int_x86_mmx_psll_w : GCCBuiltin<"__builtin_ia32_psllw">,
 756               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 757                          llvm_v2i32_ty], [IntrNoMem]>;
 758   def int_x86_mmx_psll_d : GCCBuiltin<"__builtin_ia32_pslld">,
 759               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 760                          llvm_v2i32_ty], [IntrNoMem]>;
 761   def int_x86_mmx_psll_q : GCCBuiltin<"__builtin_ia32_psllq">,
 762               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 763                          llvm_v2i32_ty], [IntrNoMem]>;
 764
 765   def int_x86_mmx_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw">,
 766               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 767                          llvm_v2i32_ty], [IntrNoMem]>;
 768   def int_x86_mmx_psrl_d : GCCBuiltin<"__builtin_ia32_psrld">,
 769               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 770                          llvm_v2i32_ty], [IntrNoMem]>;
 771   def int_x86_mmx_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq">,
 772               Intrinsic<[llvm_v2i32_ty,   llvm_v2i32_ty,
 773                          llvm_v2i32_ty], [IntrNoMem]>;
 774
 775   def int_x86_mmx_psra_w : GCCBuiltin<"__builtin_ia32_psraw">,
 776               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 777                          llvm_v2i32_ty], [IntrNoMem]>;
 778   def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">,
 779               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 780                          llvm_v2i32_ty], [IntrNoMem]>;
 781 }
 782
 783 // Pack ops.
 784 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 785   def int_x86_mmx_packsswb : GCCBuiltin<"__builtin_ia32_packsswb">,
 786               Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
 787                          llvm_v4i16_ty], [IntrNoMem]>;
 788   def int_x86_mmx_packssdw : GCCBuiltin<"__builtin_ia32_packssdw">,
 789               Intrinsic<[llvm_v4i16_ty, llvm_v2i32_ty,
 790                          llvm_v2i32_ty], [IntrNoMem]>;
 791   def int_x86_mmx_packuswb : GCCBuiltin<"__builtin_ia32_packuswb">,
 792               Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
 793                          llvm_v4i16_ty], [IntrNoMem]>;
 794 }
 795
 796 // Integer comparison ops
 797 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 798   def int_x86_mmx_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb">,
 799               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 800                          llvm_v8i8_ty], [IntrNoMem]>;
 801   def int_x86_mmx_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw">,
 802               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 803                          llvm_v4i16_ty], [IntrNoMem]>;
 804   def int_x86_mmx_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd">,
 805               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 806                          llvm_v2i32_ty], [IntrNoMem]>;
 807
 808   def int_x86_mmx_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb">,
 809               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 810                          llvm_v8i8_ty], [IntrNoMem]>;
 811   def int_x86_mmx_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw">,
 812               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 813                          llvm_v4i16_ty], [IntrNoMem]>;
 814   def int_x86_mmx_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd">,
 815               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 816                          llvm_v2i32_ty], [IntrNoMem]>;
 817 }
 818
 819 // Misc.
 820 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 821   def int_x86_mmx_maskmovq : GCCBuiltin<"__builtin_ia32_maskmovq">,
 822               Intrinsic<[llvm_void_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_ptr_ty],
 823                         [IntrWriteMem]>;
 824
 825   def int_x86_mmx_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb">,
 826               Intrinsic<[llvm_i32_ty, llvm_v8i8_ty], [IntrNoMem]>;
 827
 828   def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">,
 829               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 830                          llvm_v1i64_ty], [IntrWriteMem]>;
 831 }