include/llvm/IntrinsicsX86.td

   1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by Chris Lattner and is distributed under the
   6 // University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the X86-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14
  15 //===----------------------------------------------------------------------===//
  16 // SSE1
  17
  18 // Arithmetic ops
  19 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  20   def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
  21               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  22                          llvm_v4f32_ty], [InstrNoMem]>;
  23   def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
  24               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  25                          llvm_v4f32_ty], [InstrNoMem]>;
  26   def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
  27               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  28                          llvm_v4f32_ty], [InstrNoMem]>;
  29   def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
  30               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  31                          llvm_v4f32_ty], [InstrNoMem]>;
  32   def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
  33               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  34                         [InstrNoMem]>;
  35   def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
  36               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  37                         [InstrNoMem]>;
  38   def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
  39               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  40                         [InstrNoMem]>;
  41   def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
  42               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  43                         [InstrNoMem]>;
  44   def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
  45               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  46                         [InstrNoMem]>;
  47   def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
  48               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  49                         [InstrNoMem]>;
  50   def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
  51               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  52                          llvm_v4f32_ty], [InstrNoMem]>;
  53   def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
  54               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  55                          llvm_v4f32_ty], [InstrNoMem]>;
  56   def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
  57               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  58                          llvm_v4f32_ty], [InstrNoMem]>;
  59   def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
  60               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  61                          llvm_v4f32_ty], [InstrNoMem]>;
  62 }
  63
  64 // Comparison ops
  65 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  66   def int_x86_sse_cmp_ss :
  67               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  68                          llvm_v4f32_ty, llvm_sbyte_ty], [InstrNoMem]>;
  69   def int_x86_sse_cmp_ps :
  70               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  71                          llvm_v4f32_ty, llvm_sbyte_ty], [InstrNoMem]>;
  72 }
  73
  74
  75 // Conversion ops
  76 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  77   def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
  78               Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
  79   def int_x86_sse_cvtps2pi : GCCBuiltin<"__builtin_ia32_cvtps2pi">,
  80               Intrinsic<[llvm_v2i32_ty, llvm_v4i32_ty], [InstrNoMem]>;
  81   def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
  82               Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
  83   def int_x86_sse_cvttps2pi : GCCBuiltin<"__builtin_ia32_cvttps2pi">,
  84               Intrinsic<[llvm_v2i32_ty, llvm_v4i32_ty], [InstrNoMem]>;
  85   def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
  86               Intrinsic<[llvm_v4f32_ty, llvm_int_ty], [InstrNoMem]>;
  87   def int_x86_sse_cvtpi2ps : GCCBuiltin<"__builtin_ia32_cvtpi2ps">,
  88               Intrinsic<[llvm_v4f32_ty, llvm_v2i32_ty], [InstrNoMem]>;
  89 }
  90
  91 // SIMD load ops
  92 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  93   def int_x86_sse_loadh_ps : GCCBuiltin<"__builtin_ia32_loadhps">,
  94               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
  95   def int_x86_sse_loadl_ps : GCCBuiltin<"__builtin_ia32_loadlps">,
  96               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
  97   def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
  98               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
  99 }
 100
 101 // SIMD store ops
 102 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 103   def int_x86_sse_storeh_ps : GCCBuiltin<"__builtin_ia32_storehps">,
 104               Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
 105   def int_x86_sse_storel_ps : GCCBuiltin<"__builtin_ia32_storelps">,
 106               Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
 107   def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
 108               Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
 109 }
 110
 111 // Cacheability support ops
 112 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 113   def int_x86_sse_prefetch : GCCBuiltin<"__builtin_ia32_prefetch">,
 114               Intrinsic<[llvm_ptr_ty, llvm_int_ty], [IntrWriteMem]>;
 115   def int_x86_sse_movntq : GCCBuiltin<"__builtin_ia32_movntq">,
 116               Intrinsic<[llvm_ptr_ty, llvm_v2i32_ty], [IntrWriteMem]>;
 117   def int_x86_sse_movntps : GCCBuiltin<"__builtin_ia32_movntps">,
 118               Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
 119   def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
 120               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 121 }
 122
 123 // Control register.
 124 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 125   def int_x86_sse_stmxcsr : GCCBuiltin<"__builtin_ia32_stmxcsr">,
 126               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 127   def int_x86_sse_ldmxcsr : GCCBuiltin<"__builtin_ia32_ldmxcsr">,
 128               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 129 }
 130
 131 // Misc.
 132 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 133   def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
 134               Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
 135 }
 136
 137 //===----------------------------------------------------------------------===//
 138 // SSE2
 139
 140 // Arithmetic ops
 141 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 142   def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
 143               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 144                          llvm_v2f64_ty], [InstrNoMem]>;
 145   def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">,
 146               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 147                          llvm_v2f64_ty], [InstrNoMem]>;
 148   def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">,
 149               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 150                          llvm_v2f64_ty], [InstrNoMem]>;
 151   def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">,
 152               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 153                          llvm_v2f64_ty], [InstrNoMem]>;
 154   def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">,
 155               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 156                         [InstrNoMem]>;
 157   def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">,
 158               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 159                         [InstrNoMem]>;
 160   def int_x86_sse2_rcp_sd : GCCBuiltin<"__builtin_ia32_rcpsd">,
 161               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 162                         [InstrNoMem]>;
 163   def int_x86_sse2_rcp_pd : GCCBuiltin<"__builtin_ia32_rcppd">,
 164               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 165                         [InstrNoMem]>;
 166   def int_x86_sse2_rsqrt_sd : GCCBuiltin<"__builtin_ia32_rsqrtsd">,
 167               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 168                         [InstrNoMem]>;
 169   def int_x86_sse2_rsqrt_pd : GCCBuiltin<"__builtin_ia32_rsqrtpd">,
 170               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 171                         [InstrNoMem]>;
 172   def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">,
 173               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 174                          llvm_v2f64_ty], [InstrNoMem]>;
 175   def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">,
 176               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 177                          llvm_v2f64_ty], [InstrNoMem]>;
 178   def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">,
 179               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 180                          llvm_v2f64_ty], [InstrNoMem]>;
 181   def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">,
 182               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 183                          llvm_v2f64_ty], [InstrNoMem]>;
 184 }
 185
 186 // Misc.
 187 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 188   def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
 189               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 190                          llvm_v8i16_ty], [InstrNoMem]>;
 191   def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
 192               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 193                          llvm_v4i32_ty], [InstrNoMem]>;
 194   def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
 195               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 196                          llvm_v8i16_ty], [InstrNoMem]>;
 197   def int_x86_sse2_movmskpd : GCCBuiltin<"__builtin_ia32_movmskpd">,
 198               Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [InstrNoMem]>;
 199   def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
 200               Intrinsic<[llvm_int_ty, llvm_v16i8_ty], [InstrNoMem]>;
 201 }