include/llvm/IntrinsicsX86.td

   1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by Chris Lattner and is distributed under the
   6 // University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the X86-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14
  15 //===----------------------------------------------------------------------===//
  16 // SSE1
  17
  18 // Arithmetic ops
  19 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  20   def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
  21               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  22                          llvm_v4f32_ty], [IntrNoMem]>;
  23   def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
  24               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  25                          llvm_v4f32_ty], [IntrNoMem]>;
  26   def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
  27               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  28                          llvm_v4f32_ty], [IntrNoMem]>;
  29   def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
  30               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  31                          llvm_v4f32_ty], [IntrNoMem]>;
  32   def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
  33               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  34                         [IntrNoMem]>;
  35   def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
  36               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  37                         [IntrNoMem]>;
  38   def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
  39               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  40                         [IntrNoMem]>;
  41   def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
  42               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  43                         [IntrNoMem]>;
  44   def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
  45               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  46                         [IntrNoMem]>;
  47   def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
  48               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  49                         [IntrNoMem]>;
  50   def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
  51               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  52                          llvm_v4f32_ty], [IntrNoMem]>;
  53   def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
  54               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  55                          llvm_v4f32_ty], [IntrNoMem]>;
  56   def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
  57               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  58                          llvm_v4f32_ty], [IntrNoMem]>;
  59   def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
  60               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  61                          llvm_v4f32_ty], [IntrNoMem]>;
  62 }
  63
  64 // Comparison ops
  65 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  66   def int_x86_sse_cmp_ss :
  67               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  68                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
  69   def int_x86_sse_cmp_ps :
  70               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  71                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
  72   def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
  73               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  74                          llvm_v4f32_ty], [IntrNoMem]>;
  75   def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
  76               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  77                          llvm_v4f32_ty], [IntrNoMem]>;
  78   def int_x86_sse_comile_ss : GCCBuiltin<"__builtin_ia32_comile">,
  79               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  80                          llvm_v4f32_ty], [IntrNoMem]>;
  81   def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
  82               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  83                          llvm_v4f32_ty], [IntrNoMem]>;
  84   def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
  85               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  86                          llvm_v4f32_ty], [IntrNoMem]>;
  87   def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
  88               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  89                          llvm_v4f32_ty], [IntrNoMem]>;
  90   def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
  91               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  92                          llvm_v4f32_ty], [IntrNoMem]>;
  93   def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
  94               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  95                          llvm_v4f32_ty], [IntrNoMem]>;
  96   def int_x86_sse_ucomile_ss : GCCBuiltin<"__builtin_ia32_ucomile">,
  97               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  98                          llvm_v4f32_ty], [IntrNoMem]>;
  99   def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
 100               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 101                          llvm_v4f32_ty], [IntrNoMem]>;
 102   def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
 103               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 104                          llvm_v4f32_ty], [IntrNoMem]>;
 105   def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
 106               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 107                          llvm_v4f32_ty], [IntrNoMem]>;
 108 }
 109
 110
 111 // Conversion ops
 112 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 113   def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
 114               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 115   def int_x86_sse_cvtss2si64 : GCCBuiltin<"__builtin_ia32_cvtss2si64">,
 116               Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 117   def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
 118               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 119   def int_x86_sse_cvttss2si64 : GCCBuiltin<"__builtin_ia32_cvttss2si64">,
 120               Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 121   def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
 122               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 123                          llvm_i32_ty], [IntrNoMem]>;
 124   def int_x86_sse_cvtsi642ss : GCCBuiltin<"__builtin_ia32_cvtsi642ss">,
 125               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 126                          llvm_i64_ty], [IntrNoMem]>;
 127   def int_x86_sse_cvtps2pi : GCCBuiltin<"__builtin_ia32_cvtps2pi">,
 128               Intrinsic<[llvm_v2i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 129   def int_x86_sse_cvttps2pi: GCCBuiltin<"__builtin_ia32_cvttps2pi">,
 130               Intrinsic<[llvm_v2i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 131   def int_x86_sse_cvtpi2ps : GCCBuiltin<"__builtin_ia32_cvtpi2ps">,
 132               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 133                          llvm_v2i32_ty], [IntrNoMem]>;
 134 }
 135
 136 // SIMD load ops
 137 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 138   def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
 139               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
 140 }
 141
 142 // SIMD store ops
 143 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 144   def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
 145               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 146                          llvm_v4f32_ty], [IntrWriteMem]>;
 147 }
 148
 149 // Cacheability support ops
 150 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 151   def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">,
 152               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 153                          llvm_v4f32_ty], [IntrWriteMem]>;
 154   def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
 155               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 156 }
 157
 158 // Control register.
 159 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 160   def int_x86_sse_stmxcsr :
 161               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 162   def int_x86_sse_ldmxcsr :
 163               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 164 }
 165
 166 // Misc.
 167 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 168   def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
 169               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 170 }
 171
 172 //===----------------------------------------------------------------------===//
 173 // SSE2
 174
 175 // FP arithmetic ops
 176 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 177   def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
 178               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 179                          llvm_v2f64_ty], [IntrNoMem]>;
 180   def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">,
 181               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 182                          llvm_v2f64_ty], [IntrNoMem]>;
 183   def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">,
 184               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 185                          llvm_v2f64_ty], [IntrNoMem]>;
 186   def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">,
 187               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 188                          llvm_v2f64_ty], [IntrNoMem]>;
 189   def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">,
 190               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 191                         [IntrNoMem]>;
 192   def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">,
 193               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 194                         [IntrNoMem]>;
 195   def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">,
 196               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 197                          llvm_v2f64_ty], [IntrNoMem]>;
 198   def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">,
 199               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 200                          llvm_v2f64_ty], [IntrNoMem]>;
 201   def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">,
 202               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 203                          llvm_v2f64_ty], [IntrNoMem]>;
 204   def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">,
 205               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 206                          llvm_v2f64_ty], [IntrNoMem]>;
 207 }
 208
 209 // FP comparison ops
 210 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 211   def int_x86_sse2_cmp_sd :
 212               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 213                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
 214   def int_x86_sse2_cmp_pd :
 215               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 216                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
 217   def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">,
 218               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 219                          llvm_v2f64_ty], [IntrNoMem]>;
 220   def int_x86_sse2_comilt_sd : GCCBuiltin<"__builtin_ia32_comisdlt">,
 221               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 222                          llvm_v2f64_ty], [IntrNoMem]>;
 223   def int_x86_sse2_comile_sd : GCCBuiltin<"__builtin_ia32_comisdle">,
 224               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 225                          llvm_v2f64_ty], [IntrNoMem]>;
 226   def int_x86_sse2_comigt_sd : GCCBuiltin<"__builtin_ia32_comisdgt">,
 227               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 228                          llvm_v2f64_ty], [IntrNoMem]>;
 229   def int_x86_sse2_comige_sd : GCCBuiltin<"__builtin_ia32_comisdge">,
 230               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 231                          llvm_v2f64_ty], [IntrNoMem]>;
 232   def int_x86_sse2_comineq_sd : GCCBuiltin<"__builtin_ia32_comisdneq">,
 233               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 234                          llvm_v2f64_ty], [IntrNoMem]>;
 235   def int_x86_sse2_ucomieq_sd : GCCBuiltin<"__builtin_ia32_ucomisdeq">,
 236               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 237                          llvm_v2f64_ty], [IntrNoMem]>;
 238   def int_x86_sse2_ucomilt_sd : GCCBuiltin<"__builtin_ia32_ucomisdlt">,
 239               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 240                          llvm_v2f64_ty], [IntrNoMem]>;
 241   def int_x86_sse2_ucomile_sd : GCCBuiltin<"__builtin_ia32_ucomisdle">,
 242               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 243                          llvm_v2f64_ty], [IntrNoMem]>;
 244   def int_x86_sse2_ucomigt_sd : GCCBuiltin<"__builtin_ia32_ucomisdgt">,
 245               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 246                          llvm_v2f64_ty], [IntrNoMem]>;
 247   def int_x86_sse2_ucomige_sd : GCCBuiltin<"__builtin_ia32_ucomisdge">,
 248               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 249                          llvm_v2f64_ty], [IntrNoMem]>;
 250   def int_x86_sse2_ucomineq_sd : GCCBuiltin<"__builtin_ia32_ucomisdneq">,
 251               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 252                          llvm_v2f64_ty], [IntrNoMem]>;
 253 }
 254
 255 // Integer arithmetic ops.
 256 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 257   def int_x86_sse2_padds_b : GCCBuiltin<"__builtin_ia32_paddsb128">,
 258               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 259                          llvm_v16i8_ty], [IntrNoMem]>;
 260   def int_x86_sse2_padds_w : GCCBuiltin<"__builtin_ia32_paddsw128">,
 261               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 262                          llvm_v8i16_ty], [IntrNoMem]>;
 263   def int_x86_sse2_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb128">,
 264               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 265                          llvm_v16i8_ty], [IntrNoMem]>;
 266   def int_x86_sse2_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw128">,
 267               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 268                          llvm_v8i16_ty], [IntrNoMem]>;
 269   def int_x86_sse2_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb128">,
 270               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 271                          llvm_v16i8_ty], [IntrNoMem]>;
 272   def int_x86_sse2_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw128">,
 273               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 274                          llvm_v8i16_ty], [IntrNoMem]>;
 275   def int_x86_sse2_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb128">,
 276               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 277                          llvm_v16i8_ty], [IntrNoMem]>;
 278   def int_x86_sse2_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw128">,
 279               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 280                          llvm_v8i16_ty], [IntrNoMem]>;
 281   def int_x86_sse2_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw128">,
 282               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 283                          llvm_v8i16_ty], [IntrNoMem]>;
 284   def int_x86_sse2_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw128">,
 285               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 286                          llvm_v8i16_ty], [IntrNoMem]>;
 287   def int_x86_sse2_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq128">,
 288               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty,
 289                          llvm_v4i32_ty], [IntrNoMem]>;
 290   def int_x86_sse2_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd128">,
 291               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty,
 292                          llvm_v8i16_ty], [IntrNoMem]>;
 293   def int_x86_sse2_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb128">,
 294               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 295                          llvm_v16i8_ty], [IntrNoMem]>;
 296   def int_x86_sse2_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw128">,
 297               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 298                          llvm_v8i16_ty], [IntrNoMem]>;
 299   def int_x86_sse2_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub128">,
 300               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 301                          llvm_v16i8_ty], [IntrNoMem]>;
 302   def int_x86_sse2_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw128">,
 303               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 304                          llvm_v8i16_ty], [IntrNoMem]>;
 305   def int_x86_sse2_pminu_b : GCCBuiltin<"__builtin_ia32_pminub128">,
 306               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 307                          llvm_v16i8_ty], [IntrNoMem]>;
 308   def int_x86_sse2_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw128">,
 309               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 310                          llvm_v8i16_ty], [IntrNoMem]>;
 311   def int_x86_sse2_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw128">,
 312               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty,
 313                          llvm_v16i8_ty], [IntrNoMem]>;
 314 }
 315
 316 // Integer shift ops.
 317 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 318   def int_x86_sse2_psll_w :
 319               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 320                          llvm_v4i32_ty], [IntrNoMem]>;
 321   def int_x86_sse2_psll_d :
 322               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 323                          llvm_v4i32_ty], [IntrNoMem]>;
 324   def int_x86_sse2_psll_q :
 325               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 326                          llvm_v4i32_ty], [IntrNoMem]>;
 327   def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
 328               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 329                          llvm_i32_ty], [IntrNoMem]>;
 330   def int_x86_sse2_psrl_w :
 331               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 332                          llvm_v4i32_ty], [IntrNoMem]>;
 333   def int_x86_sse2_psrl_d :
 334               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 335                          llvm_v4i32_ty], [IntrNoMem]>;
 336   def int_x86_sse2_psrl_q :
 337               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 338                          llvm_v4i32_ty], [IntrNoMem]>;
 339   def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
 340               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 341                          llvm_i32_ty], [IntrNoMem]>;
 342   def int_x86_sse2_psra_w :
 343               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 344                          llvm_v4i32_ty], [IntrNoMem]>;
 345   def int_x86_sse2_psra_d :
 346               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 347                          llvm_v4i32_ty], [IntrNoMem]>;
 348 }
 349
 350 // Integer comparison ops
 351 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 352   def int_x86_sse2_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb128">,
 353               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 354                          llvm_v16i8_ty], [IntrNoMem]>;
 355   def int_x86_sse2_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw128">,
 356               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 357                          llvm_v8i16_ty], [IntrNoMem]>;
 358   def int_x86_sse2_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd128">,
 359               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 360                          llvm_v4i32_ty], [IntrNoMem]>;
 361   def int_x86_sse2_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb128">,
 362               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 363                          llvm_v16i8_ty], [IntrNoMem]>;
 364   def int_x86_sse2_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw128">,
 365               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 366                          llvm_v8i16_ty], [IntrNoMem]>;
 367   def int_x86_sse2_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd128">,
 368               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 369                          llvm_v4i32_ty], [IntrNoMem]>;
 370 }
 371
 372 // Conversion ops
 373 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 374   def int_x86_sse2_cvtdq2pd : GCCBuiltin<"__builtin_ia32_cvtdq2pd">,
 375               Intrinsic<[llvm_v2f64_ty, llvm_v4i32_ty], [IntrNoMem]>;
 376   def int_x86_sse2_cvtdq2ps : GCCBuiltin<"__builtin_ia32_cvtdq2ps">,
 377               Intrinsic<[llvm_v4f32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 378   def int_x86_sse2_cvtpd2dq : GCCBuiltin<"__builtin_ia32_cvtpd2dq">,
 379               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 380   def int_x86_sse2_cvttpd2dq : GCCBuiltin<"__builtin_ia32_cvttpd2dq">,
 381               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 382   def int_x86_sse2_cvtpd2ps : GCCBuiltin<"__builtin_ia32_cvtpd2ps">,
 383               Intrinsic<[llvm_v4f32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 384   def int_x86_sse2_cvtps2dq : GCCBuiltin<"__builtin_ia32_cvtps2dq">,
 385               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 386   def int_x86_sse2_cvttps2dq : GCCBuiltin<"__builtin_ia32_cvttps2dq">,
 387               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 388   def int_x86_sse2_cvtps2pd : GCCBuiltin<"__builtin_ia32_cvtps2pd">,
 389               Intrinsic<[llvm_v2f64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 390   def int_x86_sse2_cvtsd2si : GCCBuiltin<"__builtin_ia32_cvtsd2si">,
 391               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 392   def int_x86_sse2_cvtsd2si64 : GCCBuiltin<"__builtin_ia32_cvtsd2si64">,
 393               Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
 394   def int_x86_sse2_cvttsd2si : GCCBuiltin<"__builtin_ia32_cvttsd2si">,
 395               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 396   def int_x86_sse2_cvttsd2si64 : GCCBuiltin<"__builtin_ia32_cvttsd2si64">,
 397               Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
 398   def int_x86_sse2_cvtsi2sd : GCCBuiltin<"__builtin_ia32_cvtsi2sd">,
 399               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 400                          llvm_i32_ty], [IntrNoMem]>;
 401   def int_x86_sse2_cvtsi642sd : GCCBuiltin<"__builtin_ia32_cvtsi642sd">,
 402               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 403                          llvm_i64_ty], [IntrNoMem]>;
 404   def int_x86_sse2_cvtsd2ss : GCCBuiltin<"__builtin_ia32_cvtsd2ss">,
 405               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 406                          llvm_v2f64_ty], [IntrNoMem]>;
 407   def int_x86_sse2_cvtss2sd : GCCBuiltin<"__builtin_ia32_cvtss2sd">,
 408               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 409                          llvm_v4f32_ty], [IntrNoMem]>;
 410   def int_x86_sse_cvtpd2pi : GCCBuiltin<"__builtin_ia32_cvtpd2pi">,
 411               Intrinsic<[llvm_v2i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 412   def int_x86_sse_cvttpd2pi: GCCBuiltin<"__builtin_ia32_cvttpd2pi">,
 413               Intrinsic<[llvm_v2i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 414   def int_x86_sse_cvtpi2pd : GCCBuiltin<"__builtin_ia32_cvtpi2pd">,
 415               Intrinsic<[llvm_v2f64_ty, llvm_v2i32_ty], [IntrNoMem]>;
 416 }
 417
 418 // SIMD load ops
 419 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 420   def int_x86_sse2_loadu_pd : GCCBuiltin<"__builtin_ia32_loadupd">,
 421               Intrinsic<[llvm_v2f64_ty, llvm_ptr_ty], [IntrReadMem]>;
 422   def int_x86_sse2_loadu_dq : GCCBuiltin<"__builtin_ia32_loaddqu">,
 423               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 424 }
 425
 426 // SIMD store ops
 427 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 428   def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">,
 429               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 430                          llvm_v2f64_ty], [IntrWriteMem]>;
 431   def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">,
 432               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 433                          llvm_v16i8_ty], [IntrWriteMem]>;
 434   def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">,
 435               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 436                          llvm_v4i32_ty], [IntrWriteMem]>;
 437 }
 438
 439 // Cacheability support ops
 440 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 441   def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">,
 442               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 443                          llvm_v2i64_ty], [IntrWriteMem]>;
 444   def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">,
 445               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 446                          llvm_v2f64_ty], [IntrWriteMem]>;
 447   def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">,
 448               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 449                          llvm_i32_ty], [IntrWriteMem]>;
 450 }
 451
 452 // Misc.
 453 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 454   def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
 455               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 456                          llvm_v8i16_ty], [IntrNoMem]>;
 457   def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
 458               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 459                          llvm_v4i32_ty], [IntrNoMem]>;
 460   def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
 461               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 462                          llvm_v8i16_ty], [IntrNoMem]>;
 463   def int_x86_sse2_movmsk_pd : GCCBuiltin<"__builtin_ia32_movmskpd">,
 464               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 465   def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
 466               Intrinsic<[llvm_i32_ty, llvm_v16i8_ty], [IntrNoMem]>;
 467   def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">,
 468               Intrinsic<[llvm_void_ty, llvm_v16i8_ty,
 469                          llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>;
 470   def int_x86_sse2_clflush : GCCBuiltin<"__builtin_ia32_clflush">,
 471               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 472   def int_x86_sse2_lfence : GCCBuiltin<"__builtin_ia32_lfence">,
 473               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 474   def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">,
 475               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 476 }
 477
 478 // Shuffles.
 479 // FIXME: Temporary workarounds since 2-wide shuffle is broken.
 480 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 481   def int_x86_sse2_movs_d : GCCBuiltin<"__builtin_ia32_movsd">,
 482               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 483                          llvm_v2f64_ty], [IntrNoMem]>;
 484   def int_x86_sse2_loadh_pd : GCCBuiltin<"__builtin_ia32_loadhpd">,
 485               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 486                          llvm_ptr_ty], [IntrReadMem]>;
 487   def int_x86_sse2_loadl_pd : GCCBuiltin<"__builtin_ia32_loadlpd">,
 488               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 489                          llvm_ptr_ty], [IntrReadMem]>;
 490   def int_x86_sse2_shuf_pd : GCCBuiltin<"__builtin_ia32_shufpd">,
 491               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 492                          llvm_v2f64_ty, llvm_i32_ty], [IntrNoMem]>;
 493   def int_x86_sse2_unpckh_pd : GCCBuiltin<"__builtin_ia32_unpckhpd">,
 494               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 495                          llvm_v2f64_ty], [IntrNoMem]>;
 496   def int_x86_sse2_unpckl_pd : GCCBuiltin<"__builtin_ia32_unpcklpd">,
 497               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 498                          llvm_v2f64_ty], [IntrNoMem]>;
 499   def int_x86_sse2_punpckh_qdq : GCCBuiltin<"__builtin_ia32_punpckhqdq128">,
 500               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 501                          llvm_v2i64_ty], [IntrNoMem]>;
 502   def int_x86_sse2_punpckl_qdq : GCCBuiltin<"__builtin_ia32_punpcklqdq128">,
 503               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 504                          llvm_v2i64_ty], [IntrNoMem]>;
 505 }
 506
 507 //===----------------------------------------------------------------------===//
 508 // SSE3
 509
 510 // Addition / subtraction ops.
 511 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 512   def int_x86_sse3_addsub_ps : GCCBuiltin<"__builtin_ia32_addsubps">,
 513               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 514                          llvm_v4f32_ty], [IntrNoMem]>;
 515   def int_x86_sse3_addsub_pd : GCCBuiltin<"__builtin_ia32_addsubpd">,
 516               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 517                          llvm_v2f64_ty], [IntrNoMem]>;
 518 }
 519
 520 // Horizontal ops.
 521 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 522   def int_x86_sse3_hadd_ps : GCCBuiltin<"__builtin_ia32_haddps">,
 523               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 524                          llvm_v4f32_ty], [IntrNoMem]>;
 525   def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
 526               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 527                          llvm_v2f64_ty], [IntrNoMem]>;
 528   def int_x86_sse3_hsub_ps : GCCBuiltin<"__builtin_ia32_hsubps">,
 529               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 530                          llvm_v4f32_ty], [IntrNoMem]>;
 531   def int_x86_sse3_hsub_pd : GCCBuiltin<"__builtin_ia32_hsubpd">,
 532               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 533                          llvm_v2f64_ty], [IntrNoMem]>;
 534 }
 535
 536 // Specialized unaligned load.
 537 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 538   def int_x86_sse3_ldu_dq : GCCBuiltin<"__builtin_ia32_lddqu">,
 539               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 540 }
 541
 542 // Thread synchronization ops.
 543 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 544   def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">,
 545               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 546                          llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>;
 547   def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">,
 548               Intrinsic<[llvm_void_ty, llvm_i32_ty,
 549                          llvm_i32_ty], [IntrWriteMem]>;
 550 }
 551
 552 //===----------------------------------------------------------------------===//
 553 // SSSE3
 554
 555 // Horizontal arithmetic ops
 556 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 557   def int_x86_ssse3_phadd_w         : GCCBuiltin<"__builtin_ia32_phaddw">,
 558               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 559                          llvm_v4i16_ty], [IntrNoMem]>;
 560   def int_x86_ssse3_phadd_w_128     : GCCBuiltin<"__builtin_ia32_phaddw128">,
 561               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 562                          llvm_v8i16_ty], [IntrNoMem]>;
 563
 564   def int_x86_ssse3_phadd_d         : GCCBuiltin<"__builtin_ia32_phaddd">,
 565               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 566                          llvm_v2i32_ty], [IntrNoMem]>;
 567   def int_x86_ssse3_phadd_d_128     : GCCBuiltin<"__builtin_ia32_phaddd128">,
 568               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 569                          llvm_v4i32_ty], [IntrNoMem]>;
 570
 571   def int_x86_ssse3_phadd_sw        : GCCBuiltin<"__builtin_ia32_phaddsw">,
 572               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 573                          llvm_v4i16_ty], [IntrNoMem]>;
 574   def int_x86_ssse3_phadd_sw_128    : GCCBuiltin<"__builtin_ia32_phaddsw128">,
 575               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 576                          llvm_v4i32_ty], [IntrNoMem]>;
 577
 578   def int_x86_ssse3_phsub_w         : GCCBuiltin<"__builtin_ia32_phsubw">,
 579               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 580                          llvm_v4i16_ty], [IntrNoMem]>;
 581   def int_x86_ssse3_phsub_w_128     : GCCBuiltin<"__builtin_ia32_phsubw128">,
 582               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 583                          llvm_v8i16_ty], [IntrNoMem]>;
 584
 585   def int_x86_ssse3_phsub_d         : GCCBuiltin<"__builtin_ia32_phsubd">,
 586               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 587                          llvm_v2i32_ty], [IntrNoMem]>;
 588   def int_x86_ssse3_phsub_d_128     : GCCBuiltin<"__builtin_ia32_phsubd128">,
 589               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 590                          llvm_v4i32_ty], [IntrNoMem]>;
 591
 592   def int_x86_ssse3_phsub_sw        : GCCBuiltin<"__builtin_ia32_phsubsw">,
 593               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 594                          llvm_v4i16_ty], [IntrNoMem]>;
 595   def int_x86_ssse3_phsub_sw_128    : GCCBuiltin<"__builtin_ia32_phsubsw128">,
 596               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 597                          llvm_v8i16_ty], [IntrNoMem]>;
 598
 599   def int_x86_ssse3_pmadd_ub_sw     : GCCBuiltin<"__builtin_ia32_pmaddubsw">,
 600               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 601                          llvm_v4i16_ty], [IntrNoMem]>;
 602   def int_x86_ssse3_pmadd_ub_sw_128 : GCCBuiltin<"__builtin_ia32_pmaddubsw128">,
 603               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 604                          llvm_v8i16_ty], [IntrNoMem]>;
 605
 606   def int_x86_ssse3_pmul_hr_sw      : GCCBuiltin<"__builtin_ia32_pmulhrsw">,
 607               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 608                          llvm_v4i16_ty], [IntrNoMem]>;
 609   def int_x86_ssse3_pmul_hr_sw_128  : GCCBuiltin<"__builtin_ia32_pmulhrsw128">,
 610               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 611                          llvm_v8i16_ty], [IntrNoMem]>;
 612 }
 613
 614 // Shuffle ops
 615 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 616   def int_x86_ssse3_pshuf_b         : GCCBuiltin<"__builtin_ia32_pshufb">,
 617               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 618                          llvm_v8i8_ty], [IntrNoMem]>;
 619   def int_x86_ssse3_pshuf_b_128     : GCCBuiltin<"__builtin_ia32_pshufb128">,
 620               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 621                          llvm_v16i8_ty], [IntrNoMem]>;
 622 }
 623
 624 // Sign ops
 625 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 626   def int_x86_ssse3_psign_b         : GCCBuiltin<"__builtin_ia32_psignb">,
 627               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 628                          llvm_v8i8_ty], [IntrNoMem]>;
 629   def int_x86_ssse3_psign_b_128     : GCCBuiltin<"__builtin_ia32_psignb128">,
 630               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 631                          llvm_v16i8_ty], [IntrNoMem]>;
 632
 633   def int_x86_ssse3_psign_w         : GCCBuiltin<"__builtin_ia32_psignw">,
 634               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 635                          llvm_v4i16_ty], [IntrNoMem]>;
 636   def int_x86_ssse3_psign_w_128     : GCCBuiltin<"__builtin_ia32_psignw128">,
 637               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 638                          llvm_v8i16_ty], [IntrNoMem]>;
 639
 640   def int_x86_ssse3_psign_d         : GCCBuiltin<"__builtin_ia32_psignd">,
 641               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 642                          llvm_v2i32_ty], [IntrNoMem]>;
 643   def int_x86_ssse3_psign_d_128     : GCCBuiltin<"__builtin_ia32_psignd128">,
 644               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 645                          llvm_v4i32_ty], [IntrNoMem]>;
 646 }
 647
 648 // Absolute value ops
 649 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 650   def int_x86_ssse3_pabs_b     : GCCBuiltin<"__builtin_ia32_pabsb">,
 651               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
 652   def int_x86_ssse3_pabs_b_128 : GCCBuiltin<"__builtin_ia32_pabsb128">,
 653               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
 654
 655   def int_x86_ssse3_pabs_w     : GCCBuiltin<"__builtin_ia32_pabsw">,
 656               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty], [IntrNoMem]>;
 657   def int_x86_ssse3_pabs_w_128 : GCCBuiltin<"__builtin_ia32_pabsw128">,
 658               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>;
 659
 660   def int_x86_ssse3_pabs_d     : GCCBuiltin<"__builtin_ia32_pabsd">,
 661               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty], [IntrNoMem]>;
 662   def int_x86_ssse3_pabs_d_128 : GCCBuiltin<"__builtin_ia32_pabsd128">,
 663               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 664 }
 665
 666 // Align ops
 667 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 668   def int_x86_ssse3_palign_r        : GCCBuiltin<"__builtin_ia32_palignr">,
 669               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
 670                          llvm_v1i64_ty, llvm_i16_ty], [IntrNoMem]>;
 671   def int_x86_ssse3_palign_r_128    : GCCBuiltin<"__builtin_ia32_palignr128">,
 672               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 673                          llvm_v2i64_ty, llvm_i32_ty], [IntrNoMem]>;
 674 }
 675
 676 //===----------------------------------------------------------------------===//
 677 // MMX
 678
 679 // Empty MMX state op.
 680 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 681   def int_x86_mmx_emms  : GCCBuiltin<"__builtin_ia32_emms">,
 682               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 683   def int_x86_mmx_femms : GCCBuiltin<"__builtin_ia32_femms">,
 684               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 685 }
 686
 687 // Integer arithmetic ops.
 688 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 689   // Addition
 690   def int_x86_mmx_padds_b : GCCBuiltin<"__builtin_ia32_paddsb">,
 691               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 692                          llvm_v8i8_ty], [IntrNoMem]>;
 693   def int_x86_mmx_padds_w : GCCBuiltin<"__builtin_ia32_paddsw">,
 694               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 695                          llvm_v4i16_ty], [IntrNoMem]>;
 696
 697   def int_x86_mmx_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb">,
 698               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 699                          llvm_v8i8_ty], [IntrNoMem]>;
 700   def int_x86_mmx_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw">,
 701               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 702                          llvm_v4i16_ty], [IntrNoMem]>;
 703
 704   // Subtraction
 705   def int_x86_mmx_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb">,
 706               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 707                          llvm_v8i8_ty], [IntrNoMem]>;
 708   def int_x86_mmx_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw">,
 709               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 710                          llvm_v4i16_ty], [IntrNoMem]>;
 711
 712   def int_x86_mmx_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb">,
 713               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 714                          llvm_v8i8_ty], [IntrNoMem]>;
 715   def int_x86_mmx_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw">,
 716               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 717                          llvm_v4i16_ty], [IntrNoMem]>;
 718
 719   // Multiplication
 720   def int_x86_mmx_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw">,
 721               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 722                          llvm_v4i16_ty], [IntrNoMem]>;
 723   def int_x86_mmx_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw">,
 724               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 725                          llvm_v4i16_ty], [IntrNoMem]>;
 726   def int_x86_mmx_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq">,
 727               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 728                          llvm_v2i32_ty], [IntrNoMem]>;
 729   def int_x86_mmx_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd">,
 730               Intrinsic<[llvm_v2i32_ty, llvm_v4i16_ty,
 731                          llvm_v4i16_ty], [IntrNoMem]>;
 732
 733   // Averages
 734   def int_x86_mmx_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb">,
 735               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 736                          llvm_v8i8_ty], [IntrNoMem]>;
 737   def int_x86_mmx_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw">,
 738               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 739                          llvm_v4i16_ty], [IntrNoMem]>;
 740
 741   // Maximum
 742   def int_x86_mmx_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub">,
 743               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 744                          llvm_v8i8_ty], [IntrNoMem]>;
 745   def int_x86_mmx_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw">,
 746               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 747                          llvm_v4i16_ty], [IntrNoMem]>;
 748
 749   // Minimum
 750   def int_x86_mmx_pminu_b : GCCBuiltin<"__builtin_ia32_pminub">,
 751               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 752                          llvm_v8i8_ty], [IntrNoMem]>;
 753   def int_x86_mmx_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw">,
 754               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 755                          llvm_v4i16_ty], [IntrNoMem]>;
 756
 757   // Packed sum of absolute differences
 758   def int_x86_mmx_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw">,
 759               Intrinsic<[llvm_v4i16_ty, llvm_v8i8_ty,
 760                          llvm_v8i8_ty], [IntrNoMem]>;
 761 }
 762
 763 // Integer shift ops.
 764 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 765   // Shift left logical
 766   def int_x86_mmx_psll_w : GCCBuiltin<"__builtin_ia32_psllw">,
 767               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 768                          llvm_v1i64_ty], [IntrNoMem]>;
 769   def int_x86_mmx_psll_d : GCCBuiltin<"__builtin_ia32_pslld">,
 770               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 771                          llvm_v1i64_ty], [IntrNoMem]>;
 772   def int_x86_mmx_psll_q : GCCBuiltin<"__builtin_ia32_psllq">,
 773               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
 774                          llvm_v1i64_ty], [IntrNoMem]>;
 775
 776   def int_x86_mmx_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw">,
 777               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 778                          llvm_v1i64_ty], [IntrNoMem]>;
 779   def int_x86_mmx_psrl_d : GCCBuiltin<"__builtin_ia32_psrld">,
 780               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 781                          llvm_v1i64_ty], [IntrNoMem]>;
 782   def int_x86_mmx_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq">,
 783               Intrinsic<[llvm_v1i64_ty,   llvm_v1i64_ty,
 784                          llvm_v1i64_ty], [IntrNoMem]>;
 785
 786   def int_x86_mmx_psra_w : GCCBuiltin<"__builtin_ia32_psraw">,
 787               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 788                          llvm_v1i64_ty], [IntrNoMem]>;
 789   def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">,
 790               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 791                          llvm_v1i64_ty], [IntrNoMem]>;
 792 }
 793
 794 // Pack ops.
 795 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 796   def int_x86_mmx_packsswb : GCCBuiltin<"__builtin_ia32_packsswb">,
 797               Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
 798                          llvm_v4i16_ty], [IntrNoMem]>;
 799   def int_x86_mmx_packssdw : GCCBuiltin<"__builtin_ia32_packssdw">,
 800               Intrinsic<[llvm_v4i16_ty, llvm_v2i32_ty,
 801                          llvm_v2i32_ty], [IntrNoMem]>;
 802   def int_x86_mmx_packuswb : GCCBuiltin<"__builtin_ia32_packuswb">,
 803               Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
 804                          llvm_v4i16_ty], [IntrNoMem]>;
 805 }
 806
 807 // Integer comparison ops
 808 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 809   def int_x86_mmx_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb">,
 810               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 811                          llvm_v8i8_ty], [IntrNoMem]>;
 812   def int_x86_mmx_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw">,
 813               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 814                          llvm_v4i16_ty], [IntrNoMem]>;
 815   def int_x86_mmx_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd">,
 816               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 817                          llvm_v2i32_ty], [IntrNoMem]>;
 818
 819   def int_x86_mmx_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb">,
 820               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 821                          llvm_v8i8_ty], [IntrNoMem]>;
 822   def int_x86_mmx_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw">,
 823               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 824                          llvm_v4i16_ty], [IntrNoMem]>;
 825   def int_x86_mmx_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd">,
 826               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 827                          llvm_v2i32_ty], [IntrNoMem]>;
 828 }
 829
 830 // Misc.
 831 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 832   def int_x86_mmx_maskmovq : GCCBuiltin<"__builtin_ia32_maskmovq">,
 833               Intrinsic<[llvm_void_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_ptr_ty],
 834                         [IntrWriteMem]>;
 835
 836   def int_x86_mmx_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb">,
 837               Intrinsic<[llvm_i32_ty, llvm_v8i8_ty], [IntrNoMem]>;
 838
 839   def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">,
 840               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 841                          llvm_v1i64_ty], [IntrWriteMem]>;
 842 }