include/llvm/IntrinsicsX86.td

   1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by Chris Lattner and is distributed under the
   6 // University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the X86-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14
  15 //===----------------------------------------------------------------------===//
  16 // SSE1
  17
  18 // Arithmetic ops
  19 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  20   def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
  21               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  22                          llvm_v4f32_ty], [IntrNoMem]>;
  23   def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
  24               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  25                          llvm_v4f32_ty], [IntrNoMem]>;
  26   def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
  27               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  28                          llvm_v4f32_ty], [IntrNoMem]>;
  29   def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
  30               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  31                          llvm_v4f32_ty], [IntrNoMem]>;
  32   def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
  33               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  34                         [IntrNoMem]>;
  35   def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
  36               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  37                         [IntrNoMem]>;
  38   def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
  39               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  40                         [IntrNoMem]>;
  41   def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
  42               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  43                         [IntrNoMem]>;
  44   def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
  45               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  46                         [IntrNoMem]>;
  47   def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
  48               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  49                         [IntrNoMem]>;
  50   def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
  51               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  52                          llvm_v4f32_ty], [IntrNoMem]>;
  53   def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
  54               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  55                          llvm_v4f32_ty], [IntrNoMem]>;
  56   def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
  57               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  58                          llvm_v4f32_ty], [IntrNoMem]>;
  59   def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
  60               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  61                          llvm_v4f32_ty], [IntrNoMem]>;
  62 }
  63
  64 // Comparison ops
  65 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  66   def int_x86_sse_cmp_ss :
  67               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  68                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
  69   def int_x86_sse_cmp_ps :
  70               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  71                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
  72   def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
  73               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  74                          llvm_v4f32_ty], [IntrNoMem]>;
  75   def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
  76               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  77                          llvm_v4f32_ty], [IntrNoMem]>;
  78   def int_x86_sse_comile_ss : GCCBuiltin<"__builtin_ia32_comile">,
  79               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  80                          llvm_v4f32_ty], [IntrNoMem]>;
  81   def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
  82               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  83                          llvm_v4f32_ty], [IntrNoMem]>;
  84   def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
  85               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  86                          llvm_v4f32_ty], [IntrNoMem]>;
  87   def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
  88               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  89                          llvm_v4f32_ty], [IntrNoMem]>;
  90   def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
  91               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  92                          llvm_v4f32_ty], [IntrNoMem]>;
  93   def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
  94               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  95                          llvm_v4f32_ty], [IntrNoMem]>;
  96   def int_x86_sse_ucomile_ss : GCCBuiltin<"__builtin_ia32_ucomile">,
  97               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  98                          llvm_v4f32_ty], [IntrNoMem]>;
  99   def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
 100               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 101                          llvm_v4f32_ty], [IntrNoMem]>;
 102   def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
 103               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 104                          llvm_v4f32_ty], [IntrNoMem]>;
 105   def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
 106               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 107                          llvm_v4f32_ty], [IntrNoMem]>;
 108 }
 109
 110
 111 // Conversion ops
 112 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 113   def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
 114               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 115   def int_x86_sse_cvtss2si64 : GCCBuiltin<"__builtin_ia32_cvtss2si64">,
 116               Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 117   def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
 118               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 119   def int_x86_sse_cvttss2si64 : GCCBuiltin<"__builtin_ia32_cvttss2si64">,
 120               Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 121   def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
 122               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 123                          llvm_i32_ty], [IntrNoMem]>;
 124   def int_x86_sse_cvtsi642ss : GCCBuiltin<"__builtin_ia32_cvtsi642ss">,
 125               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 126                          llvm_i64_ty], [IntrNoMem]>;
 127 }
 128
 129 // SIMD load ops
 130 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 131   def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
 132               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
 133 }
 134
 135 // SIMD store ops
 136 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 137   def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
 138               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 139                          llvm_v4f32_ty], [IntrWriteMem]>;
 140 }
 141
 142 // Cacheability support ops
 143 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 144   def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">,
 145               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 146                          llvm_v4f32_ty], [IntrWriteMem]>;
 147   def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
 148               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 149 }
 150
 151 // Control register.
 152 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 153   def int_x86_sse_stmxcsr :
 154               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 155   def int_x86_sse_ldmxcsr :
 156               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 157 }
 158
 159 // Misc.
 160 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 161   def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
 162               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 163 }
 164
 165 //===----------------------------------------------------------------------===//
 166 // SSE2
 167
 168 // FP arithmetic ops
 169 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 170   def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
 171               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 172                          llvm_v2f64_ty], [IntrNoMem]>;
 173   def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">,
 174               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 175                          llvm_v2f64_ty], [IntrNoMem]>;
 176   def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">,
 177               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 178                          llvm_v2f64_ty], [IntrNoMem]>;
 179   def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">,
 180               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 181                          llvm_v2f64_ty], [IntrNoMem]>;
 182   def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">,
 183               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 184                         [IntrNoMem]>;
 185   def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">,
 186               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 187                         [IntrNoMem]>;
 188   def int_x86_sse2_rcp_sd : GCCBuiltin<"__builtin_ia32_rcpsd">,
 189               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 190                         [IntrNoMem]>;
 191   def int_x86_sse2_rcp_pd : GCCBuiltin<"__builtin_ia32_rcppd">,
 192               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 193                         [IntrNoMem]>;
 194   def int_x86_sse2_rsqrt_sd : GCCBuiltin<"__builtin_ia32_rsqrtsd">,
 195               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 196                         [IntrNoMem]>;
 197   def int_x86_sse2_rsqrt_pd : GCCBuiltin<"__builtin_ia32_rsqrtpd">,
 198               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 199                         [IntrNoMem]>;
 200   def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">,
 201               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 202                          llvm_v2f64_ty], [IntrNoMem]>;
 203   def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">,
 204               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 205                          llvm_v2f64_ty], [IntrNoMem]>;
 206   def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">,
 207               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 208                          llvm_v2f64_ty], [IntrNoMem]>;
 209   def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">,
 210               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 211                          llvm_v2f64_ty], [IntrNoMem]>;
 212 }
 213
 214 // FP comparison ops
 215 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 216   def int_x86_sse2_cmp_sd :
 217               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 218                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
 219   def int_x86_sse2_cmp_pd :
 220               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 221                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
 222   def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">,
 223               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 224                          llvm_v2f64_ty], [IntrNoMem]>;
 225   def int_x86_sse2_comilt_sd : GCCBuiltin<"__builtin_ia32_comisdlt">,
 226               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 227                          llvm_v2f64_ty], [IntrNoMem]>;
 228   def int_x86_sse2_comile_sd : GCCBuiltin<"__builtin_ia32_comisdle">,
 229               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 230                          llvm_v2f64_ty], [IntrNoMem]>;
 231   def int_x86_sse2_comigt_sd : GCCBuiltin<"__builtin_ia32_comisdgt">,
 232               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 233                          llvm_v2f64_ty], [IntrNoMem]>;
 234   def int_x86_sse2_comige_sd : GCCBuiltin<"__builtin_ia32_comisdge">,
 235               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 236                          llvm_v2f64_ty], [IntrNoMem]>;
 237   def int_x86_sse2_comineq_sd : GCCBuiltin<"__builtin_ia32_comisdneq">,
 238               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 239                          llvm_v2f64_ty], [IntrNoMem]>;
 240   def int_x86_sse2_ucomieq_sd : GCCBuiltin<"__builtin_ia32_ucomisdeq">,
 241               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 242                          llvm_v2f64_ty], [IntrNoMem]>;
 243   def int_x86_sse2_ucomilt_sd : GCCBuiltin<"__builtin_ia32_ucomisdlt">,
 244               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 245                          llvm_v2f64_ty], [IntrNoMem]>;
 246   def int_x86_sse2_ucomile_sd : GCCBuiltin<"__builtin_ia32_ucomisdle">,
 247               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 248                          llvm_v2f64_ty], [IntrNoMem]>;
 249   def int_x86_sse2_ucomigt_sd : GCCBuiltin<"__builtin_ia32_ucomisdgt">,
 250               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 251                          llvm_v2f64_ty], [IntrNoMem]>;
 252   def int_x86_sse2_ucomige_sd : GCCBuiltin<"__builtin_ia32_ucomisdge">,
 253               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 254                          llvm_v2f64_ty], [IntrNoMem]>;
 255   def int_x86_sse2_ucomineq_sd : GCCBuiltin<"__builtin_ia32_ucomisdneq">,
 256               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 257                          llvm_v2f64_ty], [IntrNoMem]>;
 258 }
 259
 260 // Integer arithmetic ops.
 261 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 262   def int_x86_sse2_padds_b : GCCBuiltin<"__builtin_ia32_paddsb128">,
 263               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 264                          llvm_v16i8_ty], [IntrNoMem]>;
 265   def int_x86_sse2_padds_w : GCCBuiltin<"__builtin_ia32_paddsw128">,
 266               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 267                          llvm_v8i16_ty], [IntrNoMem]>;
 268   def int_x86_sse2_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb128">,
 269               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 270                          llvm_v16i8_ty], [IntrNoMem]>;
 271   def int_x86_sse2_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw128">,
 272               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 273                          llvm_v8i16_ty], [IntrNoMem]>;
 274   def int_x86_sse2_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb128">,
 275               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 276                          llvm_v16i8_ty], [IntrNoMem]>;
 277   def int_x86_sse2_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw128">,
 278               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 279                          llvm_v8i16_ty], [IntrNoMem]>;
 280   def int_x86_sse2_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb128">,
 281               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 282                          llvm_v16i8_ty], [IntrNoMem]>;
 283   def int_x86_sse2_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw128">,
 284               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 285                          llvm_v8i16_ty], [IntrNoMem]>;
 286   def int_x86_sse2_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw128">,
 287               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 288                          llvm_v8i16_ty], [IntrNoMem]>;
 289   def int_x86_sse2_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw128">,
 290               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 291                          llvm_v8i16_ty], [IntrNoMem]>;
 292   def int_x86_sse2_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq128">,
 293               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty,
 294                          llvm_v4i32_ty], [IntrNoMem]>;
 295   def int_x86_sse2_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd128">,
 296               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty,
 297                          llvm_v8i16_ty], [IntrNoMem]>;
 298   def int_x86_sse2_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb128">,
 299               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 300                          llvm_v16i8_ty], [IntrNoMem]>;
 301   def int_x86_sse2_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw128">,
 302               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 303                          llvm_v8i16_ty], [IntrNoMem]>;
 304   def int_x86_sse2_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub128">,
 305               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 306                          llvm_v16i8_ty], [IntrNoMem]>;
 307   def int_x86_sse2_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw128">,
 308               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 309                          llvm_v8i16_ty], [IntrNoMem]>;
 310   def int_x86_sse2_pminu_b : GCCBuiltin<"__builtin_ia32_pminub128">,
 311               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 312                          llvm_v16i8_ty], [IntrNoMem]>;
 313   def int_x86_sse2_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw128">,
 314               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 315                          llvm_v8i16_ty], [IntrNoMem]>;
 316   def int_x86_sse2_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw128">,
 317               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty,
 318                          llvm_v16i8_ty], [IntrNoMem]>;
 319 }
 320
 321 // Integer shift ops.
 322 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 323   def int_x86_sse2_psll_w :
 324               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 325                          llvm_v4i32_ty], [IntrNoMem]>;
 326   def int_x86_sse2_psll_d :
 327               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 328                          llvm_v4i32_ty], [IntrNoMem]>;
 329   def int_x86_sse2_psll_q :
 330               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 331                          llvm_v4i32_ty], [IntrNoMem]>;
 332   def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
 333               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 334                          llvm_i32_ty], [IntrNoMem]>;
 335   def int_x86_sse2_psrl_w :
 336               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 337                          llvm_v4i32_ty], [IntrNoMem]>;
 338   def int_x86_sse2_psrl_d :
 339               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 340                          llvm_v4i32_ty], [IntrNoMem]>;
 341   def int_x86_sse2_psrl_q :
 342               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 343                          llvm_v4i32_ty], [IntrNoMem]>;
 344   def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
 345               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 346                          llvm_i32_ty], [IntrNoMem]>;
 347   def int_x86_sse2_psra_w :
 348               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 349                          llvm_v4i32_ty], [IntrNoMem]>;
 350   def int_x86_sse2_psra_d :
 351               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 352                          llvm_v4i32_ty], [IntrNoMem]>;
 353 }
 354
 355 // Integer comparison ops
 356 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 357   def int_x86_sse2_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb128">,
 358               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 359                          llvm_v16i8_ty], [IntrNoMem]>;
 360   def int_x86_sse2_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw128">,
 361               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 362                          llvm_v8i16_ty], [IntrNoMem]>;
 363   def int_x86_sse2_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd128">,
 364               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 365                          llvm_v4i32_ty], [IntrNoMem]>;
 366   def int_x86_sse2_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb128">,
 367               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 368                          llvm_v16i8_ty], [IntrNoMem]>;
 369   def int_x86_sse2_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw128">,
 370               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 371                          llvm_v8i16_ty], [IntrNoMem]>;
 372   def int_x86_sse2_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd128">,
 373               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 374                          llvm_v4i32_ty], [IntrNoMem]>;
 375 }
 376
 377 // Conversion ops
 378 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 379   def int_x86_sse2_cvtdq2pd : GCCBuiltin<"__builtin_ia32_cvtdq2pd">,
 380               Intrinsic<[llvm_v2f64_ty, llvm_v4i32_ty], [IntrNoMem]>;
 381   def int_x86_sse2_cvtdq2ps : GCCBuiltin<"__builtin_ia32_cvtdq2ps">,
 382               Intrinsic<[llvm_v4f32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 383   def int_x86_sse2_cvtpd2dq : GCCBuiltin<"__builtin_ia32_cvtpd2dq">,
 384               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 385   def int_x86_sse2_cvttpd2dq : GCCBuiltin<"__builtin_ia32_cvttpd2dq">,
 386               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 387   def int_x86_sse2_cvtpd2ps : GCCBuiltin<"__builtin_ia32_cvtpd2ps">,
 388               Intrinsic<[llvm_v4f32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 389   def int_x86_sse2_cvtps2dq : GCCBuiltin<"__builtin_ia32_cvtps2dq">,
 390               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 391   def int_x86_sse2_cvttps2dq : GCCBuiltin<"__builtin_ia32_cvttps2dq">,
 392               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 393   def int_x86_sse2_cvtps2pd : GCCBuiltin<"__builtin_ia32_cvtps2pd">,
 394               Intrinsic<[llvm_v2f64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 395   def int_x86_sse2_cvtsd2si : GCCBuiltin<"__builtin_ia32_cvtsd2si">,
 396               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 397   def int_x86_sse2_cvtsd2si64 : GCCBuiltin<"__builtin_ia32_cvtsd2si64">,
 398               Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
 399   def int_x86_sse2_cvttsd2si : GCCBuiltin<"__builtin_ia32_cvttsd2si">,
 400               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 401   def int_x86_sse2_cvttsd2si64 : GCCBuiltin<"__builtin_ia32_cvttsd2si64">,
 402               Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
 403   def int_x86_sse2_cvtsi2sd : GCCBuiltin<"__builtin_ia32_cvtsi2sd">,
 404               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 405                          llvm_i32_ty], [IntrNoMem]>;
 406   def int_x86_sse2_cvtsi642sd : GCCBuiltin<"__builtin_ia32_cvtsi642sd">,
 407               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 408                          llvm_i64_ty], [IntrNoMem]>;
 409   def int_x86_sse2_cvtsd2ss : GCCBuiltin<"__builtin_ia32_cvtsd2ss">,
 410               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 411                          llvm_v2f64_ty], [IntrNoMem]>;
 412   def int_x86_sse2_cvtss2sd : GCCBuiltin<"__builtin_ia32_cvtss2sd">,
 413               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 414                          llvm_v4f32_ty], [IntrNoMem]>;
 415 }
 416
 417 // SIMD load ops
 418 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 419   def int_x86_sse2_loadu_pd : GCCBuiltin<"__builtin_ia32_loadupd">,
 420               Intrinsic<[llvm_v2f64_ty, llvm_ptr_ty], [IntrReadMem]>;
 421   def int_x86_sse2_loadu_dq : GCCBuiltin<"__builtin_ia32_loaddqu">,
 422               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 423 }
 424
 425 // SIMD store ops
 426 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 427   def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">,
 428               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 429                          llvm_v2f64_ty], [IntrWriteMem]>;
 430   def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">,
 431               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 432                          llvm_v16i8_ty], [IntrWriteMem]>;
 433   def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">,
 434               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 435                          llvm_v4i32_ty], [IntrWriteMem]>;
 436 }
 437
 438 // Cacheability support ops
 439 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 440   def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">,
 441               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 442                          llvm_v2i64_ty], [IntrWriteMem]>;
 443   def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">,
 444               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 445                          llvm_v2f64_ty], [IntrWriteMem]>;
 446   def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">,
 447               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 448                          llvm_i32_ty], [IntrWriteMem]>;
 449 }
 450
 451 // Misc.
 452 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 453   def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
 454               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 455                          llvm_v8i16_ty], [IntrNoMem]>;
 456   def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
 457               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 458                          llvm_v4i32_ty], [IntrNoMem]>;
 459   def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
 460               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 461                          llvm_v8i16_ty], [IntrNoMem]>;
 462   def int_x86_sse2_movl_dq : GCCBuiltin<"__builtin_ia32_movqv4si">,
 463               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 464   def int_x86_sse2_movmsk_pd : GCCBuiltin<"__builtin_ia32_movmskpd">,
 465               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 466   def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
 467               Intrinsic<[llvm_i32_ty, llvm_v16i8_ty], [IntrNoMem]>;
 468   def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">,
 469               Intrinsic<[llvm_void_ty, llvm_v16i8_ty,
 470                          llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>;
 471   def int_x86_sse2_clflush : GCCBuiltin<"__builtin_ia32_clflush">,
 472               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 473   def int_x86_sse2_lfence : GCCBuiltin<"__builtin_ia32_lfence">,
 474               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 475   def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">,
 476               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 477 }
 478
 479 // Shuffles.
 480 // FIXME: Temporary workarounds since 2-wide shuffle is broken.
 481 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 482   def int_x86_sse2_movs_d : GCCBuiltin<"__builtin_ia32_movsd">,
 483               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 484                          llvm_v2f64_ty], [IntrNoMem]>;
 485   def int_x86_sse2_loadh_pd : GCCBuiltin<"__builtin_ia32_loadhpd">,
 486               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 487                          llvm_ptr_ty], [IntrReadMem]>;
 488   def int_x86_sse2_loadl_pd : GCCBuiltin<"__builtin_ia32_loadlpd">,
 489               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 490                          llvm_ptr_ty], [IntrReadMem]>;
 491   def int_x86_sse2_shuf_pd : GCCBuiltin<"__builtin_ia32_shufpd">,
 492               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 493                          llvm_v2f64_ty, llvm_i32_ty], [IntrNoMem]>;
 494   def int_x86_sse2_unpckh_pd : GCCBuiltin<"__builtin_ia32_unpckhpd">,
 495               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 496                          llvm_v2f64_ty], [IntrNoMem]>;
 497   def int_x86_sse2_unpckl_pd : GCCBuiltin<"__builtin_ia32_unpcklpd">,
 498               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 499                          llvm_v2f64_ty], [IntrNoMem]>;
 500   def int_x86_sse2_punpckh_qdq : GCCBuiltin<"__builtin_ia32_punpckhqdq128">,
 501               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 502                          llvm_v2i64_ty], [IntrNoMem]>;
 503   def int_x86_sse2_punpckl_qdq : GCCBuiltin<"__builtin_ia32_punpcklqdq128">,
 504               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 505                          llvm_v2i64_ty], [IntrNoMem]>;
 506 }
 507
 508 //===----------------------------------------------------------------------===//
 509 // SSE3
 510
 511 // Addition / subtraction ops.
 512 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 513   def int_x86_sse3_addsub_ps : GCCBuiltin<"__builtin_ia32_addsubps">,
 514               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 515                          llvm_v4f32_ty], [IntrNoMem]>;
 516   def int_x86_sse3_addsub_pd : GCCBuiltin<"__builtin_ia32_addsubpd">,
 517               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 518                          llvm_v2f64_ty], [IntrNoMem]>;
 519 }
 520
 521 // Horizontal ops.
 522 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 523   def int_x86_sse3_hadd_ps : GCCBuiltin<"__builtin_ia32_haddps">,
 524               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 525                          llvm_v4f32_ty], [IntrNoMem]>;
 526   def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
 527               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 528                          llvm_v2f64_ty], [IntrNoMem]>;
 529   def int_x86_sse3_hsub_ps : GCCBuiltin<"__builtin_ia32_hsubps">,
 530               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 531                          llvm_v4f32_ty], [IntrNoMem]>;
 532   def int_x86_sse3_hsub_pd : GCCBuiltin<"__builtin_ia32_hsubpd">,
 533               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 534                          llvm_v2f64_ty], [IntrNoMem]>;
 535 }
 536
 537 // Specialized unaligned load.
 538 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 539   def int_x86_sse3_ldu_dq : GCCBuiltin<"__builtin_ia32_lddqu">,
 540               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 541 }
 542
 543 // Thread synchronization ops.
 544 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 545   def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">,
 546               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 547                          llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>;
 548   def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">,
 549               Intrinsic<[llvm_void_ty, llvm_i32_ty,
 550                          llvm_i32_ty], [IntrWriteMem]>;
 551 }
 552
 553 //===----------------------------------------------------------------------===//
 554 // SSSE3
 555
 556 // Horizontal arithmetic ops
 557 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 558   def int_x86_ssse3_phadd_w         : GCCBuiltin<"__builtin_ia32_phaddw">,
 559               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 560                          llvm_v4i16_ty], [IntrNoMem]>;
 561   def int_x86_ssse3_phadd_w_128     : GCCBuiltin<"__builtin_ia32_phaddw128">,
 562               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 563                          llvm_v8i16_ty], [IntrNoMem]>;
 564
 565   def int_x86_ssse3_phadd_d         : GCCBuiltin<"__builtin_ia32_phaddd">,
 566               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 567                          llvm_v2i32_ty], [IntrNoMem]>;
 568   def int_x86_ssse3_phadd_d_128     : GCCBuiltin<"__builtin_ia32_phaddd128">,
 569               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 570                          llvm_v4i32_ty], [IntrNoMem]>;
 571
 572   def int_x86_ssse3_phadd_sw        : GCCBuiltin<"__builtin_ia32_phaddsw">,
 573               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 574                          llvm_v4i16_ty], [IntrNoMem]>;
 575   def int_x86_ssse3_phadd_sw_128    : GCCBuiltin<"__builtin_ia32_phaddsw128">,
 576               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 577                          llvm_v4i32_ty], [IntrNoMem]>;
 578
 579   def int_x86_ssse3_phsub_w         : GCCBuiltin<"__builtin_ia32_phsubw">,
 580               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 581                          llvm_v4i16_ty], [IntrNoMem]>;
 582   def int_x86_ssse3_phsub_w_128     : GCCBuiltin<"__builtin_ia32_phsubw128">,
 583               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 584                          llvm_v8i16_ty], [IntrNoMem]>;
 585
 586   def int_x86_ssse3_phsub_d         : GCCBuiltin<"__builtin_ia32_phsubd">,
 587               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 588                          llvm_v2i32_ty], [IntrNoMem]>;
 589   def int_x86_ssse3_phsub_d_128     : GCCBuiltin<"__builtin_ia32_phsubd128">,
 590               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 591                          llvm_v4i32_ty], [IntrNoMem]>;
 592
 593   def int_x86_ssse3_phsub_sw        : GCCBuiltin<"__builtin_ia32_phsubsw">,
 594               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 595                          llvm_v4i16_ty], [IntrNoMem]>;
 596   def int_x86_ssse3_phsub_sw_128    : GCCBuiltin<"__builtin_ia32_phsubsw128">,
 597               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 598                          llvm_v8i16_ty], [IntrNoMem]>;
 599
 600   def int_x86_ssse3_pmadd_ub_sw     : GCCBuiltin<"__builtin_ia32_pmaddubsw">,
 601               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 602                          llvm_v4i16_ty], [IntrNoMem]>;
 603   def int_x86_ssse3_pmadd_ub_sw_128 : GCCBuiltin<"__builtin_ia32_pmaddubsw128">,
 604               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 605                          llvm_v8i16_ty], [IntrNoMem]>;
 606
 607   def int_x86_ssse3_pmul_hr_sw      : GCCBuiltin<"__builtin_ia32_pmulhrsw">,
 608               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 609                          llvm_v4i16_ty], [IntrNoMem]>;
 610   def int_x86_ssse3_pmul_hr_sw_128  : GCCBuiltin<"__builtin_ia32_pmulhrsw128">,
 611               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 612                          llvm_v8i16_ty], [IntrNoMem]>;
 613 }
 614
 615 // Shuffle ops
 616 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 617   def int_x86_ssse3_pshuf_b         : GCCBuiltin<"__builtin_ia32_pshufb">,
 618               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 619                          llvm_v8i8_ty], [IntrNoMem]>;
 620   def int_x86_ssse3_pshuf_b_128     : GCCBuiltin<"__builtin_ia32_pshufb128">,
 621               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 622                          llvm_v16i8_ty], [IntrNoMem]>;
 623 }
 624
 625 // Sign ops
 626 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 627   def int_x86_ssse3_psign_b         : GCCBuiltin<"__builtin_ia32_psignb">,
 628               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 629                          llvm_v8i8_ty], [IntrNoMem]>;
 630   def int_x86_ssse3_psign_b_128     : GCCBuiltin<"__builtin_ia32_psignb128">,
 631               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 632                          llvm_v16i8_ty], [IntrNoMem]>;
 633
 634   def int_x86_ssse3_psign_w         : GCCBuiltin<"__builtin_ia32_psignw">,
 635               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 636                          llvm_v4i16_ty], [IntrNoMem]>;
 637   def int_x86_ssse3_psign_w_128     : GCCBuiltin<"__builtin_ia32_psignw128">,
 638               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 639                          llvm_v8i16_ty], [IntrNoMem]>;
 640
 641   def int_x86_ssse3_psign_d         : GCCBuiltin<"__builtin_ia32_psignd">,
 642               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 643                          llvm_v2i32_ty], [IntrNoMem]>;
 644   def int_x86_ssse3_psign_d_128     : GCCBuiltin<"__builtin_ia32_psignd128">,
 645               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 646                          llvm_v4i32_ty], [IntrNoMem]>;
 647 }
 648
 649 // Absolute value ops
 650 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 651   def int_x86_ssse3_pabs_b     : GCCBuiltin<"__builtin_ia32_pabsb">,
 652               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
 653   def int_x86_ssse3_pabs_b_128 : GCCBuiltin<"__builtin_ia32_pabsb128">,
 654               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
 655
 656   def int_x86_ssse3_pabs_w     : GCCBuiltin<"__builtin_ia32_pabsw">,
 657               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty], [IntrNoMem]>;
 658   def int_x86_ssse3_pabs_w_128 : GCCBuiltin<"__builtin_ia32_pabsw128">,
 659               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>;
 660
 661   def int_x86_ssse3_pabs_d     : GCCBuiltin<"__builtin_ia32_pabsd">,
 662               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty], [IntrNoMem]>;
 663   def int_x86_ssse3_pabs_d_128 : GCCBuiltin<"__builtin_ia32_pabsd128">,
 664               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 665 }
 666
 667 // Align ops
 668 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 669   def int_x86_ssse3_palign_r        : GCCBuiltin<"__builtin_ia32_palignr">,
 670               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
 671                          llvm_v1i64_ty, llvm_i16_ty], [IntrNoMem]>;
 672   def int_x86_ssse3_palign_r_128    : GCCBuiltin<"__builtin_ia32_palignr128">,
 673               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 674                          llvm_v2i64_ty, llvm_i32_ty], [IntrNoMem]>;
 675 }
 676
 677 //===----------------------------------------------------------------------===//
 678 // MMX
 679
 680 // Empty MMX state op.
 681 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 682   def int_x86_mmx_emms  : GCCBuiltin<"__builtin_ia32_emms">,
 683               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 684   def int_x86_mmx_femms : GCCBuiltin<"__builtin_ia32_femms">,
 685               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 686 }
 687
 688 // Integer arithmetic ops.
 689 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 690   // Addition
 691   def int_x86_mmx_padds_b : GCCBuiltin<"__builtin_ia32_paddsb">,
 692               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 693                          llvm_v8i8_ty], [IntrNoMem]>;
 694   def int_x86_mmx_padds_w : GCCBuiltin<"__builtin_ia32_paddsw">,
 695               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 696                          llvm_v4i16_ty], [IntrNoMem]>;
 697
 698   def int_x86_mmx_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb">,
 699               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 700                          llvm_v8i8_ty], [IntrNoMem]>;
 701   def int_x86_mmx_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw">,
 702               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 703                          llvm_v4i16_ty], [IntrNoMem]>;
 704
 705   // Subtraction
 706   def int_x86_mmx_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb">,
 707               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 708                          llvm_v8i8_ty], [IntrNoMem]>;
 709   def int_x86_mmx_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw">,
 710               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 711                          llvm_v4i16_ty], [IntrNoMem]>;
 712
 713   def int_x86_mmx_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb">,
 714               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 715                          llvm_v8i8_ty], [IntrNoMem]>;
 716   def int_x86_mmx_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw">,
 717               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 718                          llvm_v4i16_ty], [IntrNoMem]>;
 719
 720   // Multiplication
 721   def int_x86_mmx_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw">,
 722               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 723                          llvm_v4i16_ty], [IntrNoMem]>;
 724   def int_x86_mmx_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw">,
 725               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 726                          llvm_v4i16_ty], [IntrNoMem]>;
 727   def int_x86_mmx_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq">,
 728               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 729                          llvm_v2i32_ty], [IntrNoMem]>;
 730   def int_x86_mmx_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd">,
 731               Intrinsic<[llvm_v2i32_ty, llvm_v4i16_ty,
 732                          llvm_v4i16_ty], [IntrNoMem]>;
 733
 734   // Averages
 735   def int_x86_mmx_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb">,
 736               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 737                          llvm_v8i8_ty], [IntrNoMem]>;
 738   def int_x86_mmx_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw">,
 739               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 740                          llvm_v4i16_ty], [IntrNoMem]>;
 741
 742   // Maximum
 743   def int_x86_mmx_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub">,
 744               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 745                          llvm_v8i8_ty], [IntrNoMem]>;
 746   def int_x86_mmx_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw">,
 747               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 748                          llvm_v4i16_ty], [IntrNoMem]>;
 749
 750   // Minimum
 751   def int_x86_mmx_pminu_b : GCCBuiltin<"__builtin_ia32_pminub">,
 752               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 753                          llvm_v8i8_ty], [IntrNoMem]>;
 754   def int_x86_mmx_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw">,
 755               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 756                          llvm_v4i16_ty], [IntrNoMem]>;
 757
 758   // Packed sum of absolute differences
 759   def int_x86_mmx_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw">,
 760               Intrinsic<[llvm_v4i16_ty, llvm_v8i8_ty,
 761                          llvm_v8i8_ty], [IntrNoMem]>;
 762 }
 763
 764 // Integer shift ops.
 765 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 766   // Shift left logical
 767   def int_x86_mmx_psll_w : GCCBuiltin<"__builtin_ia32_psllw">,
 768               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 769                          llvm_v2i32_ty], [IntrNoMem]>;
 770   def int_x86_mmx_psll_d : GCCBuiltin<"__builtin_ia32_pslld">,
 771               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 772                          llvm_v2i32_ty], [IntrNoMem]>;
 773   def int_x86_mmx_psll_q : GCCBuiltin<"__builtin_ia32_psllq">,
 774               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 775                          llvm_v2i32_ty], [IntrNoMem]>;
 776
 777   def int_x86_mmx_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw">,
 778               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 779                          llvm_v2i32_ty], [IntrNoMem]>;
 780   def int_x86_mmx_psrl_d : GCCBuiltin<"__builtin_ia32_psrld">,
 781               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 782                          llvm_v2i32_ty], [IntrNoMem]>;
 783   def int_x86_mmx_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq">,
 784               Intrinsic<[llvm_v2i32_ty,   llvm_v2i32_ty,
 785                          llvm_v2i32_ty], [IntrNoMem]>;
 786
 787   def int_x86_mmx_psra_w : GCCBuiltin<"__builtin_ia32_psraw">,
 788               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 789                          llvm_v2i32_ty], [IntrNoMem]>;
 790   def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">,
 791               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 792                          llvm_v2i32_ty], [IntrNoMem]>;
 793 }
 794
 795 // Pack ops.
 796 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 797   def int_x86_mmx_packsswb : GCCBuiltin<"__builtin_ia32_packsswb">,
 798               Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
 799                          llvm_v4i16_ty], [IntrNoMem]>;
 800   def int_x86_mmx_packssdw : GCCBuiltin<"__builtin_ia32_packssdw">,
 801               Intrinsic<[llvm_v4i16_ty, llvm_v2i32_ty,
 802                          llvm_v2i32_ty], [IntrNoMem]>;
 803   def int_x86_mmx_packuswb : GCCBuiltin<"__builtin_ia32_packuswb">,
 804               Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
 805                          llvm_v4i16_ty], [IntrNoMem]>;
 806 }
 807
 808 // Integer comparison ops
 809 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 810   def int_x86_mmx_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb">,
 811               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 812                          llvm_v8i8_ty], [IntrNoMem]>;
 813   def int_x86_mmx_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw">,
 814               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 815                          llvm_v4i16_ty], [IntrNoMem]>;
 816   def int_x86_mmx_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd">,
 817               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 818                          llvm_v2i32_ty], [IntrNoMem]>;
 819
 820   def int_x86_mmx_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb">,
 821               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 822                          llvm_v8i8_ty], [IntrNoMem]>;
 823   def int_x86_mmx_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw">,
 824               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 825                          llvm_v4i16_ty], [IntrNoMem]>;
 826   def int_x86_mmx_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd">,
 827               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 828                          llvm_v2i32_ty], [IntrNoMem]>;
 829 }
 830
 831 // Misc.
 832 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 833   def int_x86_mmx_maskmovq : GCCBuiltin<"__builtin_ia32_maskmovq">,
 834               Intrinsic<[llvm_void_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_ptr_ty],
 835                         [IntrWriteMem]>;
 836
 837   def int_x86_mmx_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb">,
 838               Intrinsic<[llvm_i32_ty, llvm_v8i8_ty], [IntrNoMem]>;
 839
 840   def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">,
 841               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 842                          llvm_v1i64_ty], [IntrWriteMem]>;
 843 }