1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
18 #include "llvm/Target/TargetMachine.h"
24 class MachineFunctionPass;
27 class TargetRegisterClass;
33 /// Target-Independent Code Generator Pass Configuration Options.
35 /// FIXME: Why are we passing the DisableVerify flags around instead of setting
36 /// an options in the target machine, like all the other driver options?
37 class TargetPassConfig {
44 TargetPassConfig(TargetMachine *tm, PassManagerBase &pm,
45 bool DisableVerifyFlag);
47 virtual ~TargetPassConfig() {}
49 /// Get the right type of TargetMachine for this target.
50 template<typename TMC> TMC &getTM() const {
51 return *static_cast<TMC*>(TM);
54 CodeGenOpt::Level getOptLevel() const { return TM->getOptLevel(); }
56 const TargetLowering *getTargetLowering() const { return TM->getTargetLowering(); }
58 /// Add the complete, standard set of LLVM CodeGen passes.
59 /// Fully developed targets will not generally override this.
60 virtual bool addCodeGenPasses(MCContext *&OutContext);
63 /// Convenient points in the common codegen pass pipeline for inserting
64 /// passes, and major CodeGen stages that some targets may override.
67 /// addPreISelPasses - This method should add any "last minute" LLVM->LLVM
68 /// passes (which are run just before instruction selector).
69 virtual bool addPreISel() {
73 /// addInstSelector - This method should install an instruction selector pass,
74 /// which converts from LLVM code to machine instructions.
75 virtual bool addInstSelector() {
79 /// addPreRegAlloc - This method may be implemented by targets that want to
80 /// run passes immediately before register allocation. This should return
81 /// true if -print-machineinstrs should print after these passes.
82 virtual bool addPreRegAlloc() {
86 /// addPostRegAlloc - This method may be implemented by targets that want
87 /// to run passes after register allocation but before prolog-epilog
88 /// insertion. This should return true if -print-machineinstrs should print
89 /// after these passes.
90 virtual bool addPostRegAlloc() {
94 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
95 /// on this target. User flag overrides.
96 virtual bool getEnableTailMergeDefault() const { return true; }
98 /// addPreSched2 - This method may be implemented by targets that want to
99 /// run passes after prolog-epilog insertion and before the second instruction
100 /// scheduling pass. This should return true if -print-machineinstrs should
101 /// print after these passes.
102 virtual bool addPreSched2() {
106 /// addPreEmitPass - This pass may be implemented by targets that want to run
107 /// passes immediately before machine code is emitted. This should return
108 /// true if -print-machineinstrs should print out the code after the passes.
109 virtual bool addPreEmitPass() {
113 /// Utilities for targets to add passes to the pass manager.
116 /// Add a target-independent CodeGen pass at this point in the pipeline.
117 void addCommonPass(char &ID);
119 /// printNoVerify - Add a pass to dump the machine function, if debugging is
122 void printNoVerify(const char *Banner) const;
124 /// printAndVerify - Add a pass to dump then verify the machine function, if
125 /// those steps are enabled.
127 void printAndVerify(const char *Banner) const;
131 /// List of target independent CodeGen pass IDs.
133 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
134 /// work well with unreachable basic blocks (what live ranges make sense for a
135 /// block that cannot be reached?). As such, a code generator should either
136 /// not instruction select unreachable blocks, or run this pass as its
137 /// last LLVM modifying pass to clean up blocks that are not reachable from
139 FunctionPass *createUnreachableBlockEliminationPass();
141 /// MachineFunctionPrinter pass - This pass prints out the machine function to
142 /// the given stream as a debugging tool.
143 MachineFunctionPass *
144 createMachineFunctionPrinterPass(raw_ostream &OS,
145 const std::string &Banner ="");
147 /// MachineLoopInfo pass - This pass is a loop analysis pass.
149 extern char &MachineLoopInfoID;
151 /// MachineLoopRanges pass - This pass is an on-demand loop coverage
154 extern char &MachineLoopRangesID;
156 /// MachineDominators pass - This pass is a machine dominators analysis pass.
158 extern char &MachineDominatorsID;
160 /// EdgeBundles analysis - Bundle machine CFG edges.
162 extern char &EdgeBundlesID;
164 /// PHIElimination pass - This pass eliminates machine instruction PHI nodes
165 /// by inserting copy instructions. This destroys SSA information, but is the
166 /// desired input for some register allocators. This pass is "required" by
167 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
169 extern char &PHIEliminationID;
171 /// StrongPHIElimination pass - This pass eliminates machine instruction PHI
172 /// nodes by inserting copy instructions. This destroys SSA information, but
173 /// is the desired input for some register allocators. This pass is
174 /// "required" by these register allocator like this:
175 /// AU.addRequiredID(PHIEliminationID);
176 /// This pass is still in development
177 extern char &StrongPHIEliminationID;
179 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
180 extern char &LiveStacksID;
182 /// TwoAddressInstruction pass - This pass reduces two-address instructions to
183 /// use two operands. This destroys SSA information but it is desired by
184 /// register allocators.
185 extern char &TwoAddressInstructionPassID;
187 /// RegisteCoalescer pass - This pass merges live ranges to eliminate copies.
188 extern char &RegisterCoalescerPassID;
190 /// MachineScheduler pass - This pass schedules machine instructions.
191 extern char &MachineSchedulerID;
193 /// SpillPlacement analysis. Suggest optimal placement of spill code between
196 extern char &SpillPlacementID;
198 /// UnreachableMachineBlockElimination pass - This pass removes unreachable
199 /// machine basic blocks.
200 extern char &UnreachableMachineBlockElimID;
202 /// DeadMachineInstructionElim pass - This pass removes dead machine
205 FunctionPass *createDeadMachineInstructionElimPass();
207 /// Creates a register allocator as the user specified on the command line, or
208 /// picks one that matches OptLevel.
210 FunctionPass *createRegisterAllocator(CodeGenOpt::Level OptLevel);
212 /// FastRegisterAllocation Pass - This pass register allocates as fast as
213 /// possible. It is best suited for debug code where live ranges are short.
215 FunctionPass *createFastRegisterAllocator();
217 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
218 /// register allocator using the basic regalloc framework.
220 FunctionPass *createBasicRegisterAllocator();
222 /// Greedy register allocation pass - This pass implements a global register
223 /// allocator for optimized builds.
225 FunctionPass *createGreedyRegisterAllocator();
227 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
228 /// Quadratic Prograaming (PBQP) based register allocator.
230 FunctionPass *createDefaultPBQPRegisterAllocator();
232 /// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
233 /// and eliminates abstract frame references.
235 FunctionPass *createPrologEpilogCodeInserter();
237 /// ExpandPostRAPseudos Pass - This pass expands pseudo instructions after
238 /// register allocation.
240 FunctionPass *createExpandPostRAPseudosPass();
242 /// createPostRAScheduler - This pass performs post register allocation
244 FunctionPass *createPostRAScheduler(CodeGenOpt::Level OptLevel);
246 /// BranchFolding Pass - This pass performs machine code CFG based
247 /// optimizations to delete branches to branches, eliminate branches to
248 /// successor blocks (creating fall throughs), and eliminating branches over
250 FunctionPass *createBranchFoldingPass(bool DefaultEnableTailMerge);
252 /// TailDuplicate Pass - Duplicate blocks with unconditional branches
253 /// into tails of their predecessors.
254 FunctionPass *createTailDuplicatePass(bool PreRegAlloc = false);
256 /// IfConverter Pass - This pass performs machine code if conversion.
257 FunctionPass *createIfConverterPass();
259 /// MachineBlockPlacement Pass - This pass places basic blocks based on branch
261 FunctionPass *createMachineBlockPlacementPass();
263 /// MachineBlockPlacementStats Pass - This pass collects statistics about the
264 /// basic block placement using branch probabilities and block frequency
266 FunctionPass *createMachineBlockPlacementStatsPass();
268 /// Code Placement Pass - This pass optimize code placement and aligns loop
269 /// headers to target specific alignment boundary.
270 FunctionPass *createCodePlacementOptPass();
272 /// IntrinsicLowering Pass - Performs target-independent LLVM IR
273 /// transformations for highly portable strategies.
274 FunctionPass *createGCLoweringPass();
276 /// MachineCodeAnalysis Pass - Target-independent pass to mark safe points in
277 /// machine code. Must be added very late during code generation, just prior
278 /// to output, and importantly after all CFG transformations (such as branch
280 FunctionPass *createGCMachineCodeAnalysisPass();
282 /// Deleter Pass - Releases GC metadata.
284 FunctionPass *createGCInfoDeleter();
286 /// Creates a pass to print GC metadata.
288 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
290 /// createMachineCSEPass - This pass performs global CSE on machine
292 FunctionPass *createMachineCSEPass();
294 /// createMachineLICMPass - This pass performs LICM on machine instructions.
296 FunctionPass *createMachineLICMPass(bool PreRegAlloc = true);
298 /// createMachineSinkingPass - This pass performs sinking on machine
300 FunctionPass *createMachineSinkingPass();
302 /// createMachineCopyPropagationPass - This pass performs copy propagation on
303 /// machine instructions.
304 FunctionPass *createMachineCopyPropagationPass();
306 /// createPeepholeOptimizerPass - This pass performs peephole optimizations -
307 /// like extension and comparison eliminations.
308 FunctionPass *createPeepholeOptimizerPass();
310 /// createOptimizePHIsPass - This pass optimizes machine instruction PHIs
311 /// to take advantage of opportunities created during DAG legalization.
312 FunctionPass *createOptimizePHIsPass();
314 /// createStackSlotColoringPass - This pass performs stack slot coloring.
315 FunctionPass *createStackSlotColoringPass(bool);
317 /// createStackProtectorPass - This pass adds stack protectors to functions.
318 FunctionPass *createStackProtectorPass(const TargetLowering *tli);
320 /// createMachineVerifierPass - This pass verifies cenerated machine code
321 /// instructions for correctness.
322 FunctionPass *createMachineVerifierPass(const char *Banner = 0);
324 /// createDwarfEHPass - This pass mulches exception handling code into a form
325 /// adapted to code generation. Required if using dwarf exception handling.
326 FunctionPass *createDwarfEHPass(const TargetMachine *tm);
328 /// createSjLjEHPass - This pass adapts exception handling code to use
329 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
330 FunctionPass *createSjLjEHPass(const TargetLowering *tli);
332 /// createLocalStackSlotAllocationPass - This pass assigns local frame
333 /// indices to stack slots relative to one another and allocates
334 /// base registers to access them when it is estimated by the target to
335 /// be out of range of normal frame pointer or stack pointer index
337 FunctionPass *createLocalStackSlotAllocationPass();
339 /// createExpandISelPseudosPass - This pass expands pseudo-instructions.
341 FunctionPass *createExpandISelPseudosPass();
343 /// createExecutionDependencyFixPass - This pass fixes execution time
344 /// problems with dependent instructions, such as switching execution
345 /// domains to match.
347 /// The pass will examine instructions using and defining registers in RC.
349 FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
351 /// createUnpackMachineBundles - This pass unpack machine instruction bundles.
353 FunctionPass *createUnpackMachineBundlesPass();
355 /// createFinalizeMachineBundles - This pass finalize machine instruction
356 /// bundles (created earlier, e.g. during pre-RA scheduling).
358 FunctionPass *createFinalizeMachineBundlesPass();
360 } // End llvm namespace