1 //===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineOperand class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_MACHINEOPERAND_H
15 #define LLVM_CODEGEN_MACHINEOPERAND_H
17 #include "llvm/Support/DataTypes.h"
26 class MachineBasicBlock;
28 class MachineRegisterInfo;
31 class TargetRegisterInfo;
35 /// MachineOperand class - Representation of each machine instruction operand.
37 class MachineOperand {
39 enum MachineOperandType {
40 MO_Register, ///< Register operand.
41 MO_Immediate, ///< Immediate operand
42 MO_CImmediate, ///< Immediate >64bit operand
43 MO_FPImmediate, ///< Floating-point immediate operand
44 MO_MachineBasicBlock, ///< MachineBasicBlock reference
45 MO_FrameIndex, ///< Abstract Stack Frame Index
46 MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool
47 MO_JumpTableIndex, ///< Address of indexed Jump Table for switch
48 MO_ExternalSymbol, ///< Name of external global symbol
49 MO_GlobalAddress, ///< Address of a global value
50 MO_BlockAddress, ///< Address of a basic block
51 MO_RegisterMask, ///< Mask of preserved registers.
52 MO_Metadata, ///< Metadata reference (for debug info)
53 MO_MCSymbol ///< MCSymbol reference (for debug/eh info)
57 /// OpKind - Specify what kind of operand this is. This discriminates the
59 unsigned char OpKind; // MachineOperandType
61 /// SubReg - Subregister number, only valid for MO_Register. A value of 0
62 /// indicates the MO_Register has no subReg.
65 /// TargetFlags - This is a set of target-specific operand flags.
66 unsigned char TargetFlags;
68 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
71 /// IsDef - True if this is a def, false if this is a use of the register.
75 /// IsImp - True if this is an implicit def or use, false if it is explicit.
79 /// IsKill - True if this instruction is the last use of the register on this
80 /// path through the function. This is only valid on uses of registers.
83 /// IsDead - True if this register is never used by a subsequent instruction.
84 /// This is only valid on definitions of registers.
87 /// IsUndef - True if this register operand reads an "undef" value, i.e. the
88 /// read value doesn't matter. This flag can be set on both use and def
89 /// operands. On a sub-register def operand, it refers to the part of the
90 /// register that isn't written. On a full-register def operand, it is a
91 /// noop. See readsReg().
93 /// This is only valid on registers.
95 /// Note that an instruction may have multiple <undef> operands referring to
96 /// the same register. In that case, the instruction may depend on those
97 /// operands reading the same dont-care value. For example:
99 /// %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef>
101 /// Any register can be used for %vreg2, and its value doesn't matter, but
102 /// the two operands must be the same register.
106 /// IsInternalRead - True if this operand reads a value that was defined
107 /// inside the same instruction or bundle. This flag can be set on both use
108 /// and def operands. On a sub-register def operand, it refers to the part
109 /// of the register that isn't written. On a full-register def operand, it
112 /// When this flag is set, the instruction bundle must contain at least one
113 /// other def of the register. If multiple instructions in the bundle define
114 /// the register, the meaning is target-defined.
115 bool IsInternalRead : 1;
117 /// IsEarlyClobber - True if this MO_Register 'def' operand is written to
118 /// by the MachineInstr before all input registers are read. This is used to
119 /// model the GCC inline asm '&' constraint modifier.
120 bool IsEarlyClobber : 1;
122 /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
123 /// not a real instruction. Such uses should be ignored during codegen.
126 /// SmallContents - This really should be part of the Contents union, but
127 /// lives out here so we can get a better packed struct.
128 /// MO_Register: Register number.
129 /// OffsetedInfo: Low bits of offset.
131 unsigned RegNo; // For MO_Register.
132 unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi.
135 /// ParentMI - This is the instruction that this operand is embedded into.
136 /// This is valid for all operand types, when the operand is in an instr.
137 MachineInstr *ParentMI;
139 /// Contents union - This contains the payload for the various operand types.
141 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
142 const ConstantFP *CFP; // For MO_FPImmediate.
143 const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
144 int64_t ImmVal; // For MO_Immediate.
145 const uint32_t *RegMask; // For MO_RegisterMask.
146 const MDNode *MD; // For MO_Metadata.
147 MCSymbol *Sym; // For MO_MCSymbol
149 struct { // For MO_Register.
150 // Register number is in SmallContents.RegNo.
151 MachineOperand **Prev; // Access list for register.
152 MachineOperand *Next;
155 /// OffsetedInfo - This struct contains the offset and an object identifier.
156 /// this represent the object as with an optional offset from it.
159 int Index; // For MO_*Index - The index itself.
160 const char *SymbolName; // For MO_ExternalSymbol.
161 const GlobalValue *GV; // For MO_GlobalAddress.
162 const BlockAddress *BA; // For MO_BlockAddress.
164 // Low bits of offset are in SmallContents.OffsetLo.
165 int OffsetHi; // An offset from the object, high 32 bits.
169 explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {
173 /// getType - Returns the MachineOperandType for this operand.
175 MachineOperandType getType() const { return (MachineOperandType)OpKind; }
177 unsigned char getTargetFlags() const { return TargetFlags; }
178 void setTargetFlags(unsigned char F) { TargetFlags = F; }
179 void addTargetFlag(unsigned char F) { TargetFlags |= F; }
182 /// getParent - Return the instruction that this operand belongs to.
184 MachineInstr *getParent() { return ParentMI; }
185 const MachineInstr *getParent() const { return ParentMI; }
187 /// clearParent - Reset the parent pointer.
189 /// The MachineOperand copy constructor also copies ParentMI, expecting the
190 /// original to be deleted. If a MachineOperand is ever stored outside a
191 /// MachineInstr, the parent pointer must be cleared.
193 /// Never call clearParent() on an operand in a MachineInstr.
195 void clearParent() { ParentMI = 0; }
197 void print(raw_ostream &os, const TargetMachine *TM = 0) const;
199 //===--------------------------------------------------------------------===//
200 // Accessors that tell you what kind of MachineOperand you're looking at.
201 //===--------------------------------------------------------------------===//
203 /// isReg - Tests if this is a MO_Register operand.
204 bool isReg() const { return OpKind == MO_Register; }
205 /// isImm - Tests if this is a MO_Immediate operand.
206 bool isImm() const { return OpKind == MO_Immediate; }
207 /// isCImm - Test if t his is a MO_CImmediate operand.
208 bool isCImm() const { return OpKind == MO_CImmediate; }
209 /// isFPImm - Tests if this is a MO_FPImmediate operand.
210 bool isFPImm() const { return OpKind == MO_FPImmediate; }
211 /// isMBB - Tests if this is a MO_MachineBasicBlock operand.
212 bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
213 /// isFI - Tests if this is a MO_FrameIndex operand.
214 bool isFI() const { return OpKind == MO_FrameIndex; }
215 /// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
216 bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
217 /// isJTI - Tests if this is a MO_JumpTableIndex operand.
218 bool isJTI() const { return OpKind == MO_JumpTableIndex; }
219 /// isGlobal - Tests if this is a MO_GlobalAddress operand.
220 bool isGlobal() const { return OpKind == MO_GlobalAddress; }
221 /// isSymbol - Tests if this is a MO_ExternalSymbol operand.
222 bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
223 /// isBlockAddress - Tests if this is a MO_BlockAddress operand.
224 bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
225 /// isRegMask - Tests if this is a MO_RegisterMask operand.
226 bool isRegMask() const { return OpKind == MO_RegisterMask; }
227 /// isMetadata - Tests if this is a MO_Metadata operand.
228 bool isMetadata() const { return OpKind == MO_Metadata; }
229 bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
232 //===--------------------------------------------------------------------===//
233 // Accessors for Register Operands
234 //===--------------------------------------------------------------------===//
236 /// getReg - Returns the register number.
237 unsigned getReg() const {
238 assert(isReg() && "This is not a register operand!");
239 return SmallContents.RegNo;
242 unsigned getSubReg() const {
243 assert(isReg() && "Wrong MachineOperand accessor");
244 return (unsigned)SubReg;
248 assert(isReg() && "Wrong MachineOperand accessor");
253 assert(isReg() && "Wrong MachineOperand accessor");
257 bool isImplicit() const {
258 assert(isReg() && "Wrong MachineOperand accessor");
262 bool isDead() const {
263 assert(isReg() && "Wrong MachineOperand accessor");
267 bool isKill() const {
268 assert(isReg() && "Wrong MachineOperand accessor");
272 bool isUndef() const {
273 assert(isReg() && "Wrong MachineOperand accessor");
277 bool isInternalRead() const {
278 assert(isReg() && "Wrong MachineOperand accessor");
279 return IsInternalRead;
282 bool isEarlyClobber() const {
283 assert(isReg() && "Wrong MachineOperand accessor");
284 return IsEarlyClobber;
287 bool isDebug() const {
288 assert(isReg() && "Wrong MachineOperand accessor");
292 /// readsReg - Returns true if this operand reads the previous value of its
293 /// register. A use operand with the <undef> flag set doesn't read its
294 /// register. A sub-register def implicitly reads the other parts of the
295 /// register being redefined unless the <undef> flag is set.
297 /// This refers to reading the register value from before the current
298 /// instruction or bundle. Internal bundle reads are not included.
299 bool readsReg() const {
300 assert(isReg() && "Wrong MachineOperand accessor");
301 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
304 /// getNextOperandForReg - Return the next MachineOperand in the function that
305 /// uses or defines this register.
306 MachineOperand *getNextOperandForReg() const {
307 assert(isReg() && "This is not a register operand!");
308 return Contents.Reg.Next;
311 //===--------------------------------------------------------------------===//
312 // Mutators for Register Operands
313 //===--------------------------------------------------------------------===//
315 /// Change the register this operand corresponds to.
317 void setReg(unsigned Reg);
319 void setSubReg(unsigned subReg) {
320 assert(isReg() && "Wrong MachineOperand accessor");
321 SubReg = (unsigned char)subReg;
324 /// substVirtReg - Substitute the current register with the virtual
325 /// subregister Reg:SubReg. Take any existing SubReg index into account,
326 /// using TargetRegisterInfo to compose the subreg indices if necessary.
327 /// Reg must be a virtual register, SubIdx can be 0.
329 void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
331 /// substPhysReg - Substitute the current register with the physical register
332 /// Reg, taking any existing SubReg into account. For instance,
333 /// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL.
335 void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
337 void setIsUse(bool Val = true) {
338 assert(isReg() && "Wrong MachineOperand accessor");
339 assert((Val || !isDebug()) && "Marking a debug operation as def");
343 void setIsDef(bool Val = true) {
344 assert(isReg() && "Wrong MachineOperand accessor");
345 assert((!Val || !isDebug()) && "Marking a debug operation as def");
349 void setImplicit(bool Val = true) {
350 assert(isReg() && "Wrong MachineOperand accessor");
354 void setIsKill(bool Val = true) {
355 assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
356 assert((!Val || !isDebug()) && "Marking a debug operation as kill");
360 void setIsDead(bool Val = true) {
361 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
365 void setIsUndef(bool Val = true) {
366 assert(isReg() && "Wrong MachineOperand accessor");
370 void setIsInternalRead(bool Val = true) {
371 assert(isReg() && "Wrong MachineOperand accessor");
372 IsInternalRead = Val;
375 void setIsEarlyClobber(bool Val = true) {
376 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
377 IsEarlyClobber = Val;
380 void setIsDebug(bool Val = true) {
381 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
385 //===--------------------------------------------------------------------===//
386 // Accessors for various operand types.
387 //===--------------------------------------------------------------------===//
389 int64_t getImm() const {
390 assert(isImm() && "Wrong MachineOperand accessor");
391 return Contents.ImmVal;
394 const ConstantInt *getCImm() const {
395 assert(isCImm() && "Wrong MachineOperand accessor");
399 const ConstantFP *getFPImm() const {
400 assert(isFPImm() && "Wrong MachineOperand accessor");
404 MachineBasicBlock *getMBB() const {
405 assert(isMBB() && "Wrong MachineOperand accessor");
409 int getIndex() const {
410 assert((isFI() || isCPI() || isJTI()) &&
411 "Wrong MachineOperand accessor");
412 return Contents.OffsetedInfo.Val.Index;
415 const GlobalValue *getGlobal() const {
416 assert(isGlobal() && "Wrong MachineOperand accessor");
417 return Contents.OffsetedInfo.Val.GV;
420 const BlockAddress *getBlockAddress() const {
421 assert(isBlockAddress() && "Wrong MachineOperand accessor");
422 return Contents.OffsetedInfo.Val.BA;
425 MCSymbol *getMCSymbol() const {
426 assert(isMCSymbol() && "Wrong MachineOperand accessor");
430 /// getOffset - Return the offset from the symbol in this operand. This always
431 /// returns 0 for ExternalSymbol operands.
432 int64_t getOffset() const {
433 assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) &&
434 "Wrong MachineOperand accessor");
435 return (int64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
436 SmallContents.OffsetLo;
439 const char *getSymbolName() const {
440 assert(isSymbol() && "Wrong MachineOperand accessor");
441 return Contents.OffsetedInfo.Val.SymbolName;
444 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
445 bool clobbersPhysReg(unsigned PhysReg) const {
446 assert(isRegMask() && "Wrong MachineOperand accessor");
447 // See TargetRegisterInfo.h.
448 assert(PhysReg < (1u << 30) && "Not a physical register");
449 return !(Contents.RegMask[PhysReg / 32] & (1u << PhysReg % 32));
452 /// getRegMask - Returns a bit mask of registers preserved by this RegMask
454 const uint32_t *getRegMask() const {
455 assert(isRegMask() && "Wrong MachineOperand accessor");
456 return Contents.RegMask;
459 const MDNode *getMetadata() const {
460 assert(isMetadata() && "Wrong MachineOperand accessor");
464 //===--------------------------------------------------------------------===//
465 // Mutators for various operand types.
466 //===--------------------------------------------------------------------===//
468 void setImm(int64_t immVal) {
469 assert(isImm() && "Wrong MachineOperand mutator");
470 Contents.ImmVal = immVal;
473 void setOffset(int64_t Offset) {
474 assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) &&
475 "Wrong MachineOperand accessor");
476 SmallContents.OffsetLo = unsigned(Offset);
477 Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
480 void setIndex(int Idx) {
481 assert((isFI() || isCPI() || isJTI()) &&
482 "Wrong MachineOperand accessor");
483 Contents.OffsetedInfo.Val.Index = Idx;
486 void setMBB(MachineBasicBlock *MBB) {
487 assert(isMBB() && "Wrong MachineOperand accessor");
491 //===--------------------------------------------------------------------===//
493 //===--------------------------------------------------------------------===//
495 /// isIdenticalTo - Return true if this operand is identical to the specified
496 /// operand. Note: This method ignores isKill and isDead properties.
497 bool isIdenticalTo(const MachineOperand &Other) const;
499 /// ChangeToImmediate - Replace this operand with a new immediate operand of
500 /// the specified value. If an operand is known to be an immediate already,
501 /// the setImm method should be used.
502 void ChangeToImmediate(int64_t ImmVal);
504 /// ChangeToRegister - Replace this operand with a new register operand of
505 /// the specified value. If an operand is known to be an register already,
506 /// the setReg method should be used.
507 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
508 bool isKill = false, bool isDead = false,
509 bool isUndef = false, bool isDebug = false);
511 //===--------------------------------------------------------------------===//
512 // Construction methods.
513 //===--------------------------------------------------------------------===//
515 static MachineOperand CreateImm(int64_t Val) {
516 MachineOperand Op(MachineOperand::MO_Immediate);
521 static MachineOperand CreateCImm(const ConstantInt *CI) {
522 MachineOperand Op(MachineOperand::MO_CImmediate);
527 static MachineOperand CreateFPImm(const ConstantFP *CFP) {
528 MachineOperand Op(MachineOperand::MO_FPImmediate);
529 Op.Contents.CFP = CFP;
533 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
534 bool isKill = false, bool isDead = false,
535 bool isUndef = false,
536 bool isEarlyClobber = false,
538 bool isDebug = false) {
539 MachineOperand Op(MachineOperand::MO_Register);
544 Op.IsUndef = isUndef;
545 Op.IsInternalRead = false;
546 Op.IsEarlyClobber = isEarlyClobber;
547 Op.IsDebug = isDebug;
548 Op.SmallContents.RegNo = Reg;
549 Op.Contents.Reg.Prev = 0;
550 Op.Contents.Reg.Next = 0;
554 static MachineOperand CreateMBB(MachineBasicBlock *MBB,
555 unsigned char TargetFlags = 0) {
556 MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
558 Op.setTargetFlags(TargetFlags);
561 static MachineOperand CreateFI(int Idx) {
562 MachineOperand Op(MachineOperand::MO_FrameIndex);
566 static MachineOperand CreateCPI(unsigned Idx, int Offset,
567 unsigned char TargetFlags = 0) {
568 MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
570 Op.setOffset(Offset);
571 Op.setTargetFlags(TargetFlags);
574 static MachineOperand CreateJTI(unsigned Idx,
575 unsigned char TargetFlags = 0) {
576 MachineOperand Op(MachineOperand::MO_JumpTableIndex);
578 Op.setTargetFlags(TargetFlags);
581 static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
582 unsigned char TargetFlags = 0) {
583 MachineOperand Op(MachineOperand::MO_GlobalAddress);
584 Op.Contents.OffsetedInfo.Val.GV = GV;
585 Op.setOffset(Offset);
586 Op.setTargetFlags(TargetFlags);
589 static MachineOperand CreateES(const char *SymName,
590 unsigned char TargetFlags = 0) {
591 MachineOperand Op(MachineOperand::MO_ExternalSymbol);
592 Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
593 Op.setOffset(0); // Offset is always 0.
594 Op.setTargetFlags(TargetFlags);
597 static MachineOperand CreateBA(const BlockAddress *BA,
598 unsigned char TargetFlags = 0) {
599 MachineOperand Op(MachineOperand::MO_BlockAddress);
600 Op.Contents.OffsetedInfo.Val.BA = BA;
601 Op.setOffset(0); // Offset is always 0.
602 Op.setTargetFlags(TargetFlags);
605 /// CreateRegMask - Creates a register mask operand referencing Mask. The
606 /// operand does not take ownership of the memory referenced by Mask, it must
607 /// remain valid for the lifetime of the operand.
609 /// A RegMask operand represents a set of non-clobbered physical registers on
610 /// an instruction that clobbers many registers, typically a call. The bit
611 /// mask has a bit set for each physreg that is preserved by this
612 /// instruction, as described in the documentation for
613 /// TargetRegisterInfo::getCallPreservedMask().
615 /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
617 static MachineOperand CreateRegMask(const uint32_t *Mask) {
618 assert(Mask && "Missing register mask");
619 MachineOperand Op(MachineOperand::MO_RegisterMask);
620 Op.Contents.RegMask = Mask;
623 static MachineOperand CreateMetadata(const MDNode *Meta) {
624 MachineOperand Op(MachineOperand::MO_Metadata);
625 Op.Contents.MD = Meta;
629 static MachineOperand CreateMCSymbol(MCSymbol *Sym) {
630 MachineOperand Op(MachineOperand::MO_MCSymbol);
631 Op.Contents.Sym = Sym;
635 friend class MachineInstr;
636 friend class MachineRegisterInfo;
638 //===--------------------------------------------------------------------===//
639 // Methods for handling register use/def lists.
640 //===--------------------------------------------------------------------===//
642 /// isOnRegUseList - Return true if this operand is on a register use/def list
643 /// or false if not. This can only be called for register operands that are
644 /// part of a machine instruction.
645 bool isOnRegUseList() const {
646 assert(isReg() && "Can only add reg operand to use lists");
647 return Contents.Reg.Prev != 0;
650 /// AddRegOperandToRegInfo - Add this register operand to the specified
651 /// MachineRegisterInfo. If it is null, then the next/prev fields should be
652 /// explicitly nulled out.
653 void AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo);
655 /// RemoveRegOperandFromRegInfo - Remove this register operand from the
656 /// MachineRegisterInfo it is linked with.
657 void RemoveRegOperandFromRegInfo();
660 inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
665 } // End llvm namespace