1 //===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineOperand class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_MACHINEOPERAND_H
15 #define LLVM_CODEGEN_MACHINEOPERAND_H
17 #include "llvm/ADT/Hashing.h"
18 #include "llvm/Support/DataTypes.h"
27 class MachineBasicBlock;
29 class MachineRegisterInfo;
32 class TargetRegisterInfo;
36 /// MachineOperand class - Representation of each machine instruction operand.
38 class MachineOperand {
40 enum MachineOperandType {
41 MO_Register, ///< Register operand.
42 MO_Immediate, ///< Immediate operand
43 MO_CImmediate, ///< Immediate >64bit operand
44 MO_FPImmediate, ///< Floating-point immediate operand
45 MO_MachineBasicBlock, ///< MachineBasicBlock reference
46 MO_FrameIndex, ///< Abstract Stack Frame Index
47 MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool
48 MO_TargetIndex, ///< Target-dependent index+offset operand.
49 MO_JumpTableIndex, ///< Address of indexed Jump Table for switch
50 MO_ExternalSymbol, ///< Name of external global symbol
51 MO_GlobalAddress, ///< Address of a global value
52 MO_BlockAddress, ///< Address of a basic block
53 MO_RegisterMask, ///< Mask of preserved registers.
54 MO_Metadata, ///< Metadata reference (for debug info)
55 MO_MCSymbol ///< MCSymbol reference (for debug/eh info)
59 /// OpKind - Specify what kind of operand this is. This discriminates the
61 unsigned char OpKind; // MachineOperandType
63 // This union is discriminated by OpKind.
65 /// SubReg - Subregister number, only valid for MO_Register. A value of 0
66 /// indicates the MO_Register has no subReg.
69 /// TargetFlags - This is a set of target-specific operand flags.
70 unsigned char TargetFlags;
73 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
76 /// IsDef - True if this is a def, false if this is a use of the register.
80 /// IsImp - True if this is an implicit def or use, false if it is explicit.
84 /// IsKill - True if this instruction is the last use of the register on this
85 /// path through the function. This is only valid on uses of registers.
88 /// IsDead - True if this register is never used by a subsequent instruction.
89 /// This is only valid on definitions of registers.
92 /// IsUndef - True if this register operand reads an "undef" value, i.e. the
93 /// read value doesn't matter. This flag can be set on both use and def
94 /// operands. On a sub-register def operand, it refers to the part of the
95 /// register that isn't written. On a full-register def operand, it is a
96 /// noop. See readsReg().
98 /// This is only valid on registers.
100 /// Note that an instruction may have multiple <undef> operands referring to
101 /// the same register. In that case, the instruction may depend on those
102 /// operands reading the same dont-care value. For example:
104 /// %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef>
106 /// Any register can be used for %vreg2, and its value doesn't matter, but
107 /// the two operands must be the same register.
111 /// IsInternalRead - True if this operand reads a value that was defined
112 /// inside the same instruction or bundle. This flag can be set on both use
113 /// and def operands. On a sub-register def operand, it refers to the part
114 /// of the register that isn't written. On a full-register def operand, it
117 /// When this flag is set, the instruction bundle must contain at least one
118 /// other def of the register. If multiple instructions in the bundle define
119 /// the register, the meaning is target-defined.
120 bool IsInternalRead : 1;
122 /// IsEarlyClobber - True if this MO_Register 'def' operand is written to
123 /// by the MachineInstr before all input registers are read. This is used to
124 /// model the GCC inline asm '&' constraint modifier.
125 bool IsEarlyClobber : 1;
127 /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
128 /// not a real instruction. Such uses should be ignored during codegen.
131 /// SmallContents - This really should be part of the Contents union, but
132 /// lives out here so we can get a better packed struct.
133 /// MO_Register: Register number.
134 /// OffsetedInfo: Low bits of offset.
136 unsigned RegNo; // For MO_Register.
137 unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi.
140 /// ParentMI - This is the instruction that this operand is embedded into.
141 /// This is valid for all operand types, when the operand is in an instr.
142 MachineInstr *ParentMI;
144 /// Contents union - This contains the payload for the various operand types.
146 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
147 const ConstantFP *CFP; // For MO_FPImmediate.
148 const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
149 int64_t ImmVal; // For MO_Immediate.
150 const uint32_t *RegMask; // For MO_RegisterMask.
151 const MDNode *MD; // For MO_Metadata.
152 MCSymbol *Sym; // For MO_MCSymbol
154 struct { // For MO_Register.
155 // Register number is in SmallContents.RegNo.
156 MachineOperand *Prev; // Access list for register. See MRI.
157 MachineOperand *Next;
160 /// OffsetedInfo - This struct contains the offset and an object identifier.
161 /// this represent the object as with an optional offset from it.
164 int Index; // For MO_*Index - The index itself.
165 const char *SymbolName; // For MO_ExternalSymbol.
166 const GlobalValue *GV; // For MO_GlobalAddress.
167 const BlockAddress *BA; // For MO_BlockAddress.
169 // Low bits of offset are in SmallContents.OffsetLo.
170 int OffsetHi; // An offset from the object, high 32 bits.
174 explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {
178 /// getType - Returns the MachineOperandType for this operand.
180 MachineOperandType getType() const { return (MachineOperandType)OpKind; }
182 unsigned char getTargetFlags() const {
183 return isReg() ? 0 : TargetFlags;
185 void setTargetFlags(unsigned char F) {
186 assert(!isReg() && "Register operands can't have target flags");
189 void addTargetFlag(unsigned char F) {
190 assert(!isReg() && "Register operands can't have target flags");
195 /// getParent - Return the instruction that this operand belongs to.
197 MachineInstr *getParent() { return ParentMI; }
198 const MachineInstr *getParent() const { return ParentMI; }
200 /// clearParent - Reset the parent pointer.
202 /// The MachineOperand copy constructor also copies ParentMI, expecting the
203 /// original to be deleted. If a MachineOperand is ever stored outside a
204 /// MachineInstr, the parent pointer must be cleared.
206 /// Never call clearParent() on an operand in a MachineInstr.
208 void clearParent() { ParentMI = 0; }
210 void print(raw_ostream &os, const TargetMachine *TM = 0) const;
212 //===--------------------------------------------------------------------===//
213 // Accessors that tell you what kind of MachineOperand you're looking at.
214 //===--------------------------------------------------------------------===//
216 /// isReg - Tests if this is a MO_Register operand.
217 bool isReg() const { return OpKind == MO_Register; }
218 /// isImm - Tests if this is a MO_Immediate operand.
219 bool isImm() const { return OpKind == MO_Immediate; }
220 /// isCImm - Test if t his is a MO_CImmediate operand.
221 bool isCImm() const { return OpKind == MO_CImmediate; }
222 /// isFPImm - Tests if this is a MO_FPImmediate operand.
223 bool isFPImm() const { return OpKind == MO_FPImmediate; }
224 /// isMBB - Tests if this is a MO_MachineBasicBlock operand.
225 bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
226 /// isFI - Tests if this is a MO_FrameIndex operand.
227 bool isFI() const { return OpKind == MO_FrameIndex; }
228 /// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
229 bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
230 /// isTargetIndex - Tests if this is a MO_TargetIndex operand.
231 bool isTargetIndex() const { return OpKind == MO_TargetIndex; }
232 /// isJTI - Tests if this is a MO_JumpTableIndex operand.
233 bool isJTI() const { return OpKind == MO_JumpTableIndex; }
234 /// isGlobal - Tests if this is a MO_GlobalAddress operand.
235 bool isGlobal() const { return OpKind == MO_GlobalAddress; }
236 /// isSymbol - Tests if this is a MO_ExternalSymbol operand.
237 bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
238 /// isBlockAddress - Tests if this is a MO_BlockAddress operand.
239 bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
240 /// isRegMask - Tests if this is a MO_RegisterMask operand.
241 bool isRegMask() const { return OpKind == MO_RegisterMask; }
242 /// isMetadata - Tests if this is a MO_Metadata operand.
243 bool isMetadata() const { return OpKind == MO_Metadata; }
244 bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
247 //===--------------------------------------------------------------------===//
248 // Accessors for Register Operands
249 //===--------------------------------------------------------------------===//
251 /// getReg - Returns the register number.
252 unsigned getReg() const {
253 assert(isReg() && "This is not a register operand!");
254 return SmallContents.RegNo;
257 unsigned getSubReg() const {
258 assert(isReg() && "Wrong MachineOperand accessor");
259 return (unsigned)SubReg;
263 assert(isReg() && "Wrong MachineOperand accessor");
268 assert(isReg() && "Wrong MachineOperand accessor");
272 bool isImplicit() const {
273 assert(isReg() && "Wrong MachineOperand accessor");
277 bool isDead() const {
278 assert(isReg() && "Wrong MachineOperand accessor");
282 bool isKill() const {
283 assert(isReg() && "Wrong MachineOperand accessor");
287 bool isUndef() const {
288 assert(isReg() && "Wrong MachineOperand accessor");
292 bool isInternalRead() const {
293 assert(isReg() && "Wrong MachineOperand accessor");
294 return IsInternalRead;
297 bool isEarlyClobber() const {
298 assert(isReg() && "Wrong MachineOperand accessor");
299 return IsEarlyClobber;
302 bool isDebug() const {
303 assert(isReg() && "Wrong MachineOperand accessor");
307 /// readsReg - Returns true if this operand reads the previous value of its
308 /// register. A use operand with the <undef> flag set doesn't read its
309 /// register. A sub-register def implicitly reads the other parts of the
310 /// register being redefined unless the <undef> flag is set.
312 /// This refers to reading the register value from before the current
313 /// instruction or bundle. Internal bundle reads are not included.
314 bool readsReg() const {
315 assert(isReg() && "Wrong MachineOperand accessor");
316 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
319 //===--------------------------------------------------------------------===//
320 // Mutators for Register Operands
321 //===--------------------------------------------------------------------===//
323 /// Change the register this operand corresponds to.
325 void setReg(unsigned Reg);
327 void setSubReg(unsigned subReg) {
328 assert(isReg() && "Wrong MachineOperand accessor");
329 SubReg = (unsigned char)subReg;
332 /// substVirtReg - Substitute the current register with the virtual
333 /// subregister Reg:SubReg. Take any existing SubReg index into account,
334 /// using TargetRegisterInfo to compose the subreg indices if necessary.
335 /// Reg must be a virtual register, SubIdx can be 0.
337 void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
339 /// substPhysReg - Substitute the current register with the physical register
340 /// Reg, taking any existing SubReg into account. For instance,
341 /// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL.
343 void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
345 void setIsUse(bool Val = true) { setIsDef(!Val); }
347 void setIsDef(bool Val = true);
349 void setImplicit(bool Val = true) {
350 assert(isReg() && "Wrong MachineOperand accessor");
354 void setIsKill(bool Val = true) {
355 assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
356 assert((!Val || !isDebug()) && "Marking a debug operation as kill");
360 void setIsDead(bool Val = true) {
361 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
365 void setIsUndef(bool Val = true) {
366 assert(isReg() && "Wrong MachineOperand accessor");
370 void setIsInternalRead(bool Val = true) {
371 assert(isReg() && "Wrong MachineOperand accessor");
372 IsInternalRead = Val;
375 void setIsEarlyClobber(bool Val = true) {
376 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
377 IsEarlyClobber = Val;
380 void setIsDebug(bool Val = true) {
381 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
385 //===--------------------------------------------------------------------===//
386 // Accessors for various operand types.
387 //===--------------------------------------------------------------------===//
389 int64_t getImm() const {
390 assert(isImm() && "Wrong MachineOperand accessor");
391 return Contents.ImmVal;
394 const ConstantInt *getCImm() const {
395 assert(isCImm() && "Wrong MachineOperand accessor");
399 const ConstantFP *getFPImm() const {
400 assert(isFPImm() && "Wrong MachineOperand accessor");
404 MachineBasicBlock *getMBB() const {
405 assert(isMBB() && "Wrong MachineOperand accessor");
409 int getIndex() const {
410 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
411 "Wrong MachineOperand accessor");
412 return Contents.OffsetedInfo.Val.Index;
415 const GlobalValue *getGlobal() const {
416 assert(isGlobal() && "Wrong MachineOperand accessor");
417 return Contents.OffsetedInfo.Val.GV;
420 const BlockAddress *getBlockAddress() const {
421 assert(isBlockAddress() && "Wrong MachineOperand accessor");
422 return Contents.OffsetedInfo.Val.BA;
425 MCSymbol *getMCSymbol() const {
426 assert(isMCSymbol() && "Wrong MachineOperand accessor");
430 /// getOffset - Return the offset from the symbol in this operand. This always
431 /// returns 0 for ExternalSymbol operands.
432 int64_t getOffset() const {
433 assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() ||
434 isBlockAddress()) && "Wrong MachineOperand accessor");
435 return int64_t(uint64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
436 SmallContents.OffsetLo;
439 const char *getSymbolName() const {
440 assert(isSymbol() && "Wrong MachineOperand accessor");
441 return Contents.OffsetedInfo.Val.SymbolName;
444 /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
445 /// It is sometimes necessary to detach the register mask pointer from its
446 /// machine operand. This static method can be used for such detached bit
448 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
449 // See TargetRegisterInfo.h.
450 assert(PhysReg < (1u << 30) && "Not a physical register");
451 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
454 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
455 bool clobbersPhysReg(unsigned PhysReg) const {
456 return clobbersPhysReg(getRegMask(), PhysReg);
459 /// getRegMask - Returns a bit mask of registers preserved by this RegMask
461 const uint32_t *getRegMask() const {
462 assert(isRegMask() && "Wrong MachineOperand accessor");
463 return Contents.RegMask;
466 const MDNode *getMetadata() const {
467 assert(isMetadata() && "Wrong MachineOperand accessor");
471 //===--------------------------------------------------------------------===//
472 // Mutators for various operand types.
473 //===--------------------------------------------------------------------===//
475 void setImm(int64_t immVal) {
476 assert(isImm() && "Wrong MachineOperand mutator");
477 Contents.ImmVal = immVal;
480 void setOffset(int64_t Offset) {
481 assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() ||
482 isBlockAddress()) && "Wrong MachineOperand accessor");
483 SmallContents.OffsetLo = unsigned(Offset);
484 Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
487 void setIndex(int Idx) {
488 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
489 "Wrong MachineOperand accessor");
490 Contents.OffsetedInfo.Val.Index = Idx;
493 void setMBB(MachineBasicBlock *MBB) {
494 assert(isMBB() && "Wrong MachineOperand accessor");
498 //===--------------------------------------------------------------------===//
500 //===--------------------------------------------------------------------===//
502 /// isIdenticalTo - Return true if this operand is identical to the specified
503 /// operand. Note: This method ignores isKill and isDead properties.
504 bool isIdenticalTo(const MachineOperand &Other) const;
506 /// \brief MachineOperand hash_value overload.
508 /// Note that this includes the same information in the hash that
509 /// isIdenticalTo uses for comparison. It is thus suited for use in hash
510 /// tables which use that function for equality comparisons only.
511 friend hash_code hash_value(const MachineOperand &MO);
513 /// ChangeToImmediate - Replace this operand with a new immediate operand of
514 /// the specified value. If an operand is known to be an immediate already,
515 /// the setImm method should be used.
516 void ChangeToImmediate(int64_t ImmVal);
518 /// ChangeToRegister - Replace this operand with a new register operand of
519 /// the specified value. If an operand is known to be an register already,
520 /// the setReg method should be used.
521 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
522 bool isKill = false, bool isDead = false,
523 bool isUndef = false, bool isDebug = false);
525 //===--------------------------------------------------------------------===//
526 // Construction methods.
527 //===--------------------------------------------------------------------===//
529 static MachineOperand CreateImm(int64_t Val) {
530 MachineOperand Op(MachineOperand::MO_Immediate);
535 static MachineOperand CreateCImm(const ConstantInt *CI) {
536 MachineOperand Op(MachineOperand::MO_CImmediate);
541 static MachineOperand CreateFPImm(const ConstantFP *CFP) {
542 MachineOperand Op(MachineOperand::MO_FPImmediate);
543 Op.Contents.CFP = CFP;
547 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
548 bool isKill = false, bool isDead = false,
549 bool isUndef = false,
550 bool isEarlyClobber = false,
552 bool isDebug = false,
553 bool isInternalRead = false) {
554 MachineOperand Op(MachineOperand::MO_Register);
559 Op.IsUndef = isUndef;
560 Op.IsInternalRead = isInternalRead;
561 Op.IsEarlyClobber = isEarlyClobber;
562 Op.IsDebug = isDebug;
563 Op.SmallContents.RegNo = Reg;
564 Op.Contents.Reg.Prev = 0;
565 Op.Contents.Reg.Next = 0;
569 static MachineOperand CreateMBB(MachineBasicBlock *MBB,
570 unsigned char TargetFlags = 0) {
571 MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
573 Op.setTargetFlags(TargetFlags);
576 static MachineOperand CreateFI(int Idx) {
577 MachineOperand Op(MachineOperand::MO_FrameIndex);
581 static MachineOperand CreateCPI(unsigned Idx, int Offset,
582 unsigned char TargetFlags = 0) {
583 MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
585 Op.setOffset(Offset);
586 Op.setTargetFlags(TargetFlags);
589 static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset,
590 unsigned char TargetFlags = 0) {
591 MachineOperand Op(MachineOperand::MO_TargetIndex);
593 Op.setOffset(Offset);
594 Op.setTargetFlags(TargetFlags);
597 static MachineOperand CreateJTI(unsigned Idx,
598 unsigned char TargetFlags = 0) {
599 MachineOperand Op(MachineOperand::MO_JumpTableIndex);
601 Op.setTargetFlags(TargetFlags);
604 static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
605 unsigned char TargetFlags = 0) {
606 MachineOperand Op(MachineOperand::MO_GlobalAddress);
607 Op.Contents.OffsetedInfo.Val.GV = GV;
608 Op.setOffset(Offset);
609 Op.setTargetFlags(TargetFlags);
612 static MachineOperand CreateES(const char *SymName,
613 unsigned char TargetFlags = 0) {
614 MachineOperand Op(MachineOperand::MO_ExternalSymbol);
615 Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
616 Op.setOffset(0); // Offset is always 0.
617 Op.setTargetFlags(TargetFlags);
620 static MachineOperand CreateBA(const BlockAddress *BA,
621 unsigned char TargetFlags = 0) {
622 MachineOperand Op(MachineOperand::MO_BlockAddress);
623 Op.Contents.OffsetedInfo.Val.BA = BA;
624 Op.setOffset(0); // Offset is always 0.
625 Op.setTargetFlags(TargetFlags);
628 /// CreateRegMask - Creates a register mask operand referencing Mask. The
629 /// operand does not take ownership of the memory referenced by Mask, it must
630 /// remain valid for the lifetime of the operand.
632 /// A RegMask operand represents a set of non-clobbered physical registers on
633 /// an instruction that clobbers many registers, typically a call. The bit
634 /// mask has a bit set for each physreg that is preserved by this
635 /// instruction, as described in the documentation for
636 /// TargetRegisterInfo::getCallPreservedMask().
638 /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
640 static MachineOperand CreateRegMask(const uint32_t *Mask) {
641 assert(Mask && "Missing register mask");
642 MachineOperand Op(MachineOperand::MO_RegisterMask);
643 Op.Contents.RegMask = Mask;
646 static MachineOperand CreateMetadata(const MDNode *Meta) {
647 MachineOperand Op(MachineOperand::MO_Metadata);
648 Op.Contents.MD = Meta;
652 static MachineOperand CreateMCSymbol(MCSymbol *Sym) {
653 MachineOperand Op(MachineOperand::MO_MCSymbol);
654 Op.Contents.Sym = Sym;
658 friend class MachineInstr;
659 friend class MachineRegisterInfo;
661 //===--------------------------------------------------------------------===//
662 // Methods for handling register use/def lists.
663 //===--------------------------------------------------------------------===//
665 /// isOnRegUseList - Return true if this operand is on a register use/def list
666 /// or false if not. This can only be called for register operands that are
667 /// part of a machine instruction.
668 bool isOnRegUseList() const {
669 assert(isReg() && "Can only add reg operand to use lists");
670 return Contents.Reg.Prev != 0;
674 inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
679 } // End llvm namespace