1 //===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file exposes a function named BuildMI, which is useful for dramatically
11 // simplifying how MachineInstr's are created. It allows use of code like this:
13 // M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
18 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/Support/ErrorHandling.h"
37 ImplicitDefine = Implicit | Define,
38 ImplicitKill = Implicit | Kill
42 class MachineInstrBuilder {
45 MachineInstrBuilder() : MI(0) {}
46 explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
48 /// Allow automatic conversion to the machine instruction we are working on.
50 operator MachineInstr*() const { return MI; }
51 MachineInstr *operator->() const { return MI; }
52 operator MachineBasicBlock::iterator() const { return MI; }
54 /// addReg - Add a new virtual register operand...
57 MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
58 unsigned SubReg = 0) const {
59 assert((flags & 0x1) == 0 &&
60 "Passing in 'true' to addReg is forbidden! Use enums instead.");
61 MI->addOperand(MachineOperand::CreateReg(RegNo,
62 flags & RegState::Define,
63 flags & RegState::Implicit,
64 flags & RegState::Kill,
65 flags & RegState::Dead,
66 flags & RegState::Undef,
67 flags & RegState::EarlyClobber,
69 flags & RegState::Debug));
73 /// addImm - Add a new immediate operand.
75 const MachineInstrBuilder &addImm(int64_t Val) const {
76 MI->addOperand(MachineOperand::CreateImm(Val));
80 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
81 MI->addOperand(MachineOperand::CreateCImm(Val));
85 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
86 MI->addOperand(MachineOperand::CreateFPImm(Val));
90 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
91 unsigned char TargetFlags = 0) const {
92 MI->addOperand(MachineOperand::CreateMBB(MBB, TargetFlags));
96 const MachineInstrBuilder &addFrameIndex(int Idx) const {
97 MI->addOperand(MachineOperand::CreateFI(Idx));
101 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
103 unsigned char TargetFlags = 0) const {
104 MI->addOperand(MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
108 const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
109 unsigned char TargetFlags = 0) const {
110 MI->addOperand(MachineOperand::CreateJTI(Idx, TargetFlags));
114 const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
116 unsigned char TargetFlags = 0) const {
117 MI->addOperand(MachineOperand::CreateGA(GV, Offset, TargetFlags));
121 const MachineInstrBuilder &addExternalSymbol(const char *FnName,
122 unsigned char TargetFlags = 0) const {
123 MI->addOperand(MachineOperand::CreateES(FnName, TargetFlags));
127 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
128 MI->addOperand(MachineOperand::CreateRegMask(Mask));
132 const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
133 MI->addMemOperand(*MI->getParent()->getParent(), MMO);
137 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b,
138 MachineInstr::mmo_iterator e) const {
139 MI->setMemRefs(b, e);
144 const MachineInstrBuilder &addOperand(const MachineOperand &MO) const {
149 const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
150 MI->addOperand(MachineOperand::CreateMetadata(MD));
154 const MachineInstrBuilder &addSym(MCSymbol *Sym) const {
155 MI->addOperand(MachineOperand::CreateMCSymbol(Sym));
159 const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
164 const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
169 // Add a displacement from an existing MachineOperand with an added offset.
170 const MachineInstrBuilder &addDisp(const MachineOperand &Disp,
172 switch (Disp.getType()) {
174 llvm_unreachable("Unhandled operand type in addDisp()");
175 case MachineOperand::MO_Immediate:
176 return addImm(Disp.getImm() + off);
177 case MachineOperand::MO_GlobalAddress:
178 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off);
183 /// BuildMI - Builder interface. Specify how to create the initial instruction
186 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
188 const MCInstrDesc &MCID) {
189 return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL));
192 /// BuildMI - This version of the builder sets up the first operand as a
193 /// destination virtual register.
195 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
197 const MCInstrDesc &MCID,
199 return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL))
200 .addReg(DestReg, RegState::Define);
203 /// BuildMI - This version of the builder inserts the newly-built
204 /// instruction before the given position in the given MachineBasicBlock, and
205 /// sets up the first operand as a destination virtual register.
207 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
208 MachineBasicBlock::iterator I,
210 const MCInstrDesc &MCID,
212 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
214 return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
217 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
218 MachineBasicBlock::instr_iterator I,
220 const MCInstrDesc &MCID,
222 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
224 return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
227 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
230 const MCInstrDesc &MCID,
232 if (I->isInsideBundle()) {
233 MachineBasicBlock::instr_iterator MII = I;
234 return BuildMI(BB, MII, DL, MCID, DestReg);
237 MachineBasicBlock::iterator MII = I;
238 return BuildMI(BB, MII, DL, MCID, DestReg);
241 /// BuildMI - This version of the builder inserts the newly-built
242 /// instruction before the given position in the given MachineBasicBlock, and
243 /// does NOT take a destination register.
245 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
246 MachineBasicBlock::iterator I,
248 const MCInstrDesc &MCID) {
249 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
251 return MachineInstrBuilder(MI);
254 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
255 MachineBasicBlock::instr_iterator I,
257 const MCInstrDesc &MCID) {
258 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
260 return MachineInstrBuilder(MI);
263 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
266 const MCInstrDesc &MCID) {
267 if (I->isInsideBundle()) {
268 MachineBasicBlock::instr_iterator MII = I;
269 return BuildMI(BB, MII, DL, MCID);
272 MachineBasicBlock::iterator MII = I;
273 return BuildMI(BB, MII, DL, MCID);
276 /// BuildMI - This version of the builder inserts the newly-built
277 /// instruction at the end of the given MachineBasicBlock, and does NOT take a
278 /// destination register.
280 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
282 const MCInstrDesc &MCID) {
283 return BuildMI(*BB, BB->end(), DL, MCID);
286 /// BuildMI - This version of the builder inserts the newly-built
287 /// instruction at the end of the given MachineBasicBlock, and sets up the first
288 /// operand as a destination virtual register.
290 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
292 const MCInstrDesc &MCID,
294 return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
297 inline unsigned getDefRegState(bool B) {
298 return B ? RegState::Define : 0;
300 inline unsigned getImplRegState(bool B) {
301 return B ? RegState::Implicit : 0;
303 inline unsigned getKillRegState(bool B) {
304 return B ? RegState::Kill : 0;
306 inline unsigned getDeadRegState(bool B) {
307 return B ? RegState::Dead : 0;
309 inline unsigned getUndefRegState(bool B) {
310 return B ? RegState::Undef : 0;
313 } // End llvm namespace