1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/iterator"
20 #include "llvm/Support/DataTypes.h"
28 class MachineBasicBlock;
32 template <typename T> struct ilist_traits;
33 template <typename T> struct ilist;
35 typedef short MachineOpCode;
37 //===----------------------------------------------------------------------===//
38 // class MachineOperand
41 // Representation of each machine instruction operand.
42 // This class is designed so that you can allocate a vector of operands
43 // first and initialize each one later.
45 // E.g, for this VM instruction:
46 // ptr = alloca type, numElements
47 // we generate 2 machine instructions on the SPARC:
49 // mul Constant, Numelements -> Reg
50 // add %sp, Reg -> Ptr
52 // Each instruction has 3 operands, listed above. Of those:
53 // - Reg, NumElements, and Ptr are of operand type MO_Register.
54 // - Constant is of operand type MO_SignExtendedImmed on the SPARC.
56 // For the register operands, the virtual register type is as follows:
58 // - Reg will be of virtual register type MO_MInstrVirtualReg. The field
59 // MachineInstr* minstr will point to the instruction that computes reg.
61 // - %sp will be of virtual register type MO_MachineReg.
62 // The field regNum identifies the machine register.
64 // - NumElements will be of virtual register type MO_VirtualReg.
65 // The field Value* value identifies the value.
67 // - Ptr will also be of virtual register type MO_VirtualReg.
68 // Again, the field Value* value identifies the value.
70 //===----------------------------------------------------------------------===//
72 struct MachineOperand {
74 // Bit fields of the flags variable used for different operand properties
76 DEFFLAG = 0x01, // this is a def of the operand
77 USEFLAG = 0x02, // this is a use of the operand
78 HIFLAG32 = 0x04, // operand is %hi32(value_or_immedVal)
79 LOFLAG32 = 0x08, // operand is %lo32(value_or_immedVal)
80 HIFLAG64 = 0x10, // operand is %hi64(value_or_immedVal)
81 LOFLAG64 = 0x20, // operand is %lo64(value_or_immedVal)
82 PCRELATIVE = 0x40 // Operand is relative to PC, not a global address
86 // UseType - This enum describes how the machine operand is used by
87 // the instruction. Note that the MachineInstr/Operator class
88 // currently uses bool arguments to represent this information
89 // instead of an enum. Eventually this should change over to use
90 // this _easier to read_ representation instead.
93 Use = USEFLAG, /// only read
94 Def = DEFFLAG, /// only written
95 UseAndDef = Use | Def /// read AND written
98 enum MachineOperandType {
99 MO_VirtualRegister, // virtual register for *value
100 MO_MachineRegister, // pre-assigned machine register `regNum'
101 MO_SignExtendedImmed,
103 MO_MachineBasicBlock, // MachineBasicBlock reference
104 MO_FrameIndex, // Abstract Stack Frame Index
105 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
106 MO_JumpTableIndex, // Address of indexed Jump Table for switch
107 MO_ExternalSymbol, // Name of external global symbol
108 MO_GlobalAddress // Address of a global value
113 Value* value; // BasicBlockVal for a label operand.
114 // ConstantVal for a non-address immediate.
115 // Virtual register for an SSA operand,
116 // including hidden operands required for
117 // the generated machine code.
118 // LLVM global for MO_GlobalAddress.
120 int64_t immedVal; // Constant value for an explicit constant
122 MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
123 const char *SymbolName; // For MO_ExternalSymbol type
126 char flags; // see bit field definitions above
127 MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
129 int regNum; // register number for an explicit register
130 // will be set for a value after reg allocation
132 int offset; // Offset to address of global or external, only
133 // valid for MO_GlobalAddress, MO_ExternalSym
134 // and MO_ConstantPoolIndex
137 void zeroContents () {
138 memset (&contents, 0, sizeof (contents));
139 memset (&extra, 0, sizeof (extra));
142 MachineOperand(int64_t ImmVal = 0,
143 MachineOperandType OpTy = MO_VirtualRegister, int Offset = 0)
144 : flags(0), opType(OpTy) {
146 contents.immedVal = ImmVal;
147 if (OpTy == MachineOperand::MO_ConstantPoolIndex)
148 extra.offset = Offset;
153 MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
154 : flags(UseTy), opType(OpTy) {
159 MachineOperand(Value *V, MachineOperandType OpTy, UseType UseTy,
160 bool isPCRelative = false)
161 : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
162 assert(OpTy != MachineOperand::MO_GlobalAddress);
168 MachineOperand(GlobalValue *V, MachineOperandType OpTy, UseType UseTy,
169 bool isPCRelative = false, int Offset = 0)
170 : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
171 assert(OpTy == MachineOperand::MO_GlobalAddress);
173 contents.value = (Value*)V;
174 extra.offset = Offset;
177 MachineOperand(MachineBasicBlock *mbb)
178 : flags(0), opType(MO_MachineBasicBlock) {
184 MachineOperand(const char *SymName, bool isPCRelative, int Offset)
185 : flags(isPCRelative?PCRELATIVE:0), opType(MO_ExternalSymbol) {
187 contents.SymbolName = SymName;
188 extra.offset = Offset;
192 MachineOperand(const MachineOperand &M)
193 : flags(M.flags), opType(M.opType) {
195 contents = M.contents;
202 const MachineOperand &operator=(const MachineOperand &MO) {
203 contents = MO.contents;
210 /// getType - Returns the MachineOperandType for this operand.
212 MachineOperandType getType() const { return opType; }
214 /// getUseType - Returns the MachineOperandUseType of this operand.
216 UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
218 /// isPCRelative - This returns the value of the PCRELATIVE flag, which
219 /// indicates whether this operand should be emitted as a PC relative value
220 /// instead of a global address. This is used for operands of the forms:
221 /// MachineBasicBlock, GlobalAddress, ExternalSymbol
223 bool isPCRelative() const { return (flags & PCRELATIVE) != 0; }
225 /// isRegister - Return true if this operand is a register operand. The X86
226 /// backend currently can't decide whether to use MO_MR or MO_VR to represent
227 /// them, so we accept both.
229 /// Note: The sparc backend should not use this method.
231 bool isRegister() const {
232 return opType == MO_MachineRegister || opType == MO_VirtualRegister;
235 /// Accessors that tell you what kind of MachineOperand you're looking at.
237 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
238 bool isImmediate() const {
239 return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
241 bool isFrameIndex() const { return opType == MO_FrameIndex; }
242 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
243 bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
244 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
245 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
247 /// getVRegValueOrNull - Get the Value* out of a MachineOperand if it
248 /// has one. This is deprecated and only used by the SPARC v9 backend.
250 Value* getVRegValueOrNull() const {
251 return opType == MO_VirtualRegister ? contents.value : NULL;
254 /// MachineOperand accessors that only work on certain types of
255 /// MachineOperand...
257 Value* getVRegValue() const {
258 assert(opType == MO_VirtualRegister && "Wrong MachineOperand accessor");
259 return contents.value;
261 int getMachineRegNum() const {
262 assert(opType == MO_MachineRegister && "Wrong MachineOperand accessor");
265 int64_t getImmedValue() const {
266 assert(isImmediate() && "Wrong MachineOperand accessor");
267 return contents.immedVal;
269 MachineBasicBlock *getMachineBasicBlock() const {
270 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
273 void setMachineBasicBlock(MachineBasicBlock *MBB) {
274 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
277 int getFrameIndex() const {
278 assert(isFrameIndex() && "Wrong MachineOperand accessor");
279 return (int)contents.immedVal;
281 unsigned getConstantPoolIndex() const {
282 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
283 return (unsigned)contents.immedVal;
285 unsigned getJumpTableIndex() const {
286 assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
287 return (unsigned)contents.immedVal;
289 GlobalValue *getGlobal() const {
290 assert(isGlobalAddress() && "Wrong MachineOperand accessor");
291 return (GlobalValue*)contents.value;
293 int getOffset() const {
294 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
295 "Wrong MachineOperand accessor");
298 const char *getSymbolName() const {
299 assert(isExternalSymbol() && "Wrong MachineOperand accessor");
300 return contents.SymbolName;
303 /// MachineOperand methods for testing that work on any kind of
304 /// MachineOperand...
306 bool isUse () const { return flags & USEFLAG; }
307 MachineOperand& setUse () { flags |= USEFLAG; return *this; }
308 bool isDef () const { return flags & DEFFLAG; }
309 MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
310 bool isHiBits32 () const { return flags & HIFLAG32; }
311 bool isLoBits32 () const { return flags & LOFLAG32; }
312 bool isHiBits64 () const { return flags & HIFLAG64; }
313 bool isLoBits64 () const { return flags & LOFLAG64; }
315 /// hasAllocatedReg - Returns true iff a machine register has been
316 /// allocated to this operand.
318 bool hasAllocatedReg() const {
319 return (extra.regNum >= 0 &&
320 (opType == MO_VirtualRegister || opType == MO_MachineRegister));
323 /// getReg - Returns the register number. It is a runtime error to call this
324 /// if a register is not allocated.
326 unsigned getReg() const {
327 assert(hasAllocatedReg());
331 /// MachineOperand mutators...
333 void setReg(unsigned Reg) {
334 // This method's comment used to say: 'TODO: get rid of this duplicate
335 // code.' It's not clear where the duplication is.
336 assert(hasAllocatedReg() && "This operand cannot have a register number!");
340 void setValueReg(Value *val) {
341 assert(getVRegValueOrNull() != 0 && "Original operand must of type Value*");
342 contents.value = val;
345 void setImmedValue(int immVal) {
346 assert(isImmediate() && "Wrong MachineOperand mutator");
347 contents.immedVal = immVal;
350 void setOffset(int Offset) {
351 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() ||
352 isJumpTableIndex()) &&
353 "Wrong MachineOperand accessor");
354 extra.offset = Offset;
357 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
359 friend class MachineInstr;
363 //===----------------------------------------------------------------------===//
364 // class MachineInstr
367 // Representation of each machine instruction.
369 // MachineOpCode must be an enum, defined separately for each target.
370 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
372 // There are 2 kinds of operands:
374 // (1) Explicit operands of the machine instruction in vector operands[]
376 // (2) "Implicit operands" are values implicitly used or defined by the
377 // machine instruction, such as arguments to a CALL, return value of
378 // a CALL (if any), and return value of a RETURN.
379 //===----------------------------------------------------------------------===//
382 short Opcode; // the opcode
383 std::vector<MachineOperand> operands; // the operands
384 MachineInstr* prev, *next; // links for our intrusive list
385 MachineBasicBlock* parent; // pointer to the owning basic block
387 // OperandComplete - Return true if it's illegal to add a new operand
388 bool OperandsComplete() const;
390 //Constructor used by clone() method
391 MachineInstr(const MachineInstr&);
393 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
395 // Intrusive list support
397 friend struct ilist_traits<MachineInstr>;
400 MachineInstr(short Opcode, unsigned numOperands);
402 /// MachineInstr ctor - This constructor only does a _reserve_ of the
403 /// operands, not a resize for them. It is expected that if you use this that
404 /// you call add* methods below to fill up the operands, instead of the Set
405 /// methods. Eventually, the "resizing" ctors will be phased out.
407 MachineInstr(short Opcode, unsigned numOperands, bool XX, bool YY);
409 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
410 /// the MachineInstr is created and added to the end of the specified basic
413 MachineInstr(MachineBasicBlock *MBB, short Opcode, unsigned numOps);
417 const MachineBasicBlock* getParent() const { return parent; }
418 MachineBasicBlock* getParent() { return parent; }
420 /// getOpcode - Returns the opcode of this MachineInstr.
422 const int getOpcode() const { return Opcode; }
424 /// Access to explicit operands of the instruction.
426 unsigned getNumOperands() const { return operands.size(); }
428 const MachineOperand& getOperand(unsigned i) const {
429 assert(i < getNumOperands() && "getOperand() out of range!");
432 MachineOperand& getOperand(unsigned i) {
433 assert(i < getNumOperands() && "getOperand() out of range!");
438 /// clone - Create a copy of 'this' instruction that is identical in
439 /// all ways except the the instruction has no parent, prev, or next.
440 MachineInstr* clone() const;
442 /// removeFromParent - This method unlinks 'this' from the containing basic
443 /// block, and returns it, but does not delete it.
444 MachineInstr *removeFromParent();
446 /// eraseFromParent - This method unlinks 'this' from the containing basic
447 /// block and deletes it.
448 void eraseFromParent() {
449 delete removeFromParent();
455 void print(std::ostream &OS, const TargetMachine *TM) const;
457 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
459 //===--------------------------------------------------------------------===//
460 // Accessors to add operands when building up machine instructions
463 /// addRegOperand - Add a MO_VirtualRegister operand to the end of the
466 void addRegOperand(Value *V, bool isDef, bool isDefAndUse=false) {
467 assert(!OperandsComplete() &&
468 "Trying to add an operand to a machine instr that is already done!");
470 MachineOperand(V, MachineOperand::MO_VirtualRegister,
471 !isDef ? MachineOperand::Use :
472 (isDefAndUse ? MachineOperand::UseAndDef :
473 MachineOperand::Def)));
476 void addRegOperand(Value *V,
477 MachineOperand::UseType UTy = MachineOperand::Use,
478 bool isPCRelative = false) {
479 assert(!OperandsComplete() &&
480 "Trying to add an operand to a machine instr that is already done!");
481 operands.push_back(MachineOperand(V, MachineOperand::MO_VirtualRegister,
485 /// addRegOperand - Add a symbolic virtual register reference...
487 void addRegOperand(int reg, bool isDef) {
488 assert(!OperandsComplete() &&
489 "Trying to add an operand to a machine instr that is already done!");
491 MachineOperand(reg, MachineOperand::MO_VirtualRegister,
492 isDef ? MachineOperand::Def : MachineOperand::Use));
495 /// addRegOperand - Add a symbolic virtual register reference...
497 void addRegOperand(int reg,
498 MachineOperand::UseType UTy = MachineOperand::Use) {
499 assert(!OperandsComplete() &&
500 "Trying to add an operand to a machine instr that is already done!");
502 MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
505 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
507 void addMachineRegOperand(int reg, bool isDef) {
508 assert(!OperandsComplete() &&
509 "Trying to add an operand to a machine instr that is already done!");
511 MachineOperand(reg, MachineOperand::MO_MachineRegister,
512 isDef ? MachineOperand::Def : MachineOperand::Use));
515 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
517 void addMachineRegOperand(int reg,
518 MachineOperand::UseType UTy = MachineOperand::Use) {
519 assert(!OperandsComplete() &&
520 "Trying to add an operand to a machine instr that is already done!");
522 MachineOperand(reg, MachineOperand::MO_MachineRegister, UTy));
525 /// addZeroExtImmOperand - Add a zero extended constant argument to the
526 /// machine instruction.
528 void addZeroExtImmOperand(int intValue) {
529 assert(!OperandsComplete() &&
530 "Trying to add an operand to a machine instr that is already done!");
532 MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
535 /// addZeroExtImm64Operand - Add a zero extended 64-bit constant argument
536 /// to the machine instruction.
538 void addZeroExtImm64Operand(uint64_t intValue) {
539 assert(!OperandsComplete() &&
540 "Trying to add an operand to a machine instr that is already done!");
542 MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
545 /// addSignExtImmOperand - Add a zero extended constant argument to the
546 /// machine instruction.
548 void addSignExtImmOperand(int intValue) {
549 assert(!OperandsComplete() &&
550 "Trying to add an operand to a machine instr that is already done!");
552 MachineOperand(intValue, MachineOperand::MO_SignExtendedImmed));
555 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
556 assert(!OperandsComplete() &&
557 "Trying to add an operand to a machine instr that is already done!");
558 operands.push_back(MachineOperand(MBB));
561 /// addFrameIndexOperand - Add an abstract frame index to the instruction
563 void addFrameIndexOperand(unsigned Idx) {
564 assert(!OperandsComplete() &&
565 "Trying to add an operand to a machine instr that is already done!");
566 operands.push_back(MachineOperand(Idx, MachineOperand::MO_FrameIndex));
569 /// addConstantPoolndexOperand - Add a constant pool object index to the
572 void addConstantPoolIndexOperand(unsigned I, int Offset=0) {
573 assert(!OperandsComplete() &&
574 "Trying to add an operand to a machine instr that is already done!");
575 operands.push_back(MachineOperand(I, MachineOperand::MO_ConstantPoolIndex));
578 /// addJumpTableIndexOperand - Add a jump table object index to the
581 void addJumpTableIndexOperand(unsigned I) {
582 assert(!OperandsComplete() &&
583 "Trying to add an operand to a machine instr that is already done!");
584 operands.push_back(MachineOperand(I, MachineOperand::MO_JumpTableIndex));
587 void addGlobalAddressOperand(GlobalValue *GV, bool isPCRelative, int Offset) {
588 assert(!OperandsComplete() &&
589 "Trying to add an operand to a machine instr that is already done!");
591 MachineOperand(GV, MachineOperand::MO_GlobalAddress,
592 MachineOperand::Use, isPCRelative, Offset));
595 /// addExternalSymbolOperand - Add an external symbol operand to this instr
597 void addExternalSymbolOperand(const char *SymName, bool isPCRelative) {
598 operands.push_back(MachineOperand(SymName, isPCRelative, 0));
601 //===--------------------------------------------------------------------===//
602 // Accessors used to modify instructions in place.
604 // FIXME: Move this stuff to MachineOperand itself!
606 /// setOpcode - Replace the opcode of the current instruction with a new one.
608 void setOpcode(unsigned Op) { Opcode = Op; }
610 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
611 /// fewer operand than it started with.
613 void RemoveOperand(unsigned i) {
614 operands.erase(operands.begin()+i);
617 // Access to set the operands when building the machine instruction
619 void SetMachineOperandVal(unsigned i,
620 MachineOperand::MachineOperandType operandType,
623 void SetMachineOperandConst(unsigned i,
624 MachineOperand::MachineOperandType operandType,
627 void SetMachineOperandReg(unsigned i, int regNum);
630 //===----------------------------------------------------------------------===//
633 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
634 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
636 } // End llvm namespace