1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/ilist.h"
20 #include "llvm/ADT/ilist_node.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/CodeGen/MachineOperand.h"
23 #include "llvm/Target/TargetInstrDesc.h"
24 #include "llvm/Support/DebugLoc.h"
30 class TargetInstrDesc;
31 class TargetInstrInfo;
32 class TargetRegisterInfo;
33 class MachineFunction;
34 class MachineMemOperand;
36 //===----------------------------------------------------------------------===//
37 /// MachineInstr - Representation of each machine instruction.
39 class MachineInstr : public ilist_node<MachineInstr> {
41 typedef MachineMemOperand **mmo_iterator;
44 const TargetInstrDesc *TID; // Instruction descriptor.
45 unsigned short NumImplicitOps; // Number of implicit operands (which
46 // are determined at construction time).
48 std::vector<MachineOperand> Operands; // the operands
49 mmo_iterator MemRefs; // information on memory references
50 mmo_iterator MemRefsEnd;
51 MachineBasicBlock *Parent; // Pointer to the owning basic block.
52 DebugLoc debugLoc; // Source line information.
54 // OperandComplete - Return true if it's illegal to add a new operand
55 bool OperandsComplete() const;
57 MachineInstr(const MachineInstr&); // DO NOT IMPLEMENT
58 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
60 // Intrusive list support
61 friend struct ilist_traits<MachineInstr>;
62 friend struct ilist_traits<MachineBasicBlock>;
63 void setParent(MachineBasicBlock *P) { Parent = P; }
65 /// MachineInstr ctor - This constructor creates a copy of the given
66 /// MachineInstr in the given MachineFunction.
67 MachineInstr(MachineFunction &, const MachineInstr &);
69 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
70 /// TID NULL and no operands.
73 // The next two constructors have DebugLoc and non-DebugLoc versions;
74 // over time, the non-DebugLoc versions should be phased out and eventually
77 /// MachineInstr ctor - This constructor create a MachineInstr and add the
78 /// implicit operands. It reserves space for number of operands specified by
79 /// TargetInstrDesc. The version with a DebugLoc should be preferred.
80 explicit MachineInstr(const TargetInstrDesc &TID, bool NoImp = false);
82 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
83 /// the MachineInstr is created and added to the end of the specified basic
84 /// block. The version with a DebugLoc should be preferred.
86 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &TID);
88 /// MachineInstr ctor - This constructor create a MachineInstr and add the
89 /// implicit operands. It reserves space for number of operands specified by
90 /// TargetInstrDesc. An explicit DebugLoc is supplied.
91 explicit MachineInstr(const TargetInstrDesc &TID, const DebugLoc dl,
94 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
95 /// the MachineInstr is created and added to the end of the specified basic
98 MachineInstr(MachineBasicBlock *MBB, const DebugLoc dl,
99 const TargetInstrDesc &TID);
103 // MachineInstrs are pool-allocated and owned by MachineFunction.
104 friend class MachineFunction;
107 const MachineBasicBlock* getParent() const { return Parent; }
108 MachineBasicBlock* getParent() { return Parent; }
110 /// getDebugLoc - Returns the debug location id of this MachineInstr.
112 DebugLoc getDebugLoc() const { return debugLoc; }
114 /// getDesc - Returns the target instruction descriptor of this
116 const TargetInstrDesc &getDesc() const { return *TID; }
118 /// getOpcode - Returns the opcode of this MachineInstr.
120 int getOpcode() const { return TID->Opcode; }
122 /// Access to explicit operands of the instruction.
124 unsigned getNumOperands() const { return (unsigned)Operands.size(); }
126 const MachineOperand& getOperand(unsigned i) const {
127 assert(i < getNumOperands() && "getOperand() out of range!");
130 MachineOperand& getOperand(unsigned i) {
131 assert(i < getNumOperands() && "getOperand() out of range!");
135 /// getNumExplicitOperands - Returns the number of non-implicit operands.
137 unsigned getNumExplicitOperands() const;
139 /// Access to memory operands of the instruction
140 mmo_iterator memoperands_begin() const { return MemRefs; }
141 mmo_iterator memoperands_end() const { return MemRefsEnd; }
142 bool memoperands_empty() const { return MemRefsEnd == MemRefs; }
144 /// hasOneMemOperand - Return true if this instruction has exactly one
145 /// MachineMemOperand.
146 bool hasOneMemOperand() const {
147 return MemRefsEnd - MemRefs == 1;
150 /// isIdenticalTo - Return true if this instruction is identical to (same
151 /// opcode and same operands as) the specified instruction.
152 bool isIdenticalTo(const MachineInstr *Other) const {
153 if (Other->getOpcode() != getOpcode() ||
154 Other->getNumOperands() != getNumOperands())
156 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
157 if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
162 /// removeFromParent - This method unlinks 'this' from the containing basic
163 /// block, and returns it, but does not delete it.
164 MachineInstr *removeFromParent();
166 /// eraseFromParent - This method unlinks 'this' from the containing basic
167 /// block and deletes it.
168 void eraseFromParent();
170 /// isLabel - Returns true if the MachineInstr represents a label.
172 bool isLabel() const;
174 /// isDebugLabel - Returns true if the MachineInstr represents a debug label.
176 bool isDebugLabel() const;
178 /// readsRegister - Return true if the MachineInstr reads the specified
179 /// register. If TargetRegisterInfo is passed, then it also checks if there
180 /// is a read of a super-register.
181 bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
182 return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
185 /// killsRegister - Return true if the MachineInstr kills the specified
186 /// register. If TargetRegisterInfo is passed, then it also checks if there is
187 /// a kill of a super-register.
188 bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
189 return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
192 /// modifiesRegister - Return true if the MachineInstr modifies the
193 /// specified register. If TargetRegisterInfo is passed, then it also checks
194 /// if there is a def of a super-register.
195 bool modifiesRegister(unsigned Reg,
196 const TargetRegisterInfo *TRI = NULL) const {
197 return findRegisterDefOperandIdx(Reg, false, TRI) != -1;
200 /// registerDefIsDead - Returns true if the register is dead in this machine
201 /// instruction. If TargetRegisterInfo is passed, then it also checks
202 /// if there is a dead def of a super-register.
203 bool registerDefIsDead(unsigned Reg,
204 const TargetRegisterInfo *TRI = NULL) const {
205 return findRegisterDefOperandIdx(Reg, true, TRI) != -1;
208 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
209 /// the specific register or -1 if it is not found. It further tightens
210 /// the search criteria to a use that kills the register if isKill is true.
211 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false,
212 const TargetRegisterInfo *TRI = NULL) const;
214 /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns
215 /// a pointer to the MachineOperand rather than an index.
216 MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false,
217 const TargetRegisterInfo *TRI = NULL) {
218 int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
219 return (Idx == -1) ? NULL : &getOperand(Idx);
222 /// findRegisterDefOperandIdx() - Returns the operand index that is a def of
223 /// the specified register or -1 if it is not found. If isDead is true, defs
224 /// that are not dead are skipped. If TargetRegisterInfo is non-null, then it
225 /// also checks if there is a def of a super-register.
226 int findRegisterDefOperandIdx(unsigned Reg, bool isDead = false,
227 const TargetRegisterInfo *TRI = NULL) const;
229 /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns
230 /// a pointer to the MachineOperand rather than an index.
231 MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false,
232 const TargetRegisterInfo *TRI = NULL) {
233 int Idx = findRegisterDefOperandIdx(Reg, isDead, TRI);
234 return (Idx == -1) ? NULL : &getOperand(Idx);
237 /// findFirstPredOperandIdx() - Find the index of the first operand in the
238 /// operand list that is used to represent the predicate. It returns -1 if
240 int findFirstPredOperandIdx() const;
242 /// isRegTiedToUseOperand - Given the index of a register def operand,
243 /// check if the register def is tied to a source operand, due to either
244 /// two-address elimination or inline assembly constraints. Returns the
245 /// first tied use operand index by reference is UseOpIdx is not null.
246 bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx = 0) const;
248 /// isRegTiedToDefOperand - Return true if the use operand of the specified
249 /// index is tied to an def operand. It also returns the def operand index by
250 /// reference if DefOpIdx is not null.
251 bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0) const;
253 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
255 void copyKillDeadInfo(const MachineInstr *MI);
257 /// copyPredicates - Copies predicate operand(s) from MI.
258 void copyPredicates(const MachineInstr *MI);
260 /// addRegisterKilled - We have determined MI kills a register. Look for the
261 /// operand that uses it and mark it as IsKill. If AddIfNotFound is true,
262 /// add a implicit operand if it's not found. Returns true if the operand
263 /// exists / is added.
264 bool addRegisterKilled(unsigned IncomingReg,
265 const TargetRegisterInfo *RegInfo,
266 bool AddIfNotFound = false);
268 /// addRegisterDead - We have determined MI defined a register without a use.
269 /// Look for the operand that defines it and mark it as IsDead. If
270 /// AddIfNotFound is true, add a implicit operand if it's not found. Returns
271 /// true if the operand exists / is added.
272 bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo,
273 bool AddIfNotFound = false);
275 /// isSafeToMove - Return true if it is safe to move this instruction. If
276 /// SawStore is set to true, it means that there is a store (or call) between
277 /// the instruction's location and its intended destination.
278 bool isSafeToMove(const TargetInstrInfo *TII, bool &SawStore,
279 AliasAnalysis *AA) const;
281 /// isSafeToReMat - Return true if it's safe to rematerialize the specified
282 /// instruction which defined the specified register instead of copying it.
283 bool isSafeToReMat(const TargetInstrInfo *TII, unsigned DstReg,
284 AliasAnalysis *AA) const;
286 /// hasVolatileMemoryRef - Return true if this instruction may have a
287 /// volatile memory reference, or if the information describing the
288 /// memory reference is not available. Return false if it is known to
289 /// have no volatile memory references.
290 bool hasVolatileMemoryRef() const;
292 /// isInvariantLoad - Return true if this instruction is loading from a
293 /// location whose value is invariant across the function. For example,
294 /// loading a value from the constant pool or from from the argument area of
295 /// a function if it does not change. This should only return true of *all*
296 /// loads the instruction does are invariant (if it does multiple loads).
297 bool isInvariantLoad(AliasAnalysis *AA) const;
302 void print(raw_ostream &OS, const TargetMachine *TM = 0) const;
305 //===--------------------------------------------------------------------===//
306 // Accessors used to build up machine instructions.
308 /// addOperand - Add the specified operand to the instruction. If it is an
309 /// implicit operand, it is added to the end of the operand list. If it is
310 /// an explicit operand it is added at the end of the explicit operand list
311 /// (before the first implicit operand).
312 void addOperand(const MachineOperand &Op);
314 /// setDesc - Replace the instruction descriptor (thus opcode) of
315 /// the current instruction with a new one.
317 void setDesc(const TargetInstrDesc &tid) { TID = &tid; }
319 /// setDebugLoc - Replace current source information with new such.
320 /// Avoid using this, the constructor argument is preferable.
322 void setDebugLoc(const DebugLoc dl) { debugLoc = dl; }
324 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
325 /// fewer operand than it started with.
327 void RemoveOperand(unsigned i);
329 /// addMemOperand - Add a MachineMemOperand to the machine instruction.
330 /// This function should be used only occasionally. The setMemRefs function
331 /// is the primary method for setting up a MachineInstr's MemRefs list.
332 void addMemOperand(MachineFunction &MF, MachineMemOperand *MO);
334 /// setMemRefs - Assign this MachineInstr's memory reference descriptor
335 /// list. This does not transfer ownership.
336 void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) {
337 MemRefs = NewMemRefs;
338 MemRefsEnd = NewMemRefsEnd;
342 /// getRegInfo - If this instruction is embedded into a MachineFunction,
343 /// return the MachineRegisterInfo object for the current function, otherwise
345 MachineRegisterInfo *getRegInfo();
347 /// addImplicitDefUseOperands - Add all implicit def and use operands to
348 /// this instruction.
349 void addImplicitDefUseOperands();
351 /// RemoveRegOperandsFromUseLists - Unlink all of the register operands in
352 /// this instruction from their respective use lists. This requires that the
353 /// operands already be on their use lists.
354 void RemoveRegOperandsFromUseLists();
356 /// AddRegOperandsToUseLists - Add all of the register operands in
357 /// this instruction from their respective use lists. This requires that the
358 /// operands not be on their use lists yet.
359 void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo);
362 //===----------------------------------------------------------------------===//
365 inline raw_ostream& operator<<(raw_ostream &OS, const MachineInstr &MI) {
370 } // End llvm namespace