1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/Support/DataTypes.h"
28 class MachineBasicBlock;
29 class TargetInstrDescriptor;
33 template <typename T> struct ilist_traits;
34 template <typename T> struct ilist;
36 //===----------------------------------------------------------------------===//
37 // class MachineOperand
39 // Representation of each machine instruction operand.
41 struct MachineOperand {
42 enum MachineOperandType {
43 MO_Register, // Register operand.
44 MO_Immediate, // Immediate Operand
45 MO_MachineBasicBlock, // MachineBasicBlock reference
46 MO_FrameIndex, // Abstract Stack Frame Index
47 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
48 MO_JumpTableIndex, // Address of indexed Jump Table for switch
49 MO_ExternalSymbol, // Name of external global symbol
50 MO_GlobalAddress // Address of a global value
55 GlobalValue *GV; // For MO_GlobalAddress.
56 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
57 const char *SymbolName; // For MO_ExternalSymbol.
58 unsigned RegNo; // For MO_Register.
59 int64_t immedVal; // For MO_Immediate and MO_*Index.
62 MachineOperandType opType:8; // Discriminate the union.
63 bool IsDef : 1; // True if this is a def, false if this is a use.
64 bool IsImp : 1; // True if this is an implicit def or use.
66 bool IsKill : 1; // True if this is a reg use and the reg is dead
67 // immediately after the read.
68 bool IsDead : 1; // True if this is a reg def and the reg is dead
69 // immediately after the write. i.e. A register
70 // that is defined but never used.
72 /// auxInfo - auxiliary information used by the MachineOperand
74 /// offset - Offset to address of global or external, only valid for
75 /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
78 /// subReg - SubRegister number, only valid for MO_Register. A value of 0
79 /// indicates the MO_Register has no subReg.
85 void print(std::ostream &os) const;
86 void print(std::ostream *os) const { if (os) print(*os); }
89 MachineOperand(const MachineOperand &M) {
95 /// getType - Returns the MachineOperandType for this operand.
97 MachineOperandType getType() const { return opType; }
99 /// Accessors that tell you what kind of MachineOperand you're looking at.
101 bool isRegister() const { return opType == MO_Register; }
102 bool isImmediate() const { return opType == MO_Immediate; }
103 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
104 bool isFrameIndex() const { return opType == MO_FrameIndex; }
105 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
106 bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
107 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
108 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
110 int64_t getImm() const {
111 assert(isImmediate() && "Wrong MachineOperand accessor");
112 return contents.immedVal;
115 int64_t getImmedValue() const {
116 assert(isImmediate() && "Wrong MachineOperand accessor");
117 return contents.immedVal;
119 MachineBasicBlock *getMBB() const {
120 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
123 MachineBasicBlock *getMachineBasicBlock() const {
124 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
127 void setMachineBasicBlock(MachineBasicBlock *MBB) {
128 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
131 int getFrameIndex() const {
132 assert(isFrameIndex() && "Wrong MachineOperand accessor");
133 return (int)contents.immedVal;
135 unsigned getConstantPoolIndex() const {
136 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
137 return (unsigned)contents.immedVal;
139 unsigned getJumpTableIndex() const {
140 assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
141 return (unsigned)contents.immedVal;
143 GlobalValue *getGlobal() const {
144 assert(isGlobalAddress() && "Wrong MachineOperand accessor");
147 int getOffset() const {
148 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
149 "Wrong MachineOperand accessor");
150 return auxInfo.offset;
152 unsigned getSubReg() const {
153 assert(isRegister() && "Wrong MachineOperand accessor");
154 return (unsigned)auxInfo.subReg;
156 const char *getSymbolName() const {
157 assert(isExternalSymbol() && "Wrong MachineOperand accessor");
158 return contents.SymbolName;
162 assert(isRegister() && "Wrong MachineOperand accessor");
166 assert(isRegister() && "Wrong MachineOperand accessor");
170 assert(isRegister() && "Wrong MachineOperand accessor");
174 assert(isRegister() && "Wrong MachineOperand accessor");
178 bool isImplicit() const {
179 assert(isRegister() && "Wrong MachineOperand accessor");
183 assert(isRegister() && "Wrong MachineOperand accessor");
187 bool isKill() const {
188 assert(isRegister() && "Wrong MachineOperand accessor");
191 bool isDead() const {
192 assert(isRegister() && "Wrong MachineOperand accessor");
196 assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
200 assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
204 assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
208 assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
212 /// getReg - Returns the register number.
214 unsigned getReg() const {
215 assert(isRegister() && "This is not a register operand!");
216 return contents.RegNo;
219 /// MachineOperand mutators.
221 void setReg(unsigned Reg) {
222 assert(isRegister() && "This is not a register operand!");
223 contents.RegNo = Reg;
226 void setImmedValue(int64_t immVal) {
227 assert(isImmediate() && "Wrong MachineOperand mutator");
228 contents.immedVal = immVal;
230 void setImm(int64_t immVal) {
231 assert(isImmediate() && "Wrong MachineOperand mutator");
232 contents.immedVal = immVal;
235 void setOffset(int Offset) {
236 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() ||
237 isJumpTableIndex()) &&
238 "Wrong MachineOperand accessor");
239 auxInfo.offset = Offset;
241 void setSubReg(unsigned subReg) {
242 assert(isRegister() && "Wrong MachineOperand accessor");
243 auxInfo.subReg = (unsigned char)subReg;
245 void setConstantPoolIndex(unsigned Idx) {
246 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
247 contents.immedVal = Idx;
249 void setJumpTableIndex(unsigned Idx) {
250 assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
251 contents.immedVal = Idx;
254 /// isIdenticalTo - Return true if this operand is identical to the specified
255 /// operand. Note: This method ignores isKill and isDead properties.
256 bool isIdenticalTo(const MachineOperand &Other) const;
258 /// ChangeToImmediate - Replace this operand with a new immediate operand of
259 /// the specified value. If an operand is known to be an immediate already,
260 /// the setImmedValue method should be used.
261 void ChangeToImmediate(int64_t ImmVal) {
262 opType = MO_Immediate;
263 contents.immedVal = ImmVal;
266 /// ChangeToRegister - Replace this operand with a new register operand of
267 /// the specified value. If an operand is known to be an register already,
268 /// the setReg method should be used.
269 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
270 bool isKill = false, bool isDead = false) {
271 opType = MO_Register;
272 contents.RegNo = Reg;
279 static MachineOperand CreateImm(int64_t Val) {
281 Op.opType = MachineOperand::MO_Immediate;
282 Op.contents.immedVal = Val;
283 Op.auxInfo.offset = 0;
286 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
287 bool isKill = false, bool isDead = false,
288 unsigned SubReg = 0) {
290 Op.opType = MachineOperand::MO_Register;
295 Op.contents.RegNo = Reg;
296 Op.auxInfo.subReg = SubReg;
299 static MachineOperand CreateMBB(MachineBasicBlock *MBB) {
301 Op.opType = MachineOperand::MO_MachineBasicBlock;
302 Op.contents.MBB = MBB;
303 Op.auxInfo.offset = 0;
306 static MachineOperand CreateFI(unsigned Idx) {
308 Op.opType = MachineOperand::MO_FrameIndex;
309 Op.contents.immedVal = Idx;
310 Op.auxInfo.offset = 0;
313 static MachineOperand CreateCPI(unsigned Idx, int Offset) {
315 Op.opType = MachineOperand::MO_ConstantPoolIndex;
316 Op.contents.immedVal = Idx;
317 Op.auxInfo.offset = Offset;
320 static MachineOperand CreateJTI(unsigned Idx) {
322 Op.opType = MachineOperand::MO_JumpTableIndex;
323 Op.contents.immedVal = Idx;
324 Op.auxInfo.offset = 0;
327 static MachineOperand CreateGA(GlobalValue *GV, int Offset) {
329 Op.opType = MachineOperand::MO_GlobalAddress;
331 Op.auxInfo.offset = Offset;
334 static MachineOperand CreateES(const char *SymName, int Offset = 0) {
336 Op.opType = MachineOperand::MO_ExternalSymbol;
337 Op.contents.SymbolName = SymName;
338 Op.auxInfo.offset = Offset;
341 const MachineOperand &operator=(const MachineOperand &MO) {
342 contents = MO.contents;
348 auxInfo = MO.auxInfo;
352 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop) {
357 friend class MachineInstr;
361 //===----------------------------------------------------------------------===//
362 /// MachineInstr - Representation of each machine instruction.
365 const TargetInstrDescriptor *TID; // Instruction descriptor.
366 unsigned short NumImplicitOps; // Number of implicit operands (which
367 // are determined at construction time).
369 std::vector<MachineOperand> Operands; // the operands
370 MachineInstr* prev, *next; // links for our intrusive list
371 MachineBasicBlock* parent; // pointer to the owning basic block
373 // OperandComplete - Return true if it's illegal to add a new operand
374 bool OperandsComplete() const;
376 MachineInstr(const MachineInstr&);
377 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
379 // Intrusive list support
380 friend struct ilist_traits<MachineInstr>;
383 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
384 /// TID NULL and no operands.
387 /// MachineInstr ctor - This constructor create a MachineInstr and add the
388 /// implicit operands. It reserves space for number of operands specified by
389 /// TargetInstrDescriptor.
390 explicit MachineInstr(const TargetInstrDescriptor &TID, bool NoImp = false);
392 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
393 /// the MachineInstr is created and added to the end of the specified basic
396 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDescriptor &TID);
400 const MachineBasicBlock* getParent() const { return parent; }
401 MachineBasicBlock* getParent() { return parent; }
403 /// getInstrDescriptor - Returns the target instruction descriptor of this
405 const TargetInstrDescriptor *getInstrDescriptor() const { return TID; }
407 /// getOpcode - Returns the opcode of this MachineInstr.
409 int getOpcode() const;
411 /// Access to explicit operands of the instruction.
413 unsigned getNumOperands() const { return Operands.size(); }
415 const MachineOperand& getOperand(unsigned i) const {
416 assert(i < getNumOperands() && "getOperand() out of range!");
419 MachineOperand& getOperand(unsigned i) {
420 assert(i < getNumOperands() && "getOperand() out of range!");
424 /// getNumExplicitOperands - Returns the number of non-implicit operands.
426 unsigned getNumExplicitOperands() const;
428 /// isIdenticalTo - Return true if this instruction is identical to (same
429 /// opcode and same operands as) the specified instruction.
430 bool isIdenticalTo(const MachineInstr *Other) const {
431 if (Other->getOpcode() != getOpcode() ||
432 Other->getNumOperands() != getNumOperands())
434 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
435 if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
440 /// clone - Create a copy of 'this' instruction that is identical in
441 /// all ways except the the instruction has no parent, prev, or next.
442 MachineInstr* clone() const { return new MachineInstr(*this); }
444 /// removeFromParent - This method unlinks 'this' from the containing basic
445 /// block, and returns it, but does not delete it.
446 MachineInstr *removeFromParent();
448 /// eraseFromParent - This method unlinks 'this' from the containing basic
449 /// block and deletes it.
450 void eraseFromParent() {
451 delete removeFromParent();
454 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
455 /// the specific register or -1 if it is not found. It further tightening
456 /// the search criteria to a use that kills the register if isKill is true.
457 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false) const;
459 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
460 /// the specific register or NULL if it is not found.
461 MachineOperand *findRegisterDefOperand(unsigned Reg);
463 /// findFirstPredOperandIdx() - Find the index of the first operand in the
464 /// operand list that is used to represent the predicate. It returns -1 if
466 int findFirstPredOperandIdx() const;
468 /// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
469 /// to two addr elimination.
470 bool isRegReDefinedByTwoAddr(unsigned Reg) const;
472 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
474 void copyKillDeadInfo(const MachineInstr *MI);
476 /// copyPredicates - Copies predicate operand(s) from MI.
477 void copyPredicates(const MachineInstr *MI);
482 void print(std::ostream *OS, const TargetMachine *TM) const {
483 if (OS) print(*OS, TM);
485 void print(std::ostream &OS, const TargetMachine *TM) const;
486 void print(std::ostream &OS) const;
487 void print(std::ostream *OS) const { if (OS) print(*OS); }
489 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr){
494 //===--------------------------------------------------------------------===//
495 // Accessors to add operands when building up machine instructions.
497 void addOperand(const MachineOperand &Op) {
498 bool isImpReg = Op.isRegister() && Op.isImplicit();
499 assert((isImpReg || !OperandsComplete()) &&
500 "Trying to add an operand to a machine instr that is already done!");
501 if (isImpReg || NumImplicitOps == 0) // This is true most of the time.
502 Operands.push_back(Op);
504 // Insert a real operand before any implicit ones.
505 Operands.insert(Operands.begin()+Operands.size()-NumImplicitOps, Op);
508 //===--------------------------------------------------------------------===//
509 // Accessors used to modify instructions in place.
512 /// setInstrDescriptor - Replace the instruction descriptor (thus opcode) of
513 /// the current instruction with a new one.
515 void setInstrDescriptor(const TargetInstrDescriptor &tid) { TID = &tid; }
517 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
518 /// fewer operand than it started with.
520 void RemoveOperand(unsigned i) {
521 Operands.erase(Operands.begin()+i);
525 /// addImplicitDefUseOperands - Add all implicit def and use operands to
526 /// this instruction.
527 void addImplicitDefUseOperands();
530 //===----------------------------------------------------------------------===//
533 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
534 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
536 } // End llvm namespace