1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/ilist.h"
20 #include "llvm/ADT/ilist_node.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/CodeGen/MachineOperand.h"
23 #include "llvm/Target/TargetInstrDesc.h"
24 #include "llvm/Support/DebugLoc.h"
29 class TargetInstrDesc;
30 class TargetInstrInfo;
31 class TargetRegisterInfo;
32 class MachineFunction;
33 class MachineMemOperand;
35 //===----------------------------------------------------------------------===//
36 /// MachineInstr - Representation of each machine instruction.
38 class MachineInstr : public ilist_node<MachineInstr> {
40 typedef MachineMemOperand **mmo_iterator;
43 const TargetInstrDesc *TID; // Instruction descriptor.
44 unsigned short NumImplicitOps; // Number of implicit operands (which
45 // are determined at construction time).
47 std::vector<MachineOperand> Operands; // the operands
48 mmo_iterator MemRefs; // information on memory references
49 mmo_iterator MemRefsEnd;
50 MachineBasicBlock *Parent; // Pointer to the owning basic block.
51 DebugLoc debugLoc; // Source line information.
53 // OperandComplete - Return true if it's illegal to add a new operand
54 bool OperandsComplete() const;
56 MachineInstr(const MachineInstr&); // DO NOT IMPLEMENT
57 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
59 // Intrusive list support
60 friend struct ilist_traits<MachineInstr>;
61 friend struct ilist_traits<MachineBasicBlock>;
62 void setParent(MachineBasicBlock *P) { Parent = P; }
64 /// MachineInstr ctor - This constructor creates a copy of the given
65 /// MachineInstr in the given MachineFunction.
66 MachineInstr(MachineFunction &, const MachineInstr &);
68 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
69 /// TID NULL and no operands.
72 // The next two constructors have DebugLoc and non-DebugLoc versions;
73 // over time, the non-DebugLoc versions should be phased out and eventually
76 /// MachineInstr ctor - This constructor create a MachineInstr and add the
77 /// implicit operands. It reserves space for number of operands specified by
78 /// TargetInstrDesc. The version with a DebugLoc should be preferred.
79 explicit MachineInstr(const TargetInstrDesc &TID, bool NoImp = false);
81 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
82 /// the MachineInstr is created and added to the end of the specified basic
83 /// block. The version with a DebugLoc should be preferred.
85 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &TID);
87 /// MachineInstr ctor - This constructor create a MachineInstr and add the
88 /// implicit operands. It reserves space for number of operands specified by
89 /// TargetInstrDesc. An explicit DebugLoc is supplied.
90 explicit MachineInstr(const TargetInstrDesc &TID, const DebugLoc dl,
93 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
94 /// the MachineInstr is created and added to the end of the specified basic
97 MachineInstr(MachineBasicBlock *MBB, const DebugLoc dl,
98 const TargetInstrDesc &TID);
102 // MachineInstrs are pool-allocated and owned by MachineFunction.
103 friend class MachineFunction;
106 const MachineBasicBlock* getParent() const { return Parent; }
107 MachineBasicBlock* getParent() { return Parent; }
109 /// getDebugLoc - Returns the debug location id of this MachineInstr.
111 DebugLoc getDebugLoc() const { return debugLoc; }
113 /// getDesc - Returns the target instruction descriptor of this
115 const TargetInstrDesc &getDesc() const { return *TID; }
117 /// getOpcode - Returns the opcode of this MachineInstr.
119 int getOpcode() const { return TID->Opcode; }
121 /// Access to explicit operands of the instruction.
123 unsigned getNumOperands() const { return (unsigned)Operands.size(); }
125 const MachineOperand& getOperand(unsigned i) const {
126 assert(i < getNumOperands() && "getOperand() out of range!");
129 MachineOperand& getOperand(unsigned i) {
130 assert(i < getNumOperands() && "getOperand() out of range!");
134 /// getNumExplicitOperands - Returns the number of non-implicit operands.
136 unsigned getNumExplicitOperands() const;
138 /// Access to memory operands of the instruction
139 mmo_iterator memoperands_begin() const { return MemRefs; }
140 mmo_iterator memoperands_end() const { return MemRefsEnd; }
141 bool memoperands_empty() const { return MemRefsEnd == MemRefs; }
143 /// hasOneMemOperand - Return true if this instruction has exactly one
144 /// MachineMemOperand.
145 bool hasOneMemOperand() const {
146 return MemRefsEnd - MemRefs == 1;
149 /// isIdenticalTo - Return true if this instruction is identical to (same
150 /// opcode and same operands as) the specified instruction.
151 bool isIdenticalTo(const MachineInstr *Other) const {
152 if (Other->getOpcode() != getOpcode() ||
153 Other->getNumOperands() != getNumOperands())
155 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
156 if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
161 /// removeFromParent - This method unlinks 'this' from the containing basic
162 /// block, and returns it, but does not delete it.
163 MachineInstr *removeFromParent();
165 /// eraseFromParent - This method unlinks 'this' from the containing basic
166 /// block and deletes it.
167 void eraseFromParent();
169 /// isLabel - Returns true if the MachineInstr represents a label.
171 bool isLabel() const;
173 /// isDebugLabel - Returns true if the MachineInstr represents a debug label.
175 bool isDebugLabel() const;
177 /// readsRegister - Return true if the MachineInstr reads the specified
178 /// register. If TargetRegisterInfo is passed, then it also checks if there
179 /// is a read of a super-register.
180 bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
181 return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
184 /// killsRegister - Return true if the MachineInstr kills the specified
185 /// register. If TargetRegisterInfo is passed, then it also checks if there is
186 /// a kill of a super-register.
187 bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
188 return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
191 /// modifiesRegister - Return true if the MachineInstr modifies the
192 /// specified register. If TargetRegisterInfo is passed, then it also checks
193 /// if there is a def of a super-register.
194 bool modifiesRegister(unsigned Reg,
195 const TargetRegisterInfo *TRI = NULL) const {
196 return findRegisterDefOperandIdx(Reg, false, TRI) != -1;
199 /// registerDefIsDead - Returns true if the register is dead in this machine
200 /// instruction. If TargetRegisterInfo is passed, then it also checks
201 /// if there is a dead def of a super-register.
202 bool registerDefIsDead(unsigned Reg,
203 const TargetRegisterInfo *TRI = NULL) const {
204 return findRegisterDefOperandIdx(Reg, true, TRI) != -1;
207 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
208 /// the specific register or -1 if it is not found. It further tightens
209 /// the search criteria to a use that kills the register if isKill is true.
210 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false,
211 const TargetRegisterInfo *TRI = NULL) const;
213 /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns
214 /// a pointer to the MachineOperand rather than an index.
215 MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false,
216 const TargetRegisterInfo *TRI = NULL) {
217 int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
218 return (Idx == -1) ? NULL : &getOperand(Idx);
221 /// findRegisterDefOperandIdx() - Returns the operand index that is a def of
222 /// the specified register or -1 if it is not found. If isDead is true, defs
223 /// that are not dead are skipped. If TargetRegisterInfo is non-null, then it
224 /// also checks if there is a def of a super-register.
225 int findRegisterDefOperandIdx(unsigned Reg, bool isDead = false,
226 const TargetRegisterInfo *TRI = NULL) const;
228 /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns
229 /// a pointer to the MachineOperand rather than an index.
230 MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false,
231 const TargetRegisterInfo *TRI = NULL) {
232 int Idx = findRegisterDefOperandIdx(Reg, isDead, TRI);
233 return (Idx == -1) ? NULL : &getOperand(Idx);
236 /// findFirstPredOperandIdx() - Find the index of the first operand in the
237 /// operand list that is used to represent the predicate. It returns -1 if
239 int findFirstPredOperandIdx() const;
241 /// isRegTiedToUseOperand - Given the index of a register def operand,
242 /// check if the register def is tied to a source operand, due to either
243 /// two-address elimination or inline assembly constraints. Returns the
244 /// first tied use operand index by reference is UseOpIdx is not null.
245 bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx = 0) const;
247 /// isRegTiedToDefOperand - Return true if the use operand of the specified
248 /// index is tied to an def operand. It also returns the def operand index by
249 /// reference if DefOpIdx is not null.
250 bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0) const;
252 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
254 void copyKillDeadInfo(const MachineInstr *MI);
256 /// copyPredicates - Copies predicate operand(s) from MI.
257 void copyPredicates(const MachineInstr *MI);
259 /// addRegisterKilled - We have determined MI kills a register. Look for the
260 /// operand that uses it and mark it as IsKill. If AddIfNotFound is true,
261 /// add a implicit operand if it's not found. Returns true if the operand
262 /// exists / is added.
263 bool addRegisterKilled(unsigned IncomingReg,
264 const TargetRegisterInfo *RegInfo,
265 bool AddIfNotFound = false);
267 /// addRegisterDead - We have determined MI defined a register without a use.
268 /// Look for the operand that defines it and mark it as IsDead. If
269 /// AddIfNotFound is true, add a implicit operand if it's not found. Returns
270 /// true if the operand exists / is added.
271 bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo,
272 bool AddIfNotFound = false);
274 /// isSafeToMove - Return true if it is safe to move this instruction. If
275 /// SawStore is set to true, it means that there is a store (or call) between
276 /// the instruction's location and its intended destination.
277 bool isSafeToMove(const TargetInstrInfo *TII, bool &SawStore) const;
279 /// isSafeToReMat - Return true if it's safe to rematerialize the specified
280 /// instruction which defined the specified register instead of copying it.
281 bool isSafeToReMat(const TargetInstrInfo *TII, unsigned DstReg) const;
283 /// hasVolatileMemoryRef - Return true if this instruction may have a
284 /// volatile memory reference, or if the information describing the
285 /// memory reference is not available. Return false if it is known to
286 /// have no volatile memory references.
287 bool hasVolatileMemoryRef() const;
292 void print(raw_ostream &OS, const TargetMachine *TM = 0) const;
295 //===--------------------------------------------------------------------===//
296 // Accessors used to build up machine instructions.
298 /// addOperand - Add the specified operand to the instruction. If it is an
299 /// implicit operand, it is added to the end of the operand list. If it is
300 /// an explicit operand it is added at the end of the explicit operand list
301 /// (before the first implicit operand).
302 void addOperand(const MachineOperand &Op);
304 /// setDesc - Replace the instruction descriptor (thus opcode) of
305 /// the current instruction with a new one.
307 void setDesc(const TargetInstrDesc &tid) { TID = &tid; }
309 /// setDebugLoc - Replace current source information with new such.
310 /// Avoid using this, the constructor argument is preferable.
312 void setDebugLoc(const DebugLoc dl) { debugLoc = dl; }
314 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
315 /// fewer operand than it started with.
317 void RemoveOperand(unsigned i);
319 /// addMemOperand - Add a MachineMemOperand to the machine instruction.
320 /// This function should be used only occasionally. The setMemRefs function
321 /// is the primary method for setting up a MachineInstr's MemRefs list.
322 void addMemOperand(MachineFunction &MF, MachineMemOperand *MO);
324 /// setMemRefs - Assign this MachineInstr's memory reference descriptor
325 /// list. This does not transfer ownership.
326 void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) {
327 MemRefs = NewMemRefs;
328 MemRefsEnd = NewMemRefsEnd;
332 /// getRegInfo - If this instruction is embedded into a MachineFunction,
333 /// return the MachineRegisterInfo object for the current function, otherwise
335 MachineRegisterInfo *getRegInfo();
337 /// addImplicitDefUseOperands - Add all implicit def and use operands to
338 /// this instruction.
339 void addImplicitDefUseOperands();
341 /// RemoveRegOperandsFromUseLists - Unlink all of the register operands in
342 /// this instruction from their respective use lists. This requires that the
343 /// operands already be on their use lists.
344 void RemoveRegOperandsFromUseLists();
346 /// AddRegOperandsToUseLists - Add all of the register operands in
347 /// this instruction from their respective use lists. This requires that the
348 /// operands not be on their use lists yet.
349 void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo);
352 //===----------------------------------------------------------------------===//
355 inline raw_ostream& operator<<(raw_ostream &OS, const MachineInstr &MI) {
360 } // End llvm namespace