1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/iterator"
28 class MachineBasicBlock;
32 template <typename T> struct ilist_traits;
33 template <typename T> struct ilist;
35 typedef short MachineOpCode;
37 //===----------------------------------------------------------------------===//
38 // class MachineOperand
41 // Representation of each machine instruction operand.
42 // This class is designed so that you can allocate a vector of operands
43 // first and initialize each one later.
45 // E.g, for this VM instruction:
46 // ptr = alloca type, numElements
47 // we generate 2 machine instructions on the SPARC:
49 // mul Constant, Numelements -> Reg
50 // add %sp, Reg -> Ptr
52 // Each instruction has 3 operands, listed above. Of those:
53 // - Reg, NumElements, and Ptr are of operand type MO_Register.
54 // - Constant is of operand type MO_SignExtendedImmed on the SPARC.
56 // For the register operands, the virtual register type is as follows:
58 // - Reg will be of virtual register type MO_MInstrVirtualReg. The field
59 // MachineInstr* minstr will point to the instruction that computes reg.
61 // - %sp will be of virtual register type MO_MachineReg.
62 // The field regNum identifies the machine register.
64 // - NumElements will be of virtual register type MO_VirtualReg.
65 // The field Value* value identifies the value.
67 // - Ptr will also be of virtual register type MO_VirtualReg.
68 // Again, the field Value* value identifies the value.
70 //===----------------------------------------------------------------------===//
72 struct MachineOperand {
74 // Bit fields of the flags variable used for different operand properties
76 DEFFLAG = 0x01, // this is a def of the operand
77 USEFLAG = 0x02, // this is a use of the operand
78 HIFLAG32 = 0x04, // operand is %hi32(value_or_immedVal)
79 LOFLAG32 = 0x08, // operand is %lo32(value_or_immedVal)
80 HIFLAG64 = 0x10, // operand is %hi64(value_or_immedVal)
81 LOFLAG64 = 0x20, // operand is %lo64(value_or_immedVal)
82 PCRELATIVE = 0x40, // Operand is relative to PC, not a global address
86 // UseType - This enum describes how the machine operand is used by
87 // the instruction. Note that the MachineInstr/Operator class
88 // currently uses bool arguments to represent this information
89 // instead of an enum. Eventually this should change over to use
90 // this _easier to read_ representation instead.
93 Use = USEFLAG, /// only read
94 Def = DEFFLAG, /// only written
95 UseAndDef = Use | Def /// read AND written
98 enum MachineOperandType {
99 MO_VirtualRegister, // virtual register for *value
100 MO_MachineRegister, // pre-assigned machine register `regNum'
102 MO_SignExtendedImmed,
105 MO_MachineBasicBlock, // MachineBasicBlock reference
106 MO_FrameIndex, // Abstract Stack Frame Index
107 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
108 MO_ExternalSymbol, // Name of external global symbol
109 MO_GlobalAddress, // Address of a global value
114 Value* value; // BasicBlockVal for a label operand.
115 // ConstantVal for a non-address immediate.
116 // Virtual register for an SSA operand,
117 // including hidden operands required for
118 // the generated machine code.
119 // LLVM global for MO_GlobalAddress.
121 int immedVal; // Constant value for an explicit constant
123 MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
124 std::string *SymbolName; // For MO_ExternalSymbol type
127 char flags; // see bit field definitions above
128 MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
130 int regNum; // register number for an explicit register
131 // will be set for a value after reg allocation
133 int offset; // Offset to address of global or external, only
134 // valid for MO_GlobalAddress and MO_ExternalSym
137 void zeroContents () {
138 memset (&contents, 0, sizeof (contents));
139 memset (&extra, 0, sizeof (extra));
142 MachineOperand(int ImmVal = 0, MachineOperandType OpTy = MO_VirtualRegister)
143 : flags(0), opType(OpTy) {
145 contents.immedVal = ImmVal;
149 MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
150 : flags(UseTy), opType(OpTy) {
155 MachineOperand(Value *V, MachineOperandType OpTy, UseType UseTy,
156 bool isPCRelative = false)
157 : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
158 assert(OpTy != MachineOperand::MO_GlobalAddress);
164 MachineOperand(GlobalValue *V, MachineOperandType OpTy, UseType UseTy,
165 bool isPCRelative = false, int Offset = 0)
166 : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
167 assert(OpTy == MachineOperand::MO_GlobalAddress);
169 contents.value = (Value*)V;
170 extra.offset = Offset;
173 MachineOperand(MachineBasicBlock *mbb)
174 : flags(0), opType(MO_MachineBasicBlock) {
180 MachineOperand(const std::string &SymName, bool isPCRelative, int Offset)
181 : flags(isPCRelative?PCRELATIVE:0), opType(MO_ExternalSymbol) {
183 contents.SymbolName = new std::string (SymName);
184 extra.offset = Offset;
188 MachineOperand(const MachineOperand &M)
189 : flags(M.flags), opType(M.opType) {
191 contents = M.contents;
193 if (isExternalSymbol())
194 contents.SymbolName = new std::string(M.getSymbolName());
199 if (isExternalSymbol())
200 delete contents.SymbolName;
203 const MachineOperand &operator=(const MachineOperand &MO) {
204 if (isExternalSymbol()) // if old operand had a symbol name,
205 delete contents.SymbolName; // release old memory
206 contents = MO.contents;
210 if (isExternalSymbol())
211 contents.SymbolName = new std::string(MO.getSymbolName());
215 /// getType - Returns the MachineOperandType for this operand.
217 MachineOperandType getType() const { return opType; }
219 /// getUseType - Returns the MachineOperandUseType of this operand.
221 UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
223 /// isPCRelative - This returns the value of the PCRELATIVE flag, which
224 /// indicates whether this operand should be emitted as a PC relative value
225 /// instead of a global address. This is used for operands of the forms:
226 /// MachineBasicBlock, GlobalAddress, ExternalSymbol
228 bool isPCRelative() const { return (flags & PCRELATIVE) != 0; }
230 /// isRegister - Return true if this operand is a register operand. The X86
231 /// backend currently can't decide whether to use MO_MR or MO_VR to represent
232 /// them, so we accept both.
234 /// Note: The sparc backend should not use this method.
236 bool isRegister() const {
237 return opType == MO_MachineRegister || opType == MO_VirtualRegister;
240 /// Accessors that tell you what kind of MachineOperand you're looking at.
242 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
243 bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
244 bool isImmediate() const {
245 return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
247 bool isFrameIndex() const { return opType == MO_FrameIndex; }
248 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
249 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
250 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
252 /// getVRegValueOrNull - Get the Value* out of a MachineOperand if it
253 /// has one. This is deprecated and only used by the SPARC v9 backend.
255 Value* getVRegValueOrNull() const {
256 return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
257 isPCRelativeDisp()) ? contents.value : NULL;
260 /// MachineOperand accessors that only work on certain types of
261 /// MachineOperand...
263 Value* getVRegValue() const {
264 assert ((opType == MO_VirtualRegister || opType == MO_CCRegister
265 || isPCRelativeDisp()) && "Wrong MachineOperand accessor");
266 return contents.value;
268 int getMachineRegNum() const {
269 assert(opType == MO_MachineRegister && "Wrong MachineOperand accessor");
272 int getImmedValue() const {
273 assert(isImmediate() && "Wrong MachineOperand accessor");
274 return contents.immedVal;
276 MachineBasicBlock *getMachineBasicBlock() const {
277 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
280 void setMachineBasicBlock(MachineBasicBlock *MBB) {
281 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
284 int getFrameIndex() const {
285 assert(isFrameIndex() && "Wrong MachineOperand accessor");
286 return contents.immedVal;
288 unsigned getConstantPoolIndex() const {
289 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
290 return contents.immedVal;
292 GlobalValue *getGlobal() const {
293 assert(isGlobalAddress() && "Wrong MachineOperand accessor");
294 return (GlobalValue*)contents.value;
296 int getOffset() const {
297 assert((isGlobalAddress() || isExternalSymbol()) &&
298 "Wrong MachineOperand accessor");
301 const std::string &getSymbolName() const {
302 assert(isExternalSymbol() && "Wrong MachineOperand accessor");
303 return *contents.SymbolName;
306 /// MachineOperand methods for testing that work on any kind of
307 /// MachineOperand...
309 bool isUse () const { return flags & USEFLAG; }
310 MachineOperand& setUse () { flags |= USEFLAG; return *this; }
311 bool isDef () const { return flags & DEFFLAG; }
312 MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
313 bool isHiBits32 () const { return flags & HIFLAG32; }
314 bool isLoBits32 () const { return flags & LOFLAG32; }
315 bool isHiBits64 () const { return flags & HIFLAG64; }
316 bool isLoBits64 () const { return flags & LOFLAG64; }
318 /// hasAllocatedReg - Returns true iff a machine register has been
319 /// allocated to this operand.
321 bool hasAllocatedReg() const {
322 return (extra.regNum >= 0 &&
323 (opType == MO_VirtualRegister || opType == MO_CCRegister ||
324 opType == MO_MachineRegister));
327 /// getReg - Returns the register number. It is a runtime error to call this
328 /// if a register is not allocated.
330 unsigned getReg() const {
331 assert(hasAllocatedReg());
335 /// MachineOperand mutators...
337 void setReg(unsigned Reg) {
338 // This method's comment used to say: 'TODO: get rid of this duplicate
339 // code.' It's not clear where the duplication is.
340 assert(hasAllocatedReg() && "This operand cannot have a register number!");
344 void setValueReg(Value *val) {
345 assert(getVRegValueOrNull() != 0 && "Original operand must of type Value*");
346 contents.value = val;
349 void setImmedValue(int immVal) {
350 assert(isImmediate() && "Wrong MachineOperand mutator");
351 contents.immedVal = immVal;
354 void setOffset(int Offset) {
355 assert((isGlobalAddress() || isExternalSymbol()) &&
356 "Wrong MachineOperand accessor");
357 extra.offset = Offset;
360 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
362 /// markHi32, markLo32, etc. - These methods are deprecated and only used by
363 /// the SPARC v9 back-end.
365 void markHi32() { flags |= HIFLAG32; }
366 void markLo32() { flags |= LOFLAG32; }
367 void markHi64() { flags |= HIFLAG64; }
368 void markLo64() { flags |= LOFLAG64; }
371 /// setRegForValue - Replaces the Value with its corresponding physical
372 /// register after register allocation is complete. This is deprecated
373 /// and only used by the SPARC v9 back-end.
375 void setRegForValue(int reg) {
376 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
377 opType == MO_MachineRegister);
381 friend class MachineInstr;
385 //===----------------------------------------------------------------------===//
386 // class MachineInstr
389 // Representation of each machine instruction.
391 // MachineOpCode must be an enum, defined separately for each target.
392 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
394 // There are 2 kinds of operands:
396 // (1) Explicit operands of the machine instruction in vector operands[]
398 // (2) "Implicit operands" are values implicitly used or defined by the
399 // machine instruction, such as arguments to a CALL, return value of
400 // a CALL (if any), and return value of a RETURN.
401 //===----------------------------------------------------------------------===//
404 short Opcode; // the opcode
405 unsigned char numImplicitRefs; // number of implicit operands
406 std::vector<MachineOperand> operands; // the operands
407 MachineInstr* prev, *next; // links for our intrusive list
408 MachineBasicBlock* parent; // pointer to the owning basic block
410 // OperandComplete - Return true if it's illegal to add a new operand
411 bool OperandsComplete() const;
413 //Constructor used by clone() method
414 MachineInstr(const MachineInstr&);
416 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
418 // Intrusive list support
420 friend struct ilist_traits<MachineInstr>;
423 MachineInstr(short Opcode, unsigned numOperands);
425 /// MachineInstr ctor - This constructor only does a _reserve_ of the
426 /// operands, not a resize for them. It is expected that if you use this that
427 /// you call add* methods below to fill up the operands, instead of the Set
428 /// methods. Eventually, the "resizing" ctors will be phased out.
430 MachineInstr(short Opcode, unsigned numOperands, bool XX, bool YY);
432 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
433 /// the MachineInstr is created and added to the end of the specified basic
436 MachineInstr(MachineBasicBlock *MBB, short Opcode, unsigned numOps);
440 const MachineBasicBlock* getParent() const { return parent; }
441 MachineBasicBlock* getParent() { return parent; }
443 /// getOpcode - Returns the opcode of this MachineInstr.
445 const int getOpcode() const { return Opcode; }
447 /// Access to explicit operands of the instruction.
449 unsigned getNumOperands() const { return operands.size() - numImplicitRefs; }
451 const MachineOperand& getOperand(unsigned i) const {
452 assert(i < getNumOperands() && "getOperand() out of range!");
455 MachineOperand& getOperand(unsigned i) {
456 assert(i < getNumOperands() && "getOperand() out of range!");
461 // Access to explicit or implicit operands of the instruction
462 // This returns the i'th entry in the operand vector.
463 // That represents the i'th explicit operand or the (i-N)'th implicit operand,
464 // depending on whether i < N or i >= N.
466 const MachineOperand& getExplOrImplOperand(unsigned i) const {
467 assert(i < operands.size() && "getExplOrImplOperand() out of range!");
468 return (i < getNumOperands()? getOperand(i)
469 : getImplicitOp(i - getNumOperands()));
473 // Access to implicit operands of the instruction
475 unsigned getNumImplicitRefs() const{ return numImplicitRefs; }
477 MachineOperand& getImplicitOp(unsigned i) {
478 assert(i < numImplicitRefs && "implicit ref# out of range!");
479 return operands[i + operands.size() - numImplicitRefs];
481 const MachineOperand& getImplicitOp(unsigned i) const {
482 assert(i < numImplicitRefs && "implicit ref# out of range!");
483 return operands[i + operands.size() - numImplicitRefs];
486 Value* getImplicitRef(unsigned i) {
487 return getImplicitOp(i).getVRegValue();
489 const Value* getImplicitRef(unsigned i) const {
490 return getImplicitOp(i).getVRegValue();
493 void addImplicitRef(Value* V, bool isDef = false, bool isDefAndUse = false) {
495 addRegOperand(V, isDef, isDefAndUse);
497 void setImplicitRef(unsigned i, Value* V) {
498 assert(i < getNumImplicitRefs() && "setImplicitRef() out of range!");
499 SetMachineOperandVal(i + getNumOperands(),
500 MachineOperand::MO_VirtualRegister, V);
503 /// clone - Create a copy of 'this' instruction that is identical in
504 /// all ways except the the instruction has no parent, prev, or next.
505 MachineInstr* clone() const;
510 void print(std::ostream &OS, const TargetMachine *TM) const;
512 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
515 // Define iterators to access the Value operands of the Machine Instruction.
516 // Note that these iterators only enumerate the explicit operands.
517 // begin() and end() are defined to produce these iterators...
519 template<class _MI, class _V> class ValOpIterator;
520 typedef ValOpIterator<const MachineInstr*,const Value*> const_val_op_iterator;
521 typedef ValOpIterator< MachineInstr*, Value*> val_op_iterator;
524 //===--------------------------------------------------------------------===//
525 // Accessors to add operands when building up machine instructions
528 /// addRegOperand - Add a MO_VirtualRegister operand to the end of the
531 void addRegOperand(Value *V, bool isDef, bool isDefAndUse=false) {
532 assert(!OperandsComplete() &&
533 "Trying to add an operand to a machine instr that is already done!");
535 MachineOperand(V, MachineOperand::MO_VirtualRegister,
536 !isDef ? MachineOperand::Use :
537 (isDefAndUse ? MachineOperand::UseAndDef :
538 MachineOperand::Def)));
541 void addRegOperand(Value *V,
542 MachineOperand::UseType UTy = MachineOperand::Use,
543 bool isPCRelative = false) {
544 assert(!OperandsComplete() &&
545 "Trying to add an operand to a machine instr that is already done!");
546 operands.push_back(MachineOperand(V, MachineOperand::MO_VirtualRegister,
550 void addCCRegOperand(Value *V,
551 MachineOperand::UseType UTy = MachineOperand::Use) {
552 assert(!OperandsComplete() &&
553 "Trying to add an operand to a machine instr that is already done!");
554 operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
559 /// addRegOperand - Add a symbolic virtual register reference...
561 void addRegOperand(int reg, bool isDef) {
562 assert(!OperandsComplete() &&
563 "Trying to add an operand to a machine instr that is already done!");
565 MachineOperand(reg, MachineOperand::MO_VirtualRegister,
566 isDef ? MachineOperand::Def : MachineOperand::Use));
569 /// addRegOperand - Add a symbolic virtual register reference...
571 void addRegOperand(int reg,
572 MachineOperand::UseType UTy = MachineOperand::Use) {
573 assert(!OperandsComplete() &&
574 "Trying to add an operand to a machine instr that is already done!");
576 MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
579 /// addPCDispOperand - Add a PC relative displacement operand to the MI
581 void addPCDispOperand(Value *V) {
582 assert(!OperandsComplete() &&
583 "Trying to add an operand to a machine instr that is already done!");
585 MachineOperand(V, MachineOperand::MO_PCRelativeDisp,MachineOperand::Use));
588 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
590 void addMachineRegOperand(int reg, bool isDef) {
591 assert(!OperandsComplete() &&
592 "Trying to add an operand to a machine instr that is already done!");
594 MachineOperand(reg, MachineOperand::MO_MachineRegister,
595 isDef ? MachineOperand::Def : MachineOperand::Use));
598 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
600 void addMachineRegOperand(int reg,
601 MachineOperand::UseType UTy = MachineOperand::Use) {
602 assert(!OperandsComplete() &&
603 "Trying to add an operand to a machine instr that is already done!");
605 MachineOperand(reg, MachineOperand::MO_MachineRegister, UTy));
608 /// addZeroExtImmOperand - Add a zero extended constant argument to the
609 /// machine instruction.
611 void addZeroExtImmOperand(int intValue) {
612 assert(!OperandsComplete() &&
613 "Trying to add an operand to a machine instr that is already done!");
615 MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
618 /// addSignExtImmOperand - Add a zero extended constant argument to the
619 /// machine instruction.
621 void addSignExtImmOperand(int intValue) {
622 assert(!OperandsComplete() &&
623 "Trying to add an operand to a machine instr that is already done!");
625 MachineOperand(intValue, MachineOperand::MO_SignExtendedImmed));
628 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
629 assert(!OperandsComplete() &&
630 "Trying to add an operand to a machine instr that is already done!");
631 operands.push_back(MachineOperand(MBB));
634 /// addFrameIndexOperand - Add an abstract frame index to the instruction
636 void addFrameIndexOperand(unsigned Idx) {
637 assert(!OperandsComplete() &&
638 "Trying to add an operand to a machine instr that is already done!");
639 operands.push_back(MachineOperand(Idx, MachineOperand::MO_FrameIndex));
642 /// addConstantPoolndexOperand - Add a constant pool object index to the
645 void addConstantPoolIndexOperand(unsigned I) {
646 assert(!OperandsComplete() &&
647 "Trying to add an operand to a machine instr that is already done!");
648 operands.push_back(MachineOperand(I, MachineOperand::MO_ConstantPoolIndex));
651 void addGlobalAddressOperand(GlobalValue *GV, bool isPCRelative, int Offset) {
652 assert(!OperandsComplete() &&
653 "Trying to add an operand to a machine instr that is already done!");
655 MachineOperand(GV, MachineOperand::MO_GlobalAddress,
656 MachineOperand::Use, isPCRelative, Offset));
659 /// addExternalSymbolOperand - Add an external symbol operand to this instr
661 void addExternalSymbolOperand(const std::string &SymName, bool isPCRelative) {
662 operands.push_back(MachineOperand(SymName, isPCRelative, 0));
665 //===--------------------------------------------------------------------===//
666 // Accessors used to modify instructions in place.
668 // FIXME: Move this stuff to MachineOperand itself!
670 /// replace - Support to rewrite a machine instruction in place: for now,
671 /// simply replace() and then set new operands with Set.*Operand methods
674 void replace(short Opcode, unsigned numOperands);
676 /// setOpcode - Replace the opcode of the current instruction with a new one.
678 void setOpcode(unsigned Op) { Opcode = Op; }
680 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
681 /// fewer operand than it started with.
683 void RemoveOperand(unsigned i) {
684 operands.erase(operands.begin()+i);
687 // Access to set the operands when building the machine instruction
689 void SetMachineOperandVal(unsigned i,
690 MachineOperand::MachineOperandType operandType,
693 void SetMachineOperandConst(unsigned i,
694 MachineOperand::MachineOperandType operandType,
697 void SetMachineOperandReg(unsigned i, int regNum);
700 unsigned substituteValue(const Value* oldVal, Value* newVal,
701 bool defsOnly, bool notDefsAndUses,
702 bool& someArgsWereIgnored);
704 // SetRegForOperand -
705 // SetRegForImplicitRef -
706 // Mark an explicit or implicit operand with its allocated physical register.
708 void SetRegForOperand(unsigned i, int regNum);
709 void SetRegForImplicitRef(unsigned i, int regNum);
712 // Iterator to enumerate machine operands.
714 template<class MITy, class VTy>
715 class ValOpIterator : public forward_iterator<VTy, ptrdiff_t> {
719 void skipToNextVal() {
720 while (i < MI->getNumOperands() &&
721 !( (MI->getOperand(i).getType() == MachineOperand::MO_VirtualRegister ||
722 MI->getOperand(i).getType() == MachineOperand::MO_CCRegister)
723 && MI->getOperand(i).getVRegValue() != 0))
727 inline ValOpIterator(MITy mi, unsigned I) : i(I), MI(mi) {
732 typedef ValOpIterator<MITy, VTy> _Self;
734 inline VTy operator*() const {
735 return MI->getOperand(i).getVRegValue();
738 const MachineOperand &getMachineOperand() const { return MI->getOperand(i);}
739 MachineOperand &getMachineOperand() { return MI->getOperand(i);}
741 inline VTy operator->() const { return operator*(); }
743 inline bool isUse() const { return MI->getOperand(i).isUse(); }
744 inline bool isDef() const { return MI->getOperand(i).isDef(); }
746 inline _Self& operator++() { i++; skipToNextVal(); return *this; }
747 inline _Self operator++(int) { _Self tmp = *this; ++*this; return tmp; }
749 inline bool operator==(const _Self &y) const {
752 inline bool operator!=(const _Self &y) const {
753 return !operator==(y);
756 static _Self begin(MITy MI) {
759 static _Self end(MITy MI) {
760 return _Self(MI, MI->getNumOperands());
764 // define begin() and end()
765 val_op_iterator begin() { return val_op_iterator::begin(this); }
766 val_op_iterator end() { return val_op_iterator::end(this); }
768 const_val_op_iterator begin() const {
769 return const_val_op_iterator::begin(this);
771 const_val_op_iterator end() const {
772 return const_val_op_iterator::end(this);
776 //===----------------------------------------------------------------------===//
779 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
780 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
781 void PrintMachineInstructions(const Function *F);
783 } // End llvm namespace