1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "Support/Annotation.h"
20 #include "Support/iterator"
27 class MachineBasicBlock;
31 template <typename T> class ilist_traits;
33 typedef int MachineOpCode;
35 //===----------------------------------------------------------------------===//
36 /// MOTy - MachineOperandType - This namespace contains an enum that describes
37 /// how the machine operand is used by the instruction: is it read, defined, or
38 /// both? Note that the MachineInstr/Operator class currently uses bool
39 /// arguments to represent this information instead of an enum. Eventually this
40 /// should change over to use this _easier to read_ representation instead.
44 Use, /// This machine operand is only read by the instruction
45 Def, /// This machine operand is only written by the instruction
46 UseAndDef /// This machine operand is read AND written
50 //===----------------------------------------------------------------------===//
51 // class MachineOperand
54 // Representation of each machine instruction operand.
55 // This class is designed so that you can allocate a vector of operands
56 // first and initialize each one later.
58 // E.g, for this VM instruction:
59 // ptr = alloca type, numElements
60 // we generate 2 machine instructions on the SPARC:
62 // mul Constant, Numelements -> Reg
63 // add %sp, Reg -> Ptr
65 // Each instruction has 3 operands, listed above. Of those:
66 // - Reg, NumElements, and Ptr are of operand type MO_Register.
67 // - Constant is of operand type MO_SignExtendedImmed on the SPARC.
69 // For the register operands, the virtual register type is as follows:
71 // - Reg will be of virtual register type MO_MInstrVirtualReg. The field
72 // MachineInstr* minstr will point to the instruction that computes reg.
74 // - %sp will be of virtual register type MO_MachineReg.
75 // The field regNum identifies the machine register.
77 // - NumElements will be of virtual register type MO_VirtualReg.
78 // The field Value* value identifies the value.
80 // - Ptr will also be of virtual register type MO_VirtualReg.
81 // Again, the field Value* value identifies the value.
83 //===----------------------------------------------------------------------===//
85 struct MachineOperand {
86 enum MachineOperandType {
87 MO_VirtualRegister, // virtual register for *value
88 MO_MachineRegister, // pre-assigned machine register `regNum'
93 MO_MachineBasicBlock, // MachineBasicBlock reference
94 MO_FrameIndex, // Abstract Stack Frame Index
95 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
96 MO_ExternalSymbol, // Name of external global symbol
97 MO_GlobalAddress, // Address of a global value
101 // Bit fields of the flags variable used for different operand properties
103 DEFFLAG = 0x01, // this is a def of the operand
104 USEFLAG = 0x02, // this is a use of the operand
105 HIFLAG32 = 0x04, // operand is %hi32(value_or_immedVal)
106 LOFLAG32 = 0x08, // operand is %lo32(value_or_immedVal)
107 HIFLAG64 = 0x10, // operand is %hi64(value_or_immedVal)
108 LOFLAG64 = 0x20, // operand is %lo64(value_or_immedVal)
109 PCRELATIVE = 0x40, // Operand is relative to PC, not a global address
114 Value* value; // BasicBlockVal for a label operand.
115 // ConstantVal for a non-address immediate.
116 // Virtual register for an SSA operand,
117 // including hidden operands required for
118 // the generated machine code.
119 // LLVM global for MO_GlobalAddress.
121 int64_t immedVal; // Constant value for an explicit constant
123 MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
124 std::string *SymbolName; // For MO_ExternalSymbol type
127 char flags; // see bit field definitions above
128 MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
129 int regNum; // register number for an explicit register
130 // will be set for a value after reg allocation
132 MachineOperand(int64_t ImmVal = 0, MachineOperandType OpTy = MO_VirtualRegister)
138 MachineOperand(int Reg, MachineOperandType OpTy, MOTy::UseType UseTy)
143 case MOTy::Use: flags = USEFLAG; break;
144 case MOTy::Def: flags = DEFFLAG; break;
145 case MOTy::UseAndDef: flags = DEFFLAG | USEFLAG; break;
146 default: assert(0 && "Invalid value for UseTy!");
150 MachineOperand(Value *V, MachineOperandType OpTy, MOTy::UseType UseTy,
151 bool isPCRelative = false)
152 : value(V), opType(OpTy), regNum(-1) {
154 case MOTy::Use: flags = USEFLAG; break;
155 case MOTy::Def: flags = DEFFLAG; break;
156 case MOTy::UseAndDef: flags = DEFFLAG | USEFLAG; break;
157 default: assert(0 && "Invalid value for UseTy!");
159 if (isPCRelative) flags |= PCRELATIVE;
162 MachineOperand(MachineBasicBlock *mbb)
163 : MBB(mbb), flags(0), opType(MO_MachineBasicBlock), regNum(-1) {}
165 MachineOperand(const std::string &SymName, bool isPCRelative)
166 : SymbolName(new std::string(SymName)), flags(isPCRelative ? PCRELATIVE :0),
167 opType(MO_ExternalSymbol), regNum(-1) {}
170 MachineOperand(const MachineOperand &M) : immedVal(M.immedVal),
174 if (isExternalSymbol())
175 SymbolName = new std::string(M.getSymbolName());
179 if (isExternalSymbol())
183 const MachineOperand &operator=(const MachineOperand &MO) {
184 if (isExternalSymbol()) // if old operand had a symbol name,
185 delete SymbolName; // release old memory
186 immedVal = MO.immedVal;
190 if (isExternalSymbol())
191 SymbolName = new std::string(MO.getSymbolName());
195 /// getType - Returns the MachineOperandType for this operand.
197 MachineOperandType getType() const { return opType; }
199 /// isPCRelative - This returns the value of the PCRELATIVE flag, which
200 /// indicates whether this operand should be emitted as a PC relative value
201 /// instead of a global address. This is used for operands of the forms:
202 /// MachineBasicBlock, GlobalAddress, ExternalSymbol
204 bool isPCRelative() const { return (flags & PCRELATIVE) != 0; }
206 /// isRegister - Return true if this operand is a register operand. The X86
207 /// backend currently can't decide whether to use MO_MR or MO_VR to represent
208 /// them, so we accept both.
210 /// Note: The sparc backend should not use this method.
212 bool isRegister() const {
213 return opType == MO_MachineRegister || opType == MO_VirtualRegister;
216 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
217 bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
218 bool isImmediate() const {
219 return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
221 bool isFrameIndex() const { return opType == MO_FrameIndex; }
222 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
223 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
224 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
226 Value* getVRegValue() const {
227 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
231 Value* getVRegValueOrNull() const {
232 return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
233 isPCRelativeDisp()) ? value : NULL;
235 int getMachineRegNum() const {
236 assert(opType == MO_MachineRegister);
239 int64_t getImmedValue() const { assert(isImmediate()); return immedVal; }
240 void setImmedValue(int64_t ImmVal) { assert(isImmediate()); immedVal=ImmVal; }
242 MachineBasicBlock *getMachineBasicBlock() const {
243 assert(isMachineBasicBlock() && "Can't get MBB in non-MBB operand!");
246 int getFrameIndex() const { assert(isFrameIndex()); return immedVal; }
247 unsigned getConstantPoolIndex() const {
248 assert(isConstantPoolIndex());
252 GlobalValue *getGlobal() const {
253 assert(isGlobalAddress());
254 return (GlobalValue*)value;
257 const std::string &getSymbolName() const {
258 assert(isExternalSymbol());
262 bool isUse () const { return flags & USEFLAG; }
263 MachineOperand& setUse () { flags |= USEFLAG; return *this; }
264 bool isDef () const { return flags & DEFFLAG; }
265 MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
266 bool isHiBits32 () const { return flags & HIFLAG32; }
267 bool isLoBits32 () const { return flags & LOFLAG32; }
268 bool isHiBits64 () const { return flags & HIFLAG64; }
269 bool isLoBits64 () const { return flags & LOFLAG64; }
271 // used to check if a machine register has been allocated to this operand
272 bool hasAllocatedReg() const {
273 return (regNum >= 0 &&
274 (opType == MO_VirtualRegister || opType == MO_CCRegister ||
275 opType == MO_MachineRegister));
278 // used to get the reg number if when one is allocated
279 int getAllocatedRegNum() const {
280 assert(hasAllocatedReg());
284 // ********** TODO: get rid of this duplicate code! ***********
285 unsigned getReg() const {
286 return getAllocatedRegNum();
288 void setReg(unsigned Reg) {
289 assert(hasAllocatedReg() && "This operand cannot have a register number!");
293 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
297 // Construction methods needed for fine-grain control.
298 // These must be accessed via coresponding methods in MachineInstr.
299 void markHi32() { flags |= HIFLAG32; }
300 void markLo32() { flags |= LOFLAG32; }
301 void markHi64() { flags |= HIFLAG64; }
302 void markLo64() { flags |= LOFLAG64; }
304 // Replaces the Value with its corresponding physical register after
305 // register allocation is complete
306 void setRegForValue(int reg) {
307 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
308 opType == MO_MachineRegister);
312 friend class MachineInstr;
316 //===----------------------------------------------------------------------===//
317 // class MachineInstr
320 // Representation of each machine instruction.
322 // MachineOpCode must be an enum, defined separately for each target.
323 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
325 // There are 2 kinds of operands:
327 // (1) Explicit operands of the machine instruction in vector operands[]
329 // (2) "Implicit operands" are values implicitly used or defined by the
330 // machine instruction, such as arguments to a CALL, return value of
331 // a CALL (if any), and return value of a RETURN.
332 //===----------------------------------------------------------------------===//
335 int Opcode; // the opcode
336 std::vector<MachineOperand> operands; // the operands
337 unsigned numImplicitRefs; // number of implicit operands
338 MachineInstr* prev, *next; // links for our intrusive list
339 // OperandComplete - Return true if it's illegal to add a new operand
340 bool OperandsComplete() const;
342 MachineInstr(const MachineInstr &); // DO NOT IMPLEMENT
343 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
346 // Intrusive list support
348 friend class ilist_traits<MachineInstr>;
349 MachineInstr() { /* this is for ilist use only to create the sentinel */ }
350 MachineInstr* getPrev() const { return prev; }
351 MachineInstr* getNext() const { return next; }
353 void setPrev(MachineInstr* mi) { prev = mi; }
354 void setNext(MachineInstr* mi) { next = mi; }
357 MachineInstr(int Opcode, unsigned numOperands);
359 /// MachineInstr ctor - This constructor only does a _reserve_ of the
360 /// operands, not a resize for them. It is expected that if you use this that
361 /// you call add* methods below to fill up the operands, instead of the Set
362 /// methods. Eventually, the "resizing" ctors will be phased out.
364 MachineInstr(int Opcode, unsigned numOperands, bool XX, bool YY);
366 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
367 /// the MachineInstr is created and added to the end of the specified basic
370 MachineInstr(MachineBasicBlock *MBB, int Opcode, unsigned numOps);
372 /// Accessors for opcode.
374 const int getOpcode() const { return Opcode; }
376 /// Access to explicit operands of the instruction.
378 unsigned getNumOperands() const { return operands.size() - numImplicitRefs; }
380 const MachineOperand& getOperand(unsigned i) const {
381 assert(i < getNumOperands() && "getOperand() out of range!");
384 MachineOperand& getOperand(unsigned i) {
385 assert(i < getNumOperands() && "getOperand() out of range!");
390 // Access to explicit or implicit operands of the instruction
391 // This returns the i'th entry in the operand vector.
392 // That represents the i'th explicit operand or the (i-N)'th implicit operand,
393 // depending on whether i < N or i >= N.
395 const MachineOperand& getExplOrImplOperand(unsigned i) const {
396 assert(i < operands.size() && "getExplOrImplOperand() out of range!");
397 return (i < getNumOperands()? getOperand(i)
398 : getImplicitOp(i - getNumOperands()));
402 // Access to implicit operands of the instruction
404 unsigned getNumImplicitRefs() const{ return numImplicitRefs; }
406 MachineOperand& getImplicitOp(unsigned i) {
407 assert(i < numImplicitRefs && "implicit ref# out of range!");
408 return operands[i + operands.size() - numImplicitRefs];
410 const MachineOperand& getImplicitOp(unsigned i) const {
411 assert(i < numImplicitRefs && "implicit ref# out of range!");
412 return operands[i + operands.size() - numImplicitRefs];
415 Value* getImplicitRef(unsigned i) {
416 return getImplicitOp(i).getVRegValue();
418 const Value* getImplicitRef(unsigned i) const {
419 return getImplicitOp(i).getVRegValue();
422 void addImplicitRef(Value* V, bool isDef = false, bool isDefAndUse = false) {
424 addRegOperand(V, isDef, isDefAndUse);
426 void setImplicitRef(unsigned i, Value* V) {
427 assert(i < getNumImplicitRefs() && "setImplicitRef() out of range!");
428 SetMachineOperandVal(i + getNumOperands(),
429 MachineOperand::MO_VirtualRegister, V);
435 void print(std::ostream &OS, const TargetMachine &TM) const;
437 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
440 // Define iterators to access the Value operands of the Machine Instruction.
441 // Note that these iterators only enumerate the explicit operands.
442 // begin() and end() are defined to produce these iterators...
444 template<class _MI, class _V> class ValOpIterator;
445 typedef ValOpIterator<const MachineInstr*,const Value*> const_val_op_iterator;
446 typedef ValOpIterator< MachineInstr*, Value*> val_op_iterator;
449 //===--------------------------------------------------------------------===//
450 // Accessors to add operands when building up machine instructions
453 /// addRegOperand - Add a MO_VirtualRegister operand to the end of the
456 void addRegOperand(Value *V, bool isDef, bool isDefAndUse=false) {
457 assert(!OperandsComplete() &&
458 "Trying to add an operand to a machine instr that is already done!");
459 operands.push_back(MachineOperand(V, MachineOperand::MO_VirtualRegister,
460 !isDef ? MOTy::Use : (isDefAndUse ? MOTy::UseAndDef : MOTy::Def)));
463 void addRegOperand(Value *V, MOTy::UseType UTy = MOTy::Use,
464 bool isPCRelative = false) {
465 assert(!OperandsComplete() &&
466 "Trying to add an operand to a machine instr that is already done!");
467 operands.push_back(MachineOperand(V, MachineOperand::MO_VirtualRegister,
471 void addCCRegOperand(Value *V, MOTy::UseType UTy = MOTy::Use) {
472 assert(!OperandsComplete() &&
473 "Trying to add an operand to a machine instr that is already done!");
474 operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
479 /// addRegOperand - Add a symbolic virtual register reference...
481 void addRegOperand(int reg, bool isDef) {
482 assert(!OperandsComplete() &&
483 "Trying to add an operand to a machine instr that is already done!");
484 operands.push_back(MachineOperand(reg, MachineOperand::MO_VirtualRegister,
485 isDef ? MOTy::Def : MOTy::Use));
488 /// addRegOperand - Add a symbolic virtual register reference...
490 void addRegOperand(int reg, MOTy::UseType UTy = MOTy::Use) {
491 assert(!OperandsComplete() &&
492 "Trying to add an operand to a machine instr that is already done!");
493 operands.push_back(MachineOperand(reg, MachineOperand::MO_VirtualRegister,
497 /// addPCDispOperand - Add a PC relative displacement operand to the MI
499 void addPCDispOperand(Value *V) {
500 assert(!OperandsComplete() &&
501 "Trying to add an operand to a machine instr that is already done!");
502 operands.push_back(MachineOperand(V, MachineOperand::MO_PCRelativeDisp,
506 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
508 void addMachineRegOperand(int reg, bool isDef) {
509 assert(!OperandsComplete() &&
510 "Trying to add an operand to a machine instr that is already done!");
511 operands.push_back(MachineOperand(reg, MachineOperand::MO_MachineRegister,
512 isDef ? MOTy::Def : MOTy::Use));
515 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
517 void addMachineRegOperand(int reg, MOTy::UseType UTy = MOTy::Use) {
518 assert(!OperandsComplete() &&
519 "Trying to add an operand to a machine instr that is already done!");
520 operands.push_back(MachineOperand(reg, MachineOperand::MO_MachineRegister,
524 /// addZeroExtImmOperand - Add a zero extended constant argument to the
525 /// machine instruction.
527 void addZeroExtImmOperand(int64_t intValue) {
528 assert(!OperandsComplete() &&
529 "Trying to add an operand to a machine instr that is already done!");
530 operands.push_back(MachineOperand(intValue,
531 MachineOperand::MO_UnextendedImmed));
534 /// addSignExtImmOperand - Add a zero extended constant argument to the
535 /// machine instruction.
537 void addSignExtImmOperand(int64_t intValue) {
538 assert(!OperandsComplete() &&
539 "Trying to add an operand to a machine instr that is already done!");
540 operands.push_back(MachineOperand(intValue,
541 MachineOperand::MO_SignExtendedImmed));
544 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
545 assert(!OperandsComplete() &&
546 "Trying to add an operand to a machine instr that is already done!");
547 operands.push_back(MachineOperand(MBB));
550 /// addFrameIndexOperand - Add an abstract frame index to the instruction
552 void addFrameIndexOperand(unsigned Idx) {
553 assert(!OperandsComplete() &&
554 "Trying to add an operand to a machine instr that is already done!");
555 operands.push_back(MachineOperand(Idx, MachineOperand::MO_FrameIndex));
558 /// addConstantPoolndexOperand - Add a constant pool object index to the
561 void addConstantPoolIndexOperand(unsigned I) {
562 assert(!OperandsComplete() &&
563 "Trying to add an operand to a machine instr that is already done!");
564 operands.push_back(MachineOperand(I, MachineOperand::MO_ConstantPoolIndex));
567 void addGlobalAddressOperand(GlobalValue *GV, bool isPCRelative) {
568 assert(!OperandsComplete() &&
569 "Trying to add an operand to a machine instr that is already done!");
570 operands.push_back(MachineOperand((Value*)GV,
571 MachineOperand::MO_GlobalAddress,
572 MOTy::Use, isPCRelative));
575 /// addExternalSymbolOperand - Add an external symbol operand to this instr
577 void addExternalSymbolOperand(const std::string &SymName, bool isPCRelative) {
578 operands.push_back(MachineOperand(SymName, isPCRelative));
581 //===--------------------------------------------------------------------===//
582 // Accessors used to modify instructions in place.
584 // FIXME: Move this stuff to MachineOperand itself!
586 /// replace - Support to rewrite a machine instruction in place: for now,
587 /// simply replace() and then set new operands with Set.*Operand methods
590 void replace(int Opcode, unsigned numOperands);
592 /// setOpcode - Replace the opcode of the current instruction with a new one.
594 void setOpcode(unsigned Op) { Opcode = Op; }
596 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
597 /// fewer operand than it started with.
599 void RemoveOperand(unsigned i) {
600 operands.erase(operands.begin()+i);
603 // Access to set the operands when building the machine instruction
605 void SetMachineOperandVal (unsigned i,
606 MachineOperand::MachineOperandType operandType,
609 void SetMachineOperandConst (unsigned i,
610 MachineOperand::MachineOperandType operandType,
613 void SetMachineOperandReg(unsigned i, int regNum);
616 unsigned substituteValue(const Value* oldVal, Value* newVal,
617 bool defsOnly, bool notDefsAndUses,
618 bool& someArgsWereIgnored);
620 void setOperandHi32(unsigned i) { operands[i].markHi32(); }
621 void setOperandLo32(unsigned i) { operands[i].markLo32(); }
622 void setOperandHi64(unsigned i) { operands[i].markHi64(); }
623 void setOperandLo64(unsigned i) { operands[i].markLo64(); }
626 // SetRegForOperand -
627 // SetRegForImplicitRef -
628 // Mark an explicit or implicit operand with its allocated physical register.
630 void SetRegForOperand(unsigned i, int regNum);
631 void SetRegForImplicitRef(unsigned i, int regNum);
634 // Iterator to enumerate machine operands.
636 template<class MITy, class VTy>
637 class ValOpIterator : public forward_iterator<VTy, ptrdiff_t> {
641 void skipToNextVal() {
642 while (i < MI->getNumOperands() &&
643 !( (MI->getOperand(i).getType() == MachineOperand::MO_VirtualRegister ||
644 MI->getOperand(i).getType() == MachineOperand::MO_CCRegister)
645 && MI->getOperand(i).getVRegValue() != 0))
649 inline ValOpIterator(MITy mi, unsigned I) : i(I), MI(mi) {
654 typedef ValOpIterator<MITy, VTy> _Self;
656 inline VTy operator*() const {
657 return MI->getOperand(i).getVRegValue();
660 const MachineOperand &getMachineOperand() const { return MI->getOperand(i);}
661 MachineOperand &getMachineOperand() { return MI->getOperand(i);}
663 inline VTy operator->() const { return operator*(); }
665 inline bool isUse() const { return MI->getOperand(i).isUse(); }
666 inline bool isDef() const { return MI->getOperand(i).isDef(); }
668 inline _Self& operator++() { i++; skipToNextVal(); return *this; }
669 inline _Self operator++(int) { _Self tmp = *this; ++*this; return tmp; }
671 inline bool operator==(const _Self &y) const {
674 inline bool operator!=(const _Self &y) const {
675 return !operator==(y);
678 static _Self begin(MITy MI) {
681 static _Self end(MITy MI) {
682 return _Self(MI, MI->getNumOperands());
686 // define begin() and end()
687 val_op_iterator begin() { return val_op_iterator::begin(this); }
688 val_op_iterator end() { return val_op_iterator::end(this); }
690 const_val_op_iterator begin() const {
691 return const_val_op_iterator::begin(this);
693 const_val_op_iterator end() const {
694 return const_val_op_iterator::end(this);
699 //===----------------------------------------------------------------------===//
702 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
703 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
704 void PrintMachineInstructions(const Function *F);
706 } // End llvm namespace