1 //===-- llvm/CodeGen/LiveVariables.h - Live Variable Analysis ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveVariable analysis pass. For each machine
11 // instruction in the function, this pass calculates the set of registers that
12 // are immediately dead after the instruction (i.e., the instruction calculates
13 // the value, but it is never used) and the set of registers that are used by
14 // the instruction, but are never used after the instruction (i.e., they are
17 // This class computes live variables using are sparse implementation based on
18 // the machine code SSA form. This class computes live variable information for
19 // each virtual and _register allocatable_ physical register in a function. It
20 // uses the dominance properties of SSA form to efficiently compute live
21 // variables for virtual registers, and assumes that physical registers are only
22 // live within a single basic block (allowing it to do a single local analysis
23 // to resolve physical register lifetimes in each basic block). If a physical
24 // register is not register allocatable, it is not tracked. This is useful for
25 // things like the stack pointer and condition codes.
27 //===----------------------------------------------------------------------===//
29 #ifndef LLVM_CODEGEN_LIVEVARIABLES_H
30 #define LLVM_CODEGEN_LIVEVARIABLES_H
32 #include "llvm/CodeGen/MachineFunctionPass.h"
39 class LiveVariables : public MachineFunctionPass {
42 /// DefInst - The machine instruction that defines this register.
43 MachineInstr *DefInst;
45 /// AliveBlocks - Set of blocks of which this value is alive completely
46 /// through. This is a bit set which uses the basic block number as an
49 std::vector<bool> AliveBlocks;
51 /// Kills - List of MachineBasicblock's which contain the last use of this
52 /// virtual register (kill it). This also includes the specific instruction
53 /// which kills the value.
55 std::vector<std::pair<MachineBasicBlock*, MachineInstr*> > Kills;
57 VarInfo() : DefInst(0) {}
59 /// removeKill - Delete a kill corresponding to the specified
60 /// machine instruction. Returns true if there was a kill
61 /// corresponding to this instruction, false otherwise.
62 bool removeKill(MachineInstr *MI) {
63 for (std::vector<std::pair<MachineBasicBlock*, MachineInstr*> >::iterator
64 i = Kills.begin(); i != Kills.end(); ++i) {
65 if (i->second == MI) {
75 /// VirtRegInfo - This list is a mapping from virtual register number to
76 /// variable information. FirstVirtualRegister is subtracted from the virtual
77 /// register number before indexing into this list.
79 std::vector<VarInfo> VirtRegInfo;
81 /// RegistersKilled - This multimap keeps track of all of the registers that
82 /// are dead immediately after an instruction reads its operands. If an
83 /// instruction does not have an entry in this map, it kills no registers.
85 std::multimap<MachineInstr*, unsigned> RegistersKilled;
87 /// RegistersDead - This multimap keeps track of all of the registers that are
88 /// dead immediately after an instruction executes, which are not dead after
89 /// the operands are evaluated. In practice, this only contains registers
90 /// which are defined by an instruction, but never used.
92 std::multimap<MachineInstr*, unsigned> RegistersDead;
94 /// AllocatablePhysicalRegisters - This vector keeps track of which registers
95 /// are actually register allocatable by the target machine. We can not track
96 /// liveness for values that are not in this set.
98 std::vector<bool> AllocatablePhysicalRegisters;
100 private: // Intermediate data structures
101 const MRegisterInfo *RegInfo;
103 MachineInstr **PhysRegInfo;
106 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
107 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI);
111 virtual bool runOnMachineFunction(MachineFunction &MF);
113 /// killed_iterator - Iterate over registers killed by a machine instruction
115 typedef std::multimap<MachineInstr*, unsigned>::iterator killed_iterator;
117 /// killed_begin/end - Get access to the range of registers killed by a
118 /// machine instruction.
119 killed_iterator killed_begin(MachineInstr *MI) {
120 return RegistersKilled.lower_bound(MI);
122 killed_iterator killed_end(MachineInstr *MI) {
123 return RegistersKilled.upper_bound(MI);
125 std::pair<killed_iterator, killed_iterator>
126 killed_range(MachineInstr *MI) {
127 return RegistersKilled.equal_range(MI);
130 killed_iterator dead_begin(MachineInstr *MI) {
131 return RegistersDead.lower_bound(MI);
133 killed_iterator dead_end(MachineInstr *MI) {
134 return RegistersDead.upper_bound(MI);
136 std::pair<killed_iterator, killed_iterator>
137 dead_range(MachineInstr *MI) {
138 return RegistersDead.equal_range(MI);
141 //===--------------------------------------------------------------------===//
142 // API to update live variable information
144 /// instructionChanged - When the address of an instruction changes, this
145 /// method should be called so that live variables can update its internal
146 /// data structures. This removes the records for OldMI, transfering them to
147 /// the records for NewMI.
148 void instructionChanged(MachineInstr *OldMI, MachineInstr *NewMI);
150 /// addVirtualRegisterKilled - Add information about the fact that the
151 /// specified register is killed after being used by the specified
154 void addVirtualRegisterKilled(unsigned IncomingReg,
155 MachineBasicBlock *MBB,
157 RegistersKilled.insert(std::make_pair(MI, IncomingReg));
158 getVarInfo(IncomingReg).Kills.push_back(std::make_pair(MBB, MI));
161 /// removeVirtualRegisterKilled - Remove the specified virtual
162 /// register from the live variable information. Returns true if the
163 /// variable was marked as killed by the specified instruction,
165 bool removeVirtualRegisterKilled(unsigned reg,
166 MachineBasicBlock *MBB,
168 if (!getVarInfo(reg).removeKill(MI))
170 for (killed_iterator i = killed_begin(MI), e = killed_end(MI); i != e; ) {
171 if (i->second == reg)
172 RegistersKilled.erase(i++);
179 /// removeVirtualRegistersKilled - Remove all of the specified killed
180 /// registers from the live variable information.
181 void removeVirtualRegistersKilled(killed_iterator B, killed_iterator E) {
182 for (killed_iterator I = B; I != E; ++I) { // Remove VarInfo entries...
183 bool removed = getVarInfo(I->second).removeKill(I->first);
184 assert(removed && "kill not in register's VarInfo?");
186 RegistersKilled.erase(B, E);
189 /// addVirtualRegisterDead - Add information about the fact that the specified
190 /// register is dead after being used by the specified instruction.
192 void addVirtualRegisterDead(unsigned IncomingReg,
193 MachineBasicBlock *MBB,
195 RegistersDead.insert(std::make_pair(MI, IncomingReg));
196 getVarInfo(IncomingReg).Kills.push_back(std::make_pair(MBB, MI));
199 /// removeVirtualRegisterDead - Remove the specified virtual
200 /// register from the live variable information. Returns true if the
201 /// variable was marked dead at the specified instruction, false
203 bool removeVirtualRegisterDead(unsigned reg,
204 MachineBasicBlock *MBB,
206 if (!getVarInfo(reg).removeKill(MI))
209 for (killed_iterator i = killed_begin(MI), e = killed_end(MI); i != e; ) {
210 if (i->second == reg)
211 RegistersKilled.erase(i++);
218 /// removeVirtualRegistersDead - Remove all of the specified dead
219 /// registers from the live variable information.
220 void removeVirtualRegistersDead(killed_iterator B, killed_iterator E) {
221 for (killed_iterator I = B; I != E; ++I) // Remove VarInfo entries...
222 getVarInfo(I->second).removeKill(I->first);
223 RegistersDead.erase(B, E);
226 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
227 AU.setPreservesAll();
230 virtual void releaseMemory() {
232 RegistersKilled.clear();
233 RegistersDead.clear();
236 /// getVarInfo - Return the VarInfo structure for the specified VIRTUAL
238 VarInfo &getVarInfo(unsigned RegIdx);
240 const std::vector<bool>& getAllocatablePhysicalRegisters() const {
241 return AllocatablePhysicalRegisters;
244 void MarkVirtRegAliveInBlock(VarInfo &VRInfo, MachineBasicBlock *BB);
245 void HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
249 } // End llvm namespace