1 //===---- LiveRangeEdit.h - Basic tools for split and spill -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // The LiveRangeEdit class represents changes done to a virtual register when it
11 // is spilled or split.
13 // The parent register is never changed. Instead, a number of new virtual
14 // registers are created and added to the newRegs vector.
16 //===----------------------------------------------------------------------===//
18 #ifndef LLVM_CODEGEN_LIVERANGEEDIT_H
19 #define LLVM_CODEGEN_LIVERANGEEDIT_H
21 #include "llvm/ADT/ArrayRef.h"
22 #include "llvm/ADT/SetVector.h"
23 #include "llvm/ADT/SmallPtrSet.h"
24 #include "llvm/CodeGen/LiveInterval.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/Target/TargetMachine.h"
32 class MachineBlockFrequencyInfo;
33 class MachineLoopInfo;
36 class LiveRangeEdit : private MachineRegisterInfo::Delegate {
38 /// Callback methods for LiveRangeEdit owners.
40 virtual void anchor();
42 /// Called immediately before erasing a dead machine instruction.
43 virtual void LRE_WillEraseInstruction(MachineInstr *MI) {}
45 /// Called when a virtual register is no longer used. Return false to defer
46 /// its deletion from LiveIntervals.
47 virtual bool LRE_CanEraseVirtReg(unsigned) { return true; }
49 /// Called before shrinking the live range of a virtual register.
50 virtual void LRE_WillShrinkVirtReg(unsigned) {}
52 /// Called after cloning a virtual register.
53 /// This is used for new registers representing connected components of Old.
54 virtual void LRE_DidCloneVirtReg(unsigned New, unsigned Old) {}
56 virtual ~Delegate() {}
61 SmallVectorImpl<unsigned> &NewRegs;
62 MachineRegisterInfo &MRI;
65 const TargetInstrInfo &TII;
66 Delegate *const TheDelegate;
68 /// FirstNew - Index of the first register added to NewRegs.
69 const unsigned FirstNew;
71 /// ScannedRemattable - true when remattable values have been identified.
72 bool ScannedRemattable;
74 /// Remattable - Values defined by remattable instructions as identified by
75 /// tii.isTriviallyReMaterializable().
76 SmallPtrSet<const VNInfo*,4> Remattable;
78 /// Rematted - Values that were actually rematted, and so need to have their
79 /// live range trimmed or entirely removed.
80 SmallPtrSet<const VNInfo*,4> Rematted;
82 /// scanRemattable - Identify the Parent values that may rematerialize.
83 void scanRemattable(AliasAnalysis *aa);
85 /// allUsesAvailableAt - Return true if all registers used by OrigMI at
86 /// OrigIdx are also available with the same value at UseIdx.
87 bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
88 SlotIndex UseIdx) const;
90 /// foldAsLoad - If LI has a single use and a single def that can be folded as
91 /// a load, eliminate the register by folding the def into the use.
92 bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr*> &Dead);
94 typedef SetVector<LiveInterval*,
95 SmallVector<LiveInterval*, 8>,
96 SmallPtrSet<LiveInterval*, 8> > ToShrinkSet;
97 /// Helper for eliminateDeadDefs.
98 void eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink);
100 /// MachineRegisterInfo callback to notify when new virtual
101 /// registers are created.
102 void MRI_NoteNewVirtualRegister(unsigned VReg);
105 /// Create a LiveRangeEdit for breaking down parent into smaller pieces.
106 /// @param parent The register being spilled or split.
107 /// @param newRegs List to receive any new registers created. This needn't be
108 /// empty initially, any existing registers are ignored.
109 /// @param MF The MachineFunction the live range edit is taking place in.
110 /// @param lis The collection of all live intervals in this function.
111 /// @param vrm Map of virtual registers to physical registers for this
112 /// function. If NULL, no virtual register map updates will
113 /// be done. This could be the case if called before Regalloc.
114 LiveRangeEdit(LiveInterval *parent,
115 SmallVectorImpl<unsigned> &newRegs,
119 Delegate *delegate = 0)
120 : Parent(parent), NewRegs(newRegs),
121 MRI(MF.getRegInfo()), LIS(lis), VRM(vrm),
122 TII(*MF.getTarget().getInstrInfo()),
123 TheDelegate(delegate),
124 FirstNew(newRegs.size()),
125 ScannedRemattable(false) { MRI.setDelegate(this); }
127 ~LiveRangeEdit() { MRI.resetDelegate(this); }
129 LiveInterval &getParent() const {
130 assert(Parent && "No parent LiveInterval");
133 unsigned getReg() const { return getParent().reg; }
135 /// Iterator for accessing the new registers added by this edit.
136 typedef SmallVectorImpl<unsigned>::const_iterator iterator;
137 iterator begin() const { return NewRegs.begin()+FirstNew; }
138 iterator end() const { return NewRegs.end(); }
139 unsigned size() const { return NewRegs.size()-FirstNew; }
140 bool empty() const { return size() == 0; }
141 unsigned get(unsigned idx) const { return NewRegs[idx+FirstNew]; }
143 ArrayRef<unsigned> regs() const {
144 return makeArrayRef(NewRegs).slice(FirstNew);
147 /// createFrom - Create a new virtual register based on OldReg.
148 LiveInterval &createFrom(unsigned OldReg);
150 /// create - Create a new register with the same class and original slot as
152 LiveInterval &create() {
153 return createFrom(getReg());
156 /// anyRematerializable - Return true if any parent values may be
157 /// rematerializable.
158 /// This function must be called before any rematerialization is attempted.
159 bool anyRematerializable(AliasAnalysis*);
161 /// checkRematerializable - Manually add VNI to the list of rematerializable
162 /// values if DefMI may be rematerializable.
163 bool checkRematerializable(VNInfo *VNI, const MachineInstr *DefMI,
166 /// Remat - Information needed to rematerialize at a specific location.
168 VNInfo *ParentVNI; // parent_'s value at the remat location.
169 MachineInstr *OrigMI; // Instruction defining ParentVNI.
170 explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI), OrigMI(0) {}
173 /// canRematerializeAt - Determine if ParentVNI can be rematerialized at
174 /// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI.
175 /// When cheapAsAMove is set, only cheap remats are allowed.
176 bool canRematerializeAt(Remat &RM,
180 /// rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an
181 /// instruction into MBB before MI. The new instruction is mapped, but
182 /// liveness is not updated.
183 /// Return the SlotIndex of the new instruction.
184 SlotIndex rematerializeAt(MachineBasicBlock &MBB,
185 MachineBasicBlock::iterator MI,
188 const TargetRegisterInfo&,
191 /// markRematerialized - explicitly mark a value as rematerialized after doing
193 void markRematerialized(const VNInfo *ParentVNI) {
194 Rematted.insert(ParentVNI);
197 /// didRematerialize - Return true if ParentVNI was rematerialized anywhere.
198 bool didRematerialize(const VNInfo *ParentVNI) const {
199 return Rematted.count(ParentVNI);
202 /// eraseVirtReg - Notify the delegate that Reg is no longer in use, and try
203 /// to erase it from LIS.
204 void eraseVirtReg(unsigned Reg);
206 /// eliminateDeadDefs - Try to delete machine instructions that are now dead
207 /// (allDefsAreDead returns true). This may cause live intervals to be trimmed
208 /// and further dead efs to be eliminated.
209 /// RegsBeingSpilled lists registers currently being spilled by the register
210 /// allocator. These registers should not be split into new intervals
211 /// as currently those new intervals are not guaranteed to spill.
212 void eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
213 ArrayRef<unsigned> RegsBeingSpilled = None);
215 /// calculateRegClassAndHint - Recompute register class and hint for each new
217 void calculateRegClassAndHint(MachineFunction&,
218 const MachineLoopInfo&,
219 const MachineBlockFrequencyInfo&);