1 //===-- LiveIntervalAnalysis.h - Live Interval Analysis ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveInterval analysis pass. Given some numbering of
11 // each the machine instructions (in this implemention depth-first order) an
12 // interval [i, j) is said to be a live interval for register v if there is no
13 // instruction with number j' > j such that v is live at j' abd there is no
14 // instruction with number i' < i such that v is live at i'. In this
15 // implementation intervals can have holes, i.e. an interval might look like
16 // [1,20), [50,65), [1000,1001).
18 //===----------------------------------------------------------------------===//
20 #ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
21 #define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/LiveInterval.h"
25 #include "llvm/ADT/BitVector.h"
26 #include "llvm/ADT/DenseMap.h"
27 #include "llvm/ADT/SmallPtrSet.h"
28 #include "llvm/ADT/SmallVector.h"
29 #include "llvm/Support/Allocator.h"
35 class TargetInstrInfo;
36 class TargetRegisterClass;
38 typedef std::pair<unsigned, MachineBasicBlock*> IdxMBBPair;
40 class LiveIntervals : public MachineFunctionPass {
42 const TargetMachine* tm_;
43 const MRegisterInfo* mri_;
44 const TargetInstrInfo* tii_;
47 /// Special pool allocator for VNInfo's (LiveInterval val#).
49 BumpPtrAllocator VNInfoAllocator;
51 /// MBB2IdxMap - The indexes of the first and last instructions in the
52 /// specified basic block.
53 std::vector<std::pair<unsigned, unsigned> > MBB2IdxMap;
55 /// Idx2MBBMap - Sorted list of pairs of index of first instruction
57 std::vector<IdxMBBPair> Idx2MBBMap;
59 typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
62 typedef std::vector<MachineInstr*> Index2MiMap;
65 typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
66 Reg2IntervalMap r2iMap_;
68 BitVector allocatableRegs_;
70 std::vector<MachineInstr*> ClonedMIs;
73 static char ID; // Pass identification, replacement for typeid
74 LiveIntervals() : MachineFunctionPass((intptr_t)&ID) {}
86 static unsigned getBaseIndex(unsigned index) {
87 return index - (index % InstrSlots::NUM);
89 static unsigned getBoundaryIndex(unsigned index) {
90 return getBaseIndex(index + InstrSlots::NUM - 1);
92 static unsigned getLoadIndex(unsigned index) {
93 return getBaseIndex(index) + InstrSlots::LOAD;
95 static unsigned getUseIndex(unsigned index) {
96 return getBaseIndex(index) + InstrSlots::USE;
98 static unsigned getDefIndex(unsigned index) {
99 return getBaseIndex(index) + InstrSlots::DEF;
101 static unsigned getStoreIndex(unsigned index) {
102 return getBaseIndex(index) + InstrSlots::STORE;
105 typedef Reg2IntervalMap::iterator iterator;
106 typedef Reg2IntervalMap::const_iterator const_iterator;
107 const_iterator begin() const { return r2iMap_.begin(); }
108 const_iterator end() const { return r2iMap_.end(); }
109 iterator begin() { return r2iMap_.begin(); }
110 iterator end() { return r2iMap_.end(); }
111 unsigned getNumIntervals() const { return r2iMap_.size(); }
113 LiveInterval &getInterval(unsigned reg) {
114 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
115 assert(I != r2iMap_.end() && "Interval does not exist for register");
119 const LiveInterval &getInterval(unsigned reg) const {
120 Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
121 assert(I != r2iMap_.end() && "Interval does not exist for register");
125 bool hasInterval(unsigned reg) const {
126 return r2iMap_.count(reg);
129 /// getMBBStartIdx - Return the base index of the first instruction in the
130 /// specified MachineBasicBlock.
131 unsigned getMBBStartIdx(MachineBasicBlock *MBB) const {
132 return getMBBStartIdx(MBB->getNumber());
134 unsigned getMBBStartIdx(unsigned MBBNo) const {
135 assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!");
136 return MBB2IdxMap[MBBNo].first;
139 /// getMBBEndIdx - Return the store index of the last instruction in the
140 /// specified MachineBasicBlock.
141 unsigned getMBBEndIdx(MachineBasicBlock *MBB) const {
142 return getMBBEndIdx(MBB->getNumber());
144 unsigned getMBBEndIdx(unsigned MBBNo) const {
145 assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!");
146 return MBB2IdxMap[MBBNo].second;
149 /// getInstructionIndex - returns the base index of instr
150 unsigned getInstructionIndex(MachineInstr* instr) const {
151 Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
152 assert(it != mi2iMap_.end() && "Invalid instruction!");
156 /// getInstructionFromIndex - given an index in any slot of an
157 /// instruction return a pointer the instruction
158 MachineInstr* getInstructionFromIndex(unsigned index) const {
159 index /= InstrSlots::NUM; // convert index to vector index
160 assert(index < i2miMap_.size() &&
161 "index does not correspond to an instruction");
162 return i2miMap_[index];
165 /// conflictsWithPhysRegDef - Returns true if the specified register
166 /// is defined during the duration of the specified interval.
167 bool conflictsWithPhysRegDef(const LiveInterval &li, VirtRegMap &vrm,
170 /// findLiveInMBBs - Given a live range, if the value of the range
171 /// is live in any MBB returns true as well as the list of basic blocks
172 /// where the value is live in.
173 bool findLiveInMBBs(const LiveRange &LR,
174 SmallVectorImpl<MachineBasicBlock*> &MBBs) const;
178 LiveInterval &getOrCreateInterval(unsigned reg) {
179 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
180 if (I == r2iMap_.end())
181 I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
185 std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
186 VirtRegMap& vrm, unsigned reg);
190 void removeInterval(unsigned Reg) {
194 /// isRemoved - returns true if the specified machine instr has been
196 bool isRemoved(MachineInstr* instr) const {
197 return !mi2iMap_.count(instr);
200 /// RemoveMachineInstrFromMaps - This marks the specified machine instr as
202 void RemoveMachineInstrFromMaps(MachineInstr *MI) {
203 // remove index -> MachineInstr and
204 // MachineInstr -> index mappings
205 Mi2IndexMap::iterator mi2i = mi2iMap_.find(MI);
206 if (mi2i != mi2iMap_.end()) {
207 i2miMap_[mi2i->second/InstrSlots::NUM] = 0;
208 mi2iMap_.erase(mi2i);
212 BumpPtrAllocator& getVNInfoAllocator() { return VNInfoAllocator; }
214 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
215 virtual void releaseMemory();
217 /// runOnMachineFunction - pass entry point
218 virtual bool runOnMachineFunction(MachineFunction&);
220 /// print - Implement the dump method.
221 virtual void print(std::ostream &O, const Module* = 0) const;
222 void print(std::ostream *O, const Module* M = 0) const {
227 /// computeIntervals - Compute live intervals.
228 void computeIntervals();
230 /// handleRegisterDef - update intervals for a register def
231 /// (calls handlePhysicalRegisterDef and
232 /// handleVirtualRegisterDef)
233 void handleRegisterDef(MachineBasicBlock *MBB,
234 MachineBasicBlock::iterator MI, unsigned MIIdx,
237 /// handleVirtualRegisterDef - update intervals for a virtual
239 void handleVirtualRegisterDef(MachineBasicBlock *MBB,
240 MachineBasicBlock::iterator MI,
242 LiveInterval& interval);
244 /// handlePhysicalRegisterDef - update intervals for a physical register
246 void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
247 MachineBasicBlock::iterator mi,
249 LiveInterval &interval,
252 /// handleLiveInRegister - Create interval for a livein register.
253 void handleLiveInRegister(MachineBasicBlock* mbb,
255 LiveInterval &interval, bool isAlias = false);
257 /// isReMaterializable - Returns true if the definition MI of the specified
258 /// val# of the specified interval is re-materializable.
259 bool isReMaterializable(const LiveInterval &li, const VNInfo *ValNo,
262 /// tryFoldMemoryOperand - Attempts to fold either a spill / restore from
263 /// slot / to reg or any rematerialized load into ith operand of specified
264 /// MI. If it is successul, MI is updated with the newly created MI and
266 bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm,
267 MachineInstr *DefMI, unsigned index, unsigned i,
268 bool isSS, int slot, unsigned reg);
270 static LiveInterval createInterval(unsigned Reg);
272 void printRegName(unsigned reg) const;
275 } // End llvm namespace