1 //===-- LiveIntervalAnalysis.h - Live Interval Analysis ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveInterval analysis pass. Given some numbering of
11 // each the machine instructions (in this implemention depth-first order) an
12 // interval [i, j) is said to be a live interval for register v if there is no
13 // instruction with number j' > j such that v is live at j' abd there is no
14 // instruction with number i' < i such that v is live at i'. In this
15 // implementation intervals can have holes, i.e. an interval might look like
16 // [1,20), [50,65), [1000,1001).
18 //===----------------------------------------------------------------------===//
20 #ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
21 #define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/LiveInterval.h"
25 #include "llvm/ADT/BitVector.h"
26 #include "llvm/ADT/IndexedMap.h"
32 class TargetInstrInfo;
35 class LiveIntervals : public MachineFunctionPass {
37 const TargetMachine* tm_;
38 const MRegisterInfo* mri_;
39 const TargetInstrInfo* tii_;
42 /// MBB2IdxMap - The index of the first instruction in the specified basic
44 std::vector<unsigned> MBB2IdxMap;
46 typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
49 typedef std::vector<MachineInstr*> Index2MiMap;
52 typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
53 Reg2IntervalMap r2iMap_;
55 typedef IndexedMap<unsigned> Reg2RegMap;
58 BitVector allocatableRegs_;
63 unsigned SrcReg, DstReg;
65 CopyRec getCopyRec(MachineInstr *MI, unsigned SrcReg, unsigned DstReg) {
82 static unsigned getBaseIndex(unsigned index) {
83 return index - (index % InstrSlots::NUM);
85 static unsigned getBoundaryIndex(unsigned index) {
86 return getBaseIndex(index + InstrSlots::NUM - 1);
88 static unsigned getLoadIndex(unsigned index) {
89 return getBaseIndex(index) + InstrSlots::LOAD;
91 static unsigned getUseIndex(unsigned index) {
92 return getBaseIndex(index) + InstrSlots::USE;
94 static unsigned getDefIndex(unsigned index) {
95 return getBaseIndex(index) + InstrSlots::DEF;
97 static unsigned getStoreIndex(unsigned index) {
98 return getBaseIndex(index) + InstrSlots::STORE;
101 typedef Reg2IntervalMap::iterator iterator;
102 typedef Reg2IntervalMap::const_iterator const_iterator;
103 const_iterator begin() const { return r2iMap_.begin(); }
104 const_iterator end() const { return r2iMap_.end(); }
105 iterator begin() { return r2iMap_.begin(); }
106 iterator end() { return r2iMap_.end(); }
107 unsigned getNumIntervals() const { return r2iMap_.size(); }
109 LiveInterval &getInterval(unsigned reg) {
110 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
111 assert(I != r2iMap_.end() && "Interval does not exist for register");
115 const LiveInterval &getInterval(unsigned reg) const {
116 Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
117 assert(I != r2iMap_.end() && "Interval does not exist for register");
121 /// getMBBStartIdx - Return the base index of the first instruction in the
122 /// specified MachineBasicBlock.
123 unsigned getMBBStartIdx(MachineBasicBlock *MBB) const {
124 return getMBBStartIdx(MBB->getNumber());
127 unsigned getMBBStartIdx(unsigned MBBNo) const {
128 assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!");
129 return MBB2IdxMap[MBBNo];
132 /// getInstructionIndex - returns the base index of instr
133 unsigned getInstructionIndex(MachineInstr* instr) const {
134 Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
135 assert(it != mi2iMap_.end() && "Invalid instruction!");
139 /// getInstructionFromIndex - given an index in any slot of an
140 /// instruction return a pointer the instruction
141 MachineInstr* getInstructionFromIndex(unsigned index) const {
142 index /= InstrSlots::NUM; // convert index to vector index
143 assert(index < i2miMap_.size() &&
144 "index does not correspond to an instruction");
145 return i2miMap_[index];
148 std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
152 /// CreateNewLiveInterval - Create a new live interval with the given live
153 /// ranges. The new live interval will have an infinite spill weight.
154 LiveInterval &CreateNewLiveInterval(const LiveInterval *LI,
155 const std::vector<LiveRange> &LRs);
157 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
158 virtual void releaseMemory();
160 /// runOnMachineFunction - pass entry point
161 virtual bool runOnMachineFunction(MachineFunction&);
163 /// print - Implement the dump method.
164 virtual void print(std::ostream &O, const Module* = 0) const;
165 void print(std::ostream *O, const Module* M = 0) const {
170 /// RemoveMachineInstrFromMaps - This marks the specified machine instr as
172 void RemoveMachineInstrFromMaps(MachineInstr *MI) {
173 // remove index -> MachineInstr and
174 // MachineInstr -> index mappings
175 Mi2IndexMap::iterator mi2i = mi2iMap_.find(MI);
176 if (mi2i != mi2iMap_.end()) {
177 i2miMap_[mi2i->second/InstrSlots::NUM] = 0;
178 mi2iMap_.erase(mi2i);
182 /// computeIntervals - Compute live intervals.
183 void computeIntervals();
185 /// joinIntervals - join compatible live intervals
186 void joinIntervals();
188 /// CopyCoallesceInMBB - Coallsece copies in the specified MBB, putting
189 /// copies that cannot yet be coallesced into the "TryAgain" list.
190 void CopyCoallesceInMBB(MachineBasicBlock *MBB,
191 std::vector<CopyRec> &TryAgain);
192 /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
193 /// which are the src/dst of the copy instruction CopyMI. This returns true
194 /// if the copy was successfully coallesced away, or if it is never possible
195 /// to coallesce these this copy, due to register constraints. It returns
196 /// false if it is not currently possible to coallesce this interval, but
197 /// it may be possible if other things get coallesced.
198 bool JoinCopy(MachineInstr *CopyMI, unsigned SrcReg, unsigned DstReg);
200 /// JoinIntervals - Attempt to join these two intervals. On failure, this
201 /// returns false. Otherwise, if one of the intervals being joined is a
202 /// physreg, this method always canonicalizes DestInt to be it. The output
203 /// "SrcInt" will not have been modified, so we can use this information
204 /// below to update aliases.
205 bool JoinIntervals(LiveInterval &LHS, LiveInterval &RHS);
207 /// SimpleJoin - Attempt to join the specified interval into this one. The
208 /// caller of this method must guarantee that the RHS only contains a single
209 /// value number and that the RHS is not defined by a copy from this
210 /// interval. This returns false if the intervals are not joinable, or it
211 /// joins them and returns true.
212 bool SimpleJoin(LiveInterval &LHS, LiveInterval &RHS);
214 /// handleRegisterDef - update intervals for a register def
215 /// (calls handlePhysicalRegisterDef and
216 /// handleVirtualRegisterDef)
217 void handleRegisterDef(MachineBasicBlock *MBB,
218 MachineBasicBlock::iterator MI, unsigned MIIdx,
221 /// handleVirtualRegisterDef - update intervals for a virtual
223 void handleVirtualRegisterDef(MachineBasicBlock *MBB,
224 MachineBasicBlock::iterator MI,
226 LiveInterval& interval);
228 /// handlePhysicalRegisterDef - update intervals for a physical register
230 void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
231 MachineBasicBlock::iterator mi,
233 LiveInterval &interval,
236 /// Return true if the two specified registers belong to different
237 /// register classes. The registers may be either phys or virt regs.
238 bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
241 bool AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
242 MachineInstr *CopyMI);
244 bool overlapsAliases(const LiveInterval *lhs,
245 const LiveInterval *rhs) const;
247 static LiveInterval createInterval(unsigned Reg);
249 LiveInterval &getOrCreateInterval(unsigned reg) {
250 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
251 if (I == r2iMap_.end())
252 I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
256 /// rep - returns the representative of this register
257 unsigned rep(unsigned Reg) {
258 unsigned Rep = r2rMap_[Reg];
260 return r2rMap_[Reg] = rep(Rep);
264 void printRegName(unsigned reg) const;
267 } // End llvm namespace