1 //===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares codegen opcodes and related utilities.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_ISDOPCODES_H
15 #define LLVM_CODEGEN_ISDOPCODES_H
19 /// ISD namespace - This namespace contains an enum which represents all of the
20 /// SelectionDAG node types and value types.
24 //===--------------------------------------------------------------------===//
25 /// ISD::NodeType enum - This enum defines the target-independent operators
26 /// for a SelectionDAG.
28 /// Targets may also define target-dependent operator codes for SDNodes. For
29 /// example, on x86, these are the enum values in the X86ISD namespace.
30 /// Targets should aim to use target-independent operators to model their
31 /// instruction sets as much as possible, and only use target-dependent
32 /// operators when they have special requirements.
34 /// Finally, during and after selection proper, SNodes may use special
35 /// operator codes that correspond directly with MachineInstr opcodes. These
36 /// are used to represent selected instructions. See the isMachineOpcode()
37 /// and getMachineOpcode() member functions of SDNode.
40 // DELETED_NODE - This is an illegal value that is used to catch
41 // errors. This opcode is not a legal opcode for any node.
44 // EntryToken - This is the marker used to indicate the start of the region.
47 // TokenFactor - This node takes multiple tokens as input and produces a
48 // single token result. This is used to represent the fact that the operand
49 // operators are independent of each other.
52 // AssertSext, AssertZext - These nodes record if a register contains a
53 // value that has already been zero or sign extended from a narrower type.
54 // These nodes take two operands. The first is the node that has already
55 // been extended, and the second is a value type node indicating the width
57 AssertSext, AssertZext,
59 // Various leaf nodes.
60 BasicBlock, VALUETYPE, CONDCODE, Register,
62 GlobalAddress, GlobalTLSAddress, FrameIndex,
63 JumpTable, ConstantPool, ExternalSymbol, BlockAddress,
65 // The address of the GOT
68 // FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and
69 // llvm.returnaddress on the DAG. These nodes take one operand, the index
70 // of the frame or return address to return. An index of zero corresponds
71 // to the current function's frame or return address, an index of one to the
72 // parent's frame or return address, and so on.
73 FRAMEADDR, RETURNADDR,
75 // STACKADDR - The current stack pointer address.
78 // FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to
79 // first (possible) on-stack argument. This is needed for correct stack
80 // adjustment during unwind.
83 // RESULT, OUTCHAIN = EXCEPTIONADDR(INCHAIN) - This node represents the
84 // address of the exception block on entry to an landing pad block.
87 // RESULT, OUTCHAIN = LSDAADDR(INCHAIN) - This node represents the
88 // address of the Language Specific Data Area for the enclosing function.
91 // RESULT, OUTCHAIN = EHSELECTION(INCHAIN, EXCEPTION) - This node represents
92 // the selection index of the exception thrown.
95 // OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents
96 // 'eh_return' gcc dwarf builtin, which is used to return from
97 // exception. The general meaning is: adjust stack by OFFSET and pass
98 // execution to HANDLER. Many platform-related details also :)
101 // OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer)
102 // This corresponds to the eh.sjlj.setjmp intrinsic.
103 // It takes an input chain and a pointer to the jump buffer as inputs
104 // and returns an outchain.
107 // OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer)
108 // This corresponds to the eh.sjlj.longjmp intrinsic.
109 // It takes an input chain and a pointer to the jump buffer as inputs
110 // and returns an outchain.
113 // TargetConstant* - Like Constant*, but the DAG does not do any folding,
114 // simplification, or lowering of the constant. They are used for constants
115 // which are known to fit in the immediate fields of their users, or for
116 // carrying magic numbers which are not values which need to be materialized
121 // TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or
122 // anything else with this node, and this is valid in the target-specific
123 // dag, turning into a GlobalAddress operand.
125 TargetGlobalTLSAddress,
129 TargetExternalSymbol,
132 /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...)
133 /// This node represents a target intrinsic function with no side effects.
134 /// The first operand is the ID number of the intrinsic from the
135 /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The
136 /// node has returns the result of the intrinsic.
139 /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...)
140 /// This node represents a target intrinsic function with side effects that
141 /// returns a result. The first operand is a chain pointer. The second is
142 /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The
143 /// operands to the intrinsic follow. The node has two results, the result
144 /// of the intrinsic and an output chain.
147 /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...)
148 /// This node represents a target intrinsic function with side effects that
149 /// does not return a result. The first operand is a chain pointer. The
150 /// second is the ID number of the intrinsic from the llvm::Intrinsic
151 /// namespace. The operands to the intrinsic follow.
154 // CopyToReg - This node has three operands: a chain, a register number to
155 // set to this value, and a value.
158 // CopyFromReg - This node indicates that the input value is a virtual or
159 // physical register that is defined outside of the scope of this
160 // SelectionDAG. The register is available from the RegisterSDNode object.
163 // UNDEF - An undefined node
166 // EXTRACT_ELEMENT - This is used to get the lower or upper (determined by
167 // a Constant, which is required to be operand #1) half of the integer or
168 // float value specified as operand #0. This is only for use before
169 // legalization, for values that will be broken into multiple registers.
172 // BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. Given
173 // two values of the same integer value type, this produces a value twice as
174 // big. Like EXTRACT_ELEMENT, this can only be used before legalization.
177 // MERGE_VALUES - This node takes multiple discrete operands and returns
178 // them all as its individual results. This nodes has exactly the same
179 // number of inputs and outputs. This node is useful for some pieces of the
180 // code generator that want to think about a single node with multiple
181 // results, not multiple nodes.
184 // Simple integer binary arithmetic operators.
185 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
187 // SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing
188 // a signed/unsigned value of type i[2*N], and return the full value as
189 // two results, each of type iN.
190 SMUL_LOHI, UMUL_LOHI,
192 // SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
196 // CARRY_FALSE - This node is used when folding other nodes,
197 // like ADDC/SUBC, which indicate the carry result is always false.
200 // Carry-setting nodes for multiple precision addition and subtraction.
201 // These nodes take two operands of the same value type, and produce two
202 // results. The first result is the normal add or sub result, the second
203 // result is the carry flag result.
206 // Carry-using nodes for multiple precision addition and subtraction. These
207 // nodes take three operands: The first two are the normal lhs and rhs to
208 // the add or sub, and the third is the input carry flag. These nodes
209 // produce two results; the normal result of the add or sub, and the output
210 // carry flag. These nodes both read and write a carry flag to allow them
211 // to them to be chained together for add and sub of arbitrarily large
215 // RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
216 // These nodes take two operands: the normal LHS and RHS to the add. They
217 // produce two results: the normal result of the add, and a boolean that
218 // indicates if an overflow occured (*not* a flag, because it may be stored
219 // to memory, etc.). If the type of the boolean is not i1 then the high
220 // bits conform to getBooleanContents.
221 // These nodes are generated from the llvm.[su]add.with.overflow intrinsics.
224 // Same for subtraction
227 // Same for multiplication
230 // Simple binary floating point operators.
231 FADD, FSUB, FMUL, FDIV, FREM,
233 // FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This
234 // DAG node does not require that X and Y have the same type, just that they
235 // are both floating point. X and the result must have the same type.
236 // FCOPYSIGN(f32, f64) is allowed.
239 // INT = FGETSIGN(FP) - Return the sign bit of the specified floating point
240 // value as an integer 0/1 value.
243 /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the
244 /// specified, possibly variable, elements. The number of elements is
245 /// required to be a power of two. The types of the operands must all be
246 /// the same and must match the vector element type, except that integer
247 /// types are allowed to be larger than the element type, in which case
248 /// the operands are implicitly truncated.
251 /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element
252 /// at IDX replaced with VAL. If the type of VAL is larger than the vector
253 /// element type then VAL is truncated before replacement.
256 /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR
257 /// identified by the (potentially variable) element number IDX. If the
258 /// return type is an integer type larger than the element type of the
259 /// vector, the result is extended to the width of the return type.
262 /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of
263 /// vector type with the same length and element type, this produces a
264 /// concatenated vector result value, with length equal to the sum of the
265 /// lengths of the input vectors.
268 /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an
269 /// vector value) starting with the (potentially variable) element number
270 /// IDX, which must be a multiple of the result vector length.
273 /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as
274 /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int
275 /// values that indicate which value (or undef) each result element will
276 /// get. These constant ints are accessible through the
277 /// ShuffleVectorSDNode class. This is quite similar to the Altivec
278 /// 'vperm' instruction, except that the indices must be constants and are
279 /// in terms of the element size of VEC1/VEC2, not in terms of bytes.
282 /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a
283 /// scalar value into element 0 of the resultant vector type. The top
284 /// elements 1 to N-1 of the N-element vector are undefined. The type
285 /// of the operand must match the vector element type, except when they
286 /// are integer types. In this case the operand is allowed to be wider
287 /// than the vector element type, and is implicitly truncated to it.
290 // MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing
291 // an unsigned/signed value of type i[2*N], then return the top part.
294 // Bitwise operators - logical and, logical or, logical xor, shift left,
295 // shift right algebraic (shift in sign bits), shift right logical (shift in
296 // zeroes), rotate left, rotate right, and byteswap.
297 AND, OR, XOR, SHL, SRA, SRL, ROTL, ROTR, BSWAP,
299 // Counting operators
302 // Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not
303 // i1 then the high bits must conform to getBooleanContents.
306 // Select with condition operator - This selects between a true value and
307 // a false value (ops #2 and #3) based on the boolean result of comparing
308 // the lhs and rhs (ops #0 and #1) of a conditional expression with the
309 // condition code in op #4, a CondCodeSDNode.
312 // SetCC operator - This evaluates to a true value iff the condition is
313 // true. If the result value type is not i1 then the high bits conform
314 // to getBooleanContents. The operands to this are the left and right
315 // operands to compare (ops #0, and #1) and the condition code to compare
316 // them with (op #2) as a CondCodeSDNode.
319 // RESULT = VSETCC(LHS, RHS, COND) operator - This evaluates to a vector of
320 // integer elements with all bits of the result elements set to true if the
321 // comparison is true or all cleared if the comparison is false. The
322 // operands to this are the left and right operands to compare (LHS/RHS) and
323 // the condition code to compare them with (COND) as a CondCodeSDNode.
326 // SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded
327 // integer shift operations, just like ADD/SUB_PARTS. The operation
329 // [Lo,Hi] = op [LoLHS,HiLHS], Amt
330 SHL_PARTS, SRA_PARTS, SRL_PARTS,
332 // Conversion operators. These are all single input single output
333 // operations. For all of these, the result type must be strictly
334 // wider or narrower (depending on the operation) than the source
337 // SIGN_EXTEND - Used for integer types, replicating the sign bit
341 // ZERO_EXTEND - Used for integer types, zeroing the new bits.
344 // ANY_EXTEND - Used for integer types. The high bits are undefined.
347 // TRUNCATE - Completely drop the high bits.
350 // [SU]INT_TO_FP - These operators convert integers (whose interpreted sign
351 // depends on the first letter) to floating point.
355 // SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
356 // sign extend a small value in a large integer register (e.g. sign
357 // extending the low 8 bits of a 32-bit register to fill the top 24 bits
358 // with the 7th bit). The size of the smaller type is indicated by the 1th
359 // operand, a ValueType node.
362 /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned
367 /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type
368 /// down to the precision of the destination VT. TRUNC is a flag, which is
369 /// always an integer that is zero or one. If TRUNC is 0, this is a
370 /// normal rounding, if it is 1, this FP_ROUND is known to not change the
373 /// The TRUNC = 1 case is used in cases where we know that the value will
374 /// not be modified by the node, because Y is not using any of the extra
375 /// precision of source type. This allows certain transformations like
376 /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for
377 /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
380 // FLT_ROUNDS_ - Returns current rounding mode:
383 // 1 Round to nearest
388 /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and
389 /// rounds it to a floating point value. It then promotes it and returns it
390 /// in a register of the same size. This operation effectively just
391 /// discards excess precision. The type to round down to is specified by
392 /// the VT operand, a VTSDNode.
395 /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
398 // BIT_CONVERT - This operator converts between integer, vector and FP
399 // values, as if the value was stored to memory with one type and loaded
400 // from the same address with the other type (or equivalently for vector
401 // format conversions, etc). The source and result are required to have
402 // the same bit size (e.g. f32 <-> i32). This can also be used for
403 // int-to-int or fp-to-fp conversions, but that is a noop, deleted by
407 // CONVERT_RNDSAT - This operator is used to support various conversions
408 // between various types (float, signed, unsigned and vectors of those
409 // types) with rounding and saturation. NOTE: Avoid using this operator as
410 // most target don't support it and the operator might be removed in the
411 // future. It takes the following arguments:
413 // 1) dest type (type to convert to)
414 // 2) src type (type to convert from)
417 // 5) ISD::CvtCode indicating the type of conversion to do
420 // FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform
421 // promotions and truncation for half-precision (16 bit) floating
422 // numbers. We need special nodes since FP16 is a storage-only type with
423 // special semantics of operations.
424 FP16_TO_FP32, FP32_TO_FP16,
426 // FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
427 // FLOG, FLOG2, FLOG10, FEXP, FEXP2,
428 // FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR - Perform various unary floating
429 // point operations. These are inspired by libm.
430 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
431 FLOG, FLOG2, FLOG10, FEXP, FEXP2,
432 FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR,
434 // LOAD and STORE have token chains as their first operand, then the same
435 // operands as an LLVM load/store instruction, then an offset node that
436 // is added / subtracted from the base pointer to form the address (for
437 // indexed memory ops).
440 // DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned
441 // to a specified boundary. This node always has two return values: a new
442 // stack pointer value and a chain. The first operand is the token chain,
443 // the second is the number of bytes to allocate, and the third is the
444 // alignment boundary. The size is guaranteed to be a multiple of the stack
445 // alignment, and the alignment is guaranteed to be bigger than the stack
446 // alignment (if required) or 0 to get standard stack alignment.
449 // Control flow instructions. These all have token chains.
451 // BR - Unconditional branch. The first operand is the chain
452 // operand, the second is the MBB to branch to.
455 // BRIND - Indirect branch. The first operand is the chain, the second
456 // is the value to branch to, which must be of the same type as the target's
460 // BR_JT - Jumptable branch. The first operand is the chain, the second
461 // is the jumptable index, the last one is the jumptable entry index.
464 // BRCOND - Conditional branch. The first operand is the chain, the
465 // second is the condition, the third is the block to branch to if the
466 // condition is true. If the type of the condition is not i1, then the
467 // high bits must conform to getBooleanContents.
470 // BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
471 // that the condition is represented as condition code, and two nodes to
472 // compare, rather than as a combined SetCC node. The operands in order are
473 // chain, cc, lhs, rhs, block to branch to if condition is true.
476 // INLINEASM - Represents an inline asm block. This node always has two
477 // return values: a chain and a flag result. The inputs are as follows:
478 // Operand #0 : Input chain.
479 // Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string.
480 // Operand #2 : a MDNodeSDNode with the !srcloc metadata.
481 // After this, it is followed by a list of operands with this format:
482 // ConstantSDNode: Flags that encode whether it is a mem or not, the
483 // of operands that follow, etc. See InlineAsm.h.
484 // ... however many operands ...
485 // Operand #last: Optional, an incoming flag.
487 // The variable width operands are required to represent target addressing
488 // modes as a single "operand", even though they may have multiple
492 // EH_LABEL - Represents a label in mid basic block used to track
493 // locations needed for debug and exception handling tables. These nodes
494 // take a chain as input and return a chain.
497 // STACKSAVE - STACKSAVE has one operand, an input chain. It produces a
498 // value, the same type as the pointer type for the system, and an output
502 // STACKRESTORE has two operands, an input chain and a pointer to restore to
503 // it returns an output chain.
506 // CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of
507 // a call sequence, and carry arbitrary information that target might want
508 // to know. The first operand is a chain, the rest are specified by the
509 // target and not touched by the DAG optimizers.
510 // CALLSEQ_START..CALLSEQ_END pairs may not be nested.
511 CALLSEQ_START, // Beginning of a call sequence
512 CALLSEQ_END, // End of a call sequence
514 // VAARG - VAARG has three operands: an input chain, a pointer, and a
515 // SRCVALUE. It returns a pair of values: the vaarg value and a new chain.
518 // VACOPY - VACOPY has five operands: an input chain, a destination pointer,
519 // a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the
523 // VAEND, VASTART - VAEND and VASTART have three operands: an input chain, a
524 // pointer, and a SRCVALUE.
527 // SRCVALUE - This is a node type that holds a Value* that is used to
528 // make reference to a value in the LLVM IR.
531 // MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to
532 // reference metadata in the IR.
535 // PCMARKER - This corresponds to the pcmarker intrinsic.
538 // READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
539 // The only operand is a chain and a value and a chain are produced. The
540 // value is the contents of the architecture specific cycle counter like
541 // register (or other high accuracy low latency clock source)
544 // HANDLENODE node - Used as a handle for various purposes.
547 // TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
548 // It takes as input a token chain, the pointer to the trampoline,
549 // the pointer to the nested function, the pointer to pass for the
550 // 'nest' parameter, a SRCVALUE for the trampoline and another for
551 // the nested function (allowing targets to access the original
552 // Function*). It produces the result of the intrinsic and a token
556 // TRAP - Trapping instruction
559 // PREFETCH - This corresponds to a prefetch intrinsic. It takes chains are
560 // their first operand. The other operands are the address to prefetch,
561 // read / write specifier, and locality specifier.
564 // OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load,
565 // store-store, device)
566 // This corresponds to the memory.barrier intrinsic.
567 // it takes an input chain, 4 operands to specify the type of barrier, an
568 // operand specifying if the barrier applies to device and uncached memory
569 // and produces an output chain.
572 // Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap)
573 // this corresponds to the atomic.lcs intrinsic.
574 // cmp is compared to *ptr, and if equal, swap is stored in *ptr.
575 // the return is always the original value in *ptr
578 // Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt)
579 // this corresponds to the atomic.swap intrinsic.
580 // amt is stored to *ptr atomically.
581 // the return is always the original value in *ptr
584 // Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt)
585 // this corresponds to the atomic.load.[OpName] intrinsic.
586 // op(*ptr, amt) is stored to *ptr atomically.
587 // the return is always the original value in *ptr
599 /// BUILTIN_OP_END - This must be the last enum value in this list.
600 /// The target-specific pre-isel opcode values start here.
604 /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations
605 /// which do not reference a specific memory location should be less than
606 /// this value. Those that do must not be less than this value, and can
607 /// be used with SelectionDAG::getMemIntrinsicNode.
608 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+100;
610 //===--------------------------------------------------------------------===//
611 /// MemIndexedMode enum - This enum defines the load / store indexed
612 /// addressing modes.
614 /// UNINDEXED "Normal" load / store. The effective address is already
615 /// computed and is available in the base pointer. The offset
616 /// operand is always undefined. In addition to producing a
617 /// chain, an unindexed load produces one value (result of the
618 /// load); an unindexed store does not produce a value.
620 /// PRE_INC Similar to the unindexed mode where the effective address is
621 /// PRE_DEC the value of the base pointer add / subtract the offset.
622 /// It considers the computation as being folded into the load /
623 /// store operation (i.e. the load / store does the address
624 /// computation as well as performing the memory transaction).
625 /// The base operand is always undefined. In addition to
626 /// producing a chain, pre-indexed load produces two values
627 /// (result of the load and the result of the address
628 /// computation); a pre-indexed store produces one value (result
629 /// of the address computation).
631 /// POST_INC The effective address is the value of the base pointer. The
632 /// POST_DEC value of the offset operand is then added to / subtracted
633 /// from the base after memory transaction. In addition to
634 /// producing a chain, post-indexed load produces two values
635 /// (the result of the load and the result of the base +/- offset
636 /// computation); a post-indexed store produces one value (the
637 /// the result of the base +/- offset computation).
639 enum MemIndexedMode {
648 //===--------------------------------------------------------------------===//
649 /// LoadExtType enum - This enum defines the three variants of LOADEXT
650 /// (load with extension).
652 /// SEXTLOAD loads the integer operand and sign extends it to a larger
653 /// integer result type.
654 /// ZEXTLOAD loads the integer operand and zero extends it to a larger
655 /// integer result type.
656 /// EXTLOAD is used for three things: floating point extending loads,
657 /// integer extending loads [the top bits are undefined], and vector
658 /// extending loads [load into low elt].
668 //===--------------------------------------------------------------------===//
669 /// ISD::CondCode enum - These are ordered carefully to make the bitfields
670 /// below work out, when considering SETFALSE (something that never exists
671 /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered
672 /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal
673 /// to. If the "N" column is 1, the result of the comparison is undefined if
674 /// the input is a NAN.
676 /// All of these (except for the 'always folded ops') should be handled for
677 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
678 /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
680 /// Note that these are laid out in a specific order to allow bit-twiddling
681 /// to transform conditions.
683 // Opcode N U L G E Intuitive operation
684 SETFALSE, // 0 0 0 0 Always false (always folded)
685 SETOEQ, // 0 0 0 1 True if ordered and equal
686 SETOGT, // 0 0 1 0 True if ordered and greater than
687 SETOGE, // 0 0 1 1 True if ordered and greater than or equal
688 SETOLT, // 0 1 0 0 True if ordered and less than
689 SETOLE, // 0 1 0 1 True if ordered and less than or equal
690 SETONE, // 0 1 1 0 True if ordered and operands are unequal
691 SETO, // 0 1 1 1 True if ordered (no nans)
692 SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y)
693 SETUEQ, // 1 0 0 1 True if unordered or equal
694 SETUGT, // 1 0 1 0 True if unordered or greater than
695 SETUGE, // 1 0 1 1 True if unordered, greater than, or equal
696 SETULT, // 1 1 0 0 True if unordered or less than
697 SETULE, // 1 1 0 1 True if unordered, less than, or equal
698 SETUNE, // 1 1 1 0 True if unordered or not equal
699 SETTRUE, // 1 1 1 1 Always true (always folded)
700 // Don't care operations: undefined if the input is a nan.
701 SETFALSE2, // 1 X 0 0 0 Always false (always folded)
702 SETEQ, // 1 X 0 0 1 True if equal
703 SETGT, // 1 X 0 1 0 True if greater than
704 SETGE, // 1 X 0 1 1 True if greater than or equal
705 SETLT, // 1 X 1 0 0 True if less than
706 SETLE, // 1 X 1 0 1 True if less than or equal
707 SETNE, // 1 X 1 1 0 True if not equal
708 SETTRUE2, // 1 X 1 1 1 Always true (always folded)
710 SETCC_INVALID // Marker value.
713 /// isSignedIntSetCC - Return true if this is a setcc instruction that
714 /// performs a signed comparison when used with integer operands.
715 inline bool isSignedIntSetCC(CondCode Code) {
716 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE;
719 /// isUnsignedIntSetCC - Return true if this is a setcc instruction that
720 /// performs an unsigned comparison when used with integer operands.
721 inline bool isUnsignedIntSetCC(CondCode Code) {
722 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
725 /// isTrueWhenEqual - Return true if the specified condition returns true if
726 /// the two operands to the condition are equal. Note that if one of the two
727 /// operands is a NaN, this value is meaningless.
728 inline bool isTrueWhenEqual(CondCode Cond) {
729 return ((int)Cond & 1) != 0;
732 /// getUnorderedFlavor - This function returns 0 if the condition is always
733 /// false if an operand is a NaN, 1 if the condition is always true if the
734 /// operand is a NaN, and 2 if the condition is undefined if the operand is a
736 inline unsigned getUnorderedFlavor(CondCode Cond) {
737 return ((int)Cond >> 3) & 3;
740 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
741 /// 'op' is a valid SetCC operation.
742 CondCode getSetCCInverse(CondCode Operation, bool isInteger);
744 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
745 /// when given the operation for (X op Y).
746 CondCode getSetCCSwappedOperands(CondCode Operation);
748 /// getSetCCOrOperation - Return the result of a logical OR between different
749 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This
750 /// function returns SETCC_INVALID if it is not possible to represent the
751 /// resultant comparison.
752 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
754 /// getSetCCAndOperation - Return the result of a logical AND between
755 /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
756 /// function returns SETCC_INVALID if it is not possible to represent the
757 /// resultant comparison.
758 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
760 //===--------------------------------------------------------------------===//
761 /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT
764 CVT_FF, // Float from Float
765 CVT_FS, // Float from Signed
766 CVT_FU, // Float from Unsigned
767 CVT_SF, // Signed from Float
768 CVT_UF, // Unsigned from Float
769 CVT_SS, // Signed from Signed
770 CVT_SU, // Signed from Unsigned
771 CVT_US, // Unsigned from Signed
772 CVT_UU, // Unsigned from Unsigned
773 CVT_INVALID // Marker - Invalid opcode
776 } // end llvm::ISD namespace
778 } // end llvm namespace