1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements routines for translating functions from LLVM IR into
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
16 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
18 #include "llvm/InlineAsm.h"
19 #include "llvm/Instructions.h"
20 #include "llvm/ADT/APInt.h"
21 #include "llvm/ADT/DenseMap.h"
22 #include "llvm/ADT/IndexedMap.h"
23 #include "llvm/ADT/SmallVector.h"
25 #include "llvm/ADT/SmallSet.h"
27 #include "llvm/Analysis/BranchProbabilityInfo.h"
28 #include "llvm/CodeGen/ValueTypes.h"
29 #include "llvm/CodeGen/ISDOpcodes.h"
30 #include "llvm/CodeGen/MachineBasicBlock.h"
31 #include "llvm/Support/CallSite.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
44 class MachineBasicBlock;
45 class MachineFunction;
46 class MachineModuleInfo;
47 class MachineRegisterInfo;
51 //===--------------------------------------------------------------------===//
52 /// FunctionLoweringInfo - This contains information that is global to a
53 /// function that is used when lowering a region of the function.
55 class FunctionLoweringInfo {
57 const TargetLowering &TLI;
60 MachineRegisterInfo *RegInfo;
61 BranchProbabilityInfo *BPI;
62 /// CanLowerReturn - true iff the function's return value can be lowered to
66 /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
67 /// allocated to hold a pointer to the hidden sret parameter.
68 unsigned DemoteRegister;
70 /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
71 DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
73 /// ValueMap - Since we emit code for the function a basic block at a time,
74 /// we must remember which virtual registers hold the values for
75 /// cross-basic-block values.
76 DenseMap<const Value*, unsigned> ValueMap;
78 /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
79 /// the entry block. This allows the allocas to be efficiently referenced
80 /// anywhere in the function.
81 DenseMap<const AllocaInst*, int> StaticAllocaMap;
83 /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
84 DenseMap<const Argument*, int> ByValArgFrameIndexMap;
86 /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
87 /// function arguments that are inserted after scheduling is completed.
88 SmallVector<MachineInstr*, 8> ArgDbgValues;
90 /// RegFixups - Registers which need to be replaced after isel is done.
91 DenseMap<unsigned, unsigned> RegFixups;
93 /// MBB - The current block.
94 MachineBasicBlock *MBB;
96 /// MBB - The current insert position inside the current block.
97 MachineBasicBlock::iterator InsertPt;
100 SmallSet<const Instruction *, 8> CatchInfoLost;
101 SmallSet<const Instruction *, 8> CatchInfoFound;
105 unsigned NumSignBits : 31;
107 APInt KnownOne, KnownZero;
108 LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0),
112 /// VisitedBBs - The set of basic blocks visited thus far by instruction
114 DenseSet<const BasicBlock*> VisitedBBs;
116 /// PHINodesToUpdate - A list of phi instructions whose operand list will
117 /// be updated after processing the current basic block.
118 /// TODO: This isn't per-function state, it's per-basic-block state. But
119 /// there's no other convenient place for it to live right now.
120 std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
122 explicit FunctionLoweringInfo(const TargetLowering &TLI);
124 /// set - Initialize this FunctionLoweringInfo with the given Function
125 /// and its associated MachineFunction.
127 void set(const Function &Fn, MachineFunction &MF);
129 /// clear - Clear out all the function-specific state. This returns this
130 /// FunctionLoweringInfo to an empty state, ready to be used for a
131 /// different function.
134 /// isExportedInst - Return true if the specified value is an instruction
135 /// exported from its block.
136 bool isExportedInst(const Value *V) {
137 return ValueMap.count(V);
140 unsigned CreateReg(EVT VT);
142 unsigned CreateRegs(Type *Ty);
144 unsigned InitializeRegForValue(const Value *V) {
145 unsigned &R = ValueMap[V];
146 assert(R == 0 && "Already initialized this value register!");
147 return R = CreateRegs(V->getType());
150 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
151 /// register is a PHI destination and the PHI's LiveOutInfo is not valid.
152 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) {
153 if (!LiveOutRegInfo.inBounds(Reg))
156 const LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
163 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
164 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
165 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
166 /// the larger bit width by zero extension. The bit width must be no smaller
167 /// than the LiveOutInfo's existing bit width.
168 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth);
170 /// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
171 void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
172 const APInt &KnownZero, const APInt &KnownOne) {
173 // Only install this information if it tells us something.
174 if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
177 LiveOutRegInfo.grow(Reg);
178 LiveOutInfo &LOI = LiveOutRegInfo[Reg];
179 LOI.NumSignBits = NumSignBits;
180 LOI.KnownOne = KnownOne;
181 LOI.KnownZero = KnownZero;
184 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
185 /// register based on the LiveOutInfo of its operands.
186 void ComputePHILiveOutRegInfo(const PHINode*);
188 /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be
189 /// called when a block is visited before all of its predecessors.
190 void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
191 // PHIs with no uses have no ValueMap entry.
192 DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN);
193 if (It == ValueMap.end())
196 unsigned Reg = It->second;
197 LiveOutRegInfo.grow(Reg);
198 LiveOutRegInfo[Reg].IsValid = false;
201 /// setByValArgumentFrameIndex - Record frame index for the byval
203 void setByValArgumentFrameIndex(const Argument *A, int FI);
205 /// getByValArgumentFrameIndex - Get frame index for the byval argument.
206 int getByValArgumentFrameIndex(const Argument *A);
209 /// LiveOutRegInfo - Information about live out vregs.
210 IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
213 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
214 /// call, and add them to the specified machine basic block.
215 void AddCatchInfo(const CallInst &I,
216 MachineModuleInfo *MMI, MachineBasicBlock *MBB);
218 /// CopyCatchInfo - Copy catch information from SuccBB (or one of its
219 /// successors) to LPad.
220 void CopyCatchInfo(const BasicBlock *SuccBB, const BasicBlock *LPad,
221 MachineModuleInfo *MMI, FunctionLoweringInfo &FLI);
223 } // end namespace llvm