1 //===-- FastISel.h - Definition of the FastISel class ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the FastISel class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_FASTISEL_H
15 #define LLVM_CODEGEN_FASTISEL_H
17 #include "llvm/ADT/DenseMap.h"
18 #include "llvm/CodeGen/ValueTypes.h"
19 #include "llvm/CodeGen/MachineBasicBlock.h"
26 class FunctionLoweringInfo;
29 class MachineBasicBlock;
30 class MachineConstantPool;
31 class MachineFunction;
33 class MachineFrameInfo;
34 class MachineRegisterInfo;
36 class TargetInstrInfo;
39 class TargetRegisterClass;
40 class TargetRegisterInfo;
44 /// FastISel - This is a fast-path instruction selection class that
45 /// generates poor code and doesn't support illegal types or non-trivial
46 /// lowering, but runs quickly.
49 DenseMap<const Value *, unsigned> LocalValueMap;
50 FunctionLoweringInfo &FuncInfo;
51 MachineRegisterInfo &MRI;
52 MachineFrameInfo &MFI;
53 MachineConstantPool &MCP;
55 const TargetMachine &TM;
57 const TargetInstrInfo &TII;
58 const TargetLowering &TLI;
59 const TargetRegisterInfo &TRI;
61 /// The position of the last instruction for materializing constants
62 /// for use in the current block. It resets to EmitStartPt when it
63 /// makes sense (for example, it's usually profitable to avoid function
64 /// calls between the definition and the use)
65 MachineInstr *LastLocalValue;
67 /// The top most instruction in the current block that is allowed for
68 /// emitting local variables. LastLocalValue resets to EmitStartPt when
69 /// it makes sense (for example, on function calls)
70 MachineInstr *EmitStartPt;
73 /// getLastLocalValue - Return the position of the last instruction
74 /// emitted for materializing constants for use in the current block.
75 MachineInstr *getLastLocalValue() { return LastLocalValue; }
77 /// setLastLocalValue - Update the position of the last instruction
78 /// emitted for materializing constants for use in the current block.
79 void setLastLocalValue(MachineInstr *I) {
84 /// startNewBlock - Set the current block to which generated machine
85 /// instructions will be appended, and clear the local CSE map.
89 /// getCurDebugLoc() - Return current debug location information.
90 DebugLoc getCurDebugLoc() const { return DL; }
92 /// SelectInstruction - Do "fast" instruction selection for the given
93 /// LLVM IR instruction, and append generated machine instructions to
94 /// the current block. Return true if selection was successful.
96 bool SelectInstruction(const Instruction *I);
98 /// SelectOperator - Do "fast" instruction selection for the given
99 /// LLVM IR operator (Instruction or ConstantExpr), and append
100 /// generated machine instructions to the current block. Return true
101 /// if selection was successful.
103 bool SelectOperator(const User *I, unsigned Opcode);
105 /// getRegForValue - Create a virtual register and arrange for it to
106 /// be assigned the value for the given LLVM value.
107 unsigned getRegForValue(const Value *V);
109 /// lookUpRegForValue - Look up the value to see if its value is already
110 /// cached in a register. It may be defined by instructions across blocks or
112 unsigned lookUpRegForValue(const Value *V);
114 /// getRegForGEPIndex - This is a wrapper around getRegForValue that also
115 /// takes care of truncating or sign-extending the given getelementptr
117 std::pair<unsigned, bool> getRegForGEPIndex(const Value *V);
119 /// TryToFoldLoad - The specified machine instr operand is a vreg, and that
120 /// vreg is being provided by the specified load instruction. If possible,
121 /// try to fold the load as an operand to the instruction, returning true if
123 virtual bool TryToFoldLoad(MachineInstr * /*MI*/, unsigned /*OpNo*/,
124 const LoadInst * /*LI*/) {
128 /// recomputeInsertPt - Reset InsertPt to prepare for inserting instructions
129 /// into the current block.
130 void recomputeInsertPt();
133 MachineBasicBlock::iterator InsertPt;
137 /// enterLocalValueArea - Prepare InsertPt to begin inserting instructions
138 /// into the local value area and return the old insert position.
139 SavePoint enterLocalValueArea();
141 /// leaveLocalValueArea - Reset InsertPt to the given old insert position.
142 void leaveLocalValueArea(SavePoint Old);
147 explicit FastISel(FunctionLoweringInfo &funcInfo);
149 /// TargetSelectInstruction - This method is called by target-independent
150 /// code when the normal FastISel process fails to select an instruction.
151 /// This gives targets a chance to emit code for anything that doesn't
152 /// fit into FastISel's framework. It returns true if it was successful.
155 TargetSelectInstruction(const Instruction *I) = 0;
157 /// FastEmit_r - This method is called by target-independent code
158 /// to request that an instruction with the given type and opcode
160 virtual unsigned FastEmit_(MVT VT,
164 /// FastEmit_r - This method is called by target-independent code
165 /// to request that an instruction with the given type, opcode, and
166 /// register operand be emitted.
168 virtual unsigned FastEmit_r(MVT VT,
171 unsigned Op0, bool Op0IsKill);
173 /// FastEmit_rr - This method is called by target-independent code
174 /// to request that an instruction with the given type, opcode, and
175 /// register operands be emitted.
177 virtual unsigned FastEmit_rr(MVT VT,
180 unsigned Op0, bool Op0IsKill,
181 unsigned Op1, bool Op1IsKill);
183 /// FastEmit_ri - This method is called by target-independent code
184 /// to request that an instruction with the given type, opcode, and
185 /// register and immediate operands be emitted.
187 virtual unsigned FastEmit_ri(MVT VT,
190 unsigned Op0, bool Op0IsKill,
193 /// FastEmit_rf - This method is called by target-independent code
194 /// to request that an instruction with the given type, opcode, and
195 /// register and floating-point immediate operands be emitted.
197 virtual unsigned FastEmit_rf(MVT VT,
200 unsigned Op0, bool Op0IsKill,
201 const ConstantFP *FPImm);
203 /// FastEmit_rri - This method is called by target-independent code
204 /// to request that an instruction with the given type, opcode, and
205 /// register and immediate operands be emitted.
207 virtual unsigned FastEmit_rri(MVT VT,
210 unsigned Op0, bool Op0IsKill,
211 unsigned Op1, bool Op1IsKill,
214 /// FastEmit_ri_ - This method is a wrapper of FastEmit_ri. It first tries
215 /// to emit an instruction with an immediate operand using FastEmit_ri.
216 /// If that fails, it materializes the immediate into a register and try
217 /// FastEmit_rr instead.
218 unsigned FastEmit_ri_(MVT VT,
220 unsigned Op0, bool Op0IsKill,
221 uint64_t Imm, MVT ImmType);
223 /// FastEmit_i - This method is called by target-independent code
224 /// to request that an instruction with the given type, opcode, and
225 /// immediate operand be emitted.
226 virtual unsigned FastEmit_i(MVT VT,
231 /// FastEmit_f - This method is called by target-independent code
232 /// to request that an instruction with the given type, opcode, and
233 /// floating-point immediate operand be emitted.
234 virtual unsigned FastEmit_f(MVT VT,
237 const ConstantFP *FPImm);
239 /// FastEmitInst_ - Emit a MachineInstr with no operands and a
240 /// result register in the given register class.
242 unsigned FastEmitInst_(unsigned MachineInstOpcode,
243 const TargetRegisterClass *RC);
245 /// FastEmitInst_r - Emit a MachineInstr with one register operand
246 /// and a result register in the given register class.
248 unsigned FastEmitInst_r(unsigned MachineInstOpcode,
249 const TargetRegisterClass *RC,
250 unsigned Op0, bool Op0IsKill);
252 /// FastEmitInst_rr - Emit a MachineInstr with two register operands
253 /// and a result register in the given register class.
255 unsigned FastEmitInst_rr(unsigned MachineInstOpcode,
256 const TargetRegisterClass *RC,
257 unsigned Op0, bool Op0IsKill,
258 unsigned Op1, bool Op1IsKill);
260 /// FastEmitInst_rrr - Emit a MachineInstr with three register operands
261 /// and a result register in the given register class.
263 unsigned FastEmitInst_rrr(unsigned MachineInstOpcode,
264 const TargetRegisterClass *RC,
265 unsigned Op0, bool Op0IsKill,
266 unsigned Op1, bool Op1IsKill,
267 unsigned Op2, bool Op2IsKill);
269 /// FastEmitInst_ri - Emit a MachineInstr with a register operand,
270 /// an immediate, and a result register in the given register class.
272 unsigned FastEmitInst_ri(unsigned MachineInstOpcode,
273 const TargetRegisterClass *RC,
274 unsigned Op0, bool Op0IsKill,
277 /// FastEmitInst_rii - Emit a MachineInstr with one register operand
278 /// and two immediate operands.
280 unsigned FastEmitInst_rii(unsigned MachineInstOpcode,
281 const TargetRegisterClass *RC,
282 unsigned Op0, bool Op0IsKill,
283 uint64_t Imm1, uint64_t Imm2);
285 /// FastEmitInst_rf - Emit a MachineInstr with two register operands
286 /// and a result register in the given register class.
288 unsigned FastEmitInst_rf(unsigned MachineInstOpcode,
289 const TargetRegisterClass *RC,
290 unsigned Op0, bool Op0IsKill,
291 const ConstantFP *FPImm);
293 /// FastEmitInst_rri - Emit a MachineInstr with two register operands,
294 /// an immediate, and a result register in the given register class.
296 unsigned FastEmitInst_rri(unsigned MachineInstOpcode,
297 const TargetRegisterClass *RC,
298 unsigned Op0, bool Op0IsKill,
299 unsigned Op1, bool Op1IsKill,
302 /// FastEmitInst_i - Emit a MachineInstr with a single immediate
303 /// operand, and a result register in the given register class.
304 unsigned FastEmitInst_i(unsigned MachineInstrOpcode,
305 const TargetRegisterClass *RC,
308 /// FastEmitInst_ii - Emit a MachineInstr with a two immediate operands.
309 unsigned FastEmitInst_ii(unsigned MachineInstrOpcode,
310 const TargetRegisterClass *RC,
311 uint64_t Imm1, uint64_t Imm2);
313 /// FastEmitInst_extractsubreg - Emit a MachineInstr for an extract_subreg
314 /// from a specified index of a superregister to a specified type.
315 unsigned FastEmitInst_extractsubreg(MVT RetVT,
316 unsigned Op0, bool Op0IsKill,
319 /// FastEmitZExtFromI1 - Emit MachineInstrs to compute the value of Op
320 /// with all but the least significant bit set to zero.
321 unsigned FastEmitZExtFromI1(MVT VT,
322 unsigned Op0, bool Op0IsKill);
324 /// FastEmitBranch - Emit an unconditional branch to the given block,
325 /// unless it is the immediate (fall-through) successor, and update
327 void FastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL);
329 void UpdateValueMap(const Value* I, unsigned Reg, unsigned NumRegs = 1);
331 unsigned createResultReg(const TargetRegisterClass *RC);
333 /// TargetMaterializeConstant - Emit a constant in a register using
334 /// target-specific logic, such as constant pool loads.
335 virtual unsigned TargetMaterializeConstant(const Constant* C) {
339 /// TargetMaterializeAlloca - Emit an alloca address in a register using
340 /// target-specific logic.
341 virtual unsigned TargetMaterializeAlloca(const AllocaInst* C) {
345 virtual unsigned TargetMaterializeFloatZero(const ConstantFP* CF) {
350 bool SelectBinaryOp(const User *I, unsigned ISDOpcode);
352 bool SelectFNeg(const User *I);
354 bool SelectGetElementPtr(const User *I);
356 bool SelectCall(const User *I);
358 bool SelectBitCast(const User *I);
360 bool SelectCast(const User *I, unsigned Opcode);
362 bool SelectExtractValue(const User *I);
364 bool SelectInsertValue(const User *I);
366 /// HandlePHINodesInSuccessorBlocks - Handle PHI nodes in successor blocks.
367 /// Emit code to ensure constants are copied into registers when needed.
368 /// Remember the virtual registers that need to be added to the Machine PHI
369 /// nodes as input. We cannot just directly add them, because expansion
370 /// might result in multiple MBB's for one BB. As such, the start of the
371 /// BB might correspond to a different MBB than the end.
372 bool HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
374 /// materializeRegForValue - Helper for getRegForVale. This function is
375 /// called when the value isn't already available in a register and must
376 /// be materialized with new instructions.
377 unsigned materializeRegForValue(const Value *V, MVT VT);
379 /// flushLocalValueMap - clears LocalValueMap and moves the area for the
380 /// new local variables to the beginning of the block. It helps to avoid
381 /// spilling cached variables across heavy instructions like calls.
382 void flushLocalValueMap();
384 /// hasTrivialKill - Test whether the given value has exactly one use.
385 bool hasTrivialKill(const Value *V) const;
387 /// removeDeadCode - Remove all dead instructions between the I and E.
388 void removeDeadCode(MachineBasicBlock::iterator I,
389 MachineBasicBlock::iterator E);